2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2018 Max Weller
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
21 import sigrokdecode as srd
23 ann_cmdbit, ann_databit, ann_cmd, ann_data, ann_warning = range(5)
25 class Decoder(srd.Decoder):
29 longname = 'Siemens SDA 2506-5'
30 desc = 'Serial nonvolatile 1-Kbit EEPROM.'
35 {'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
36 {'id': 'd', 'name': 'DATA', 'desc': 'Data'},
37 {'id': 'ce', 'name': 'CE#', 'desc': 'Chip-enable'},
40 ('cmdbit', 'Command bit'),
41 ('databit', 'Data bit'),
43 ('data', 'Data byte'),
44 ('warnings', 'Human-readable warnings'),
47 ('bits', 'Bits', (ann_cmdbit, ann_databit)),
48 ('commands', 'Commands', (ann_cmd,)),
49 ('data', 'Data', (ann_data,)),
50 ('warnings', 'Warnings', (ann_warning,)),
54 self.samplerate = None
61 def metadata(self, key, value):
62 if key == srd.SRD_CONF_SAMPLERATE:
63 self.samplerate = value
66 self.out_ann = self.register(srd.OUTPUT_ANN)
68 def putbit(self, ss, es, typ, value):
69 self.put(ss, es, self.out_ann, [typ, ['%s' % (value)]])
71 def putdata(self, ss, es):
74 value = (value << 1) | self.databits[i]
75 self.put(ss, es, self.out_ann, [ann_data, ['%02X' % (value)]])
77 def decode_bits(self, offset, width):
79 for i in range(width):
80 out = (out << 1) | self.cmdbits[offset + i][0]
81 return (out, self.cmdbits[offset + width - 1][1], self.cmdbits[offset][2])
83 def decode_field(self, name, offset, width):
84 val, ss, es = self.decode_bits(offset, width)
85 self.put(ss, es, self.out_ann, [ann_data, ['%s: %02X' % (name, val)]])
90 # Wait for CLK edge or CE edge.
91 clk, d, ce = self.wait([{0: 'e'}, {2: 'e'}])
93 if self.matched[0] and ce == 1 and clk == 1:
94 # Rising clk edge and command mode.
95 bitstart = self.samplenum
97 self.cmdbits = [(d, bitstart, self.samplenum)] + self.cmdbits
98 if len(self.cmdbits) > 24:
99 self.cmdbits = self.cmdbits[0:24]
100 self.putbit(bitstart, self.samplenum, ann_cmdbit, d)
101 elif self.matched[0] and ce == 0 and clk == 0:
102 # Falling clk edge and data mode.
103 bitstart = self.samplenum
104 clk, d, ce = self.wait([{'skip': int(2.5 * (1e6 / self.samplerate))}, {0: 'r'}, {2: 'e'}]) # Wait 25 us for data ready.
105 if self.matched == (True, False, False):
106 self.wait([{0: 'r'}, {2: 'e'}])
107 if len(self.databits) == 0:
108 self.datastart = bitstart
109 self.databits = [d] + self.databits
110 self.putbit(bitstart, self.samplenum, ann_databit, d)
111 if len(self.databits) == 8:
112 self.putdata(self.datastart, self.samplenum)
114 elif self.matched[1] and ce == 0:
117 self.decode_field('addr', 1, 7)
118 self.decode_field('CB', 0, 1)
119 if self.cmdbits[0][0] == 0:
120 # Beginning read command.
121 self.decode_field('read', 1, 7)
122 self.put(self.cmdbits[7][1], self.samplenum,
123 self.out_ann, [ann_cmd, ['read' ]])
125 # Beginning write command.
126 self.decode_field('data', 8, 8)
127 addr, ss, es = self.decode_bits(1, 7)
128 data, ss, es = self.decode_bits(8, 8)
129 cmdstart = self.samplenum
131 self.put(cmdstart, self.samplenum, self.out_ann,
132 [ann_cmd, ['Write to %02X: %02X' % (addr, data)]])
134 # Beginning erase command.
135 val, ss, es = self.decode_bits(1, 7)
136 cmdstart = self.samplenum
138 self.put(cmdstart, self.samplenum, self.out_ann,
139 [ann_cmd, ['Erase: %02X' % (val)]])
141 except Exception as ex: