2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2013-2016 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
20 import sigrokdecode as srd
21 from common.srdhelper import bitpack
30 - 'ITEM', [<item>, <itembitsize>]
31 - 'WORD', [<word>, <wordbitsize>, <worditemcount>]
34 - A single item (a number). It can be of arbitrary size. The max. number
35 of bits in this item is specified in <itembitsize>.
38 - The size of an item (in bits). For a 4-bit parallel bus this is 4,
39 for a 16-bit parallel bus this is 16, and so on.
42 - A single word (a number). It can be of arbitrary size. The max. number
43 of bits in this word is specified in <wordbitsize>. The (exact) number
44 of items in this word is specified in <worditemcount>.
47 - The size of a word (in bits). For a 2-item word with 8-bit items
48 <wordbitsize> is 16, for a 3-item word with 4-bit items <wordbitsize>
52 - The size of a word (in number of items). For a 4-item word (no matter
53 how many bits each item consists of) <worditemcount> is 4, for a 7-item
54 word <worditemcount> is 7, and so on.
57 def channel_list(num_channels):
58 l = [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}]
59 for i in range(num_channels):
60 d = {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i}
64 class ChannelError(Exception):
69 class Decoder(srd.Decoder):
73 longname = 'Parallel sync bus'
74 desc = 'Generic parallel synchronous bus.'
77 outputs = ['parallel']
78 optional_channels = channel_list(NUM_CHANNELS)
80 {'id': 'clock_edge', 'desc': 'Clock edge to sample on',
81 'default': 'rising', 'values': ('rising', 'falling')},
82 {'id': 'wordsize', 'desc': 'Data wordsize (# bus cycles)',
84 {'id': 'endianness', 'desc': 'Data endianness',
85 'default': 'little', 'values': ('little', 'big')},
92 ('items', 'Items', (0,)),
93 ('words', 'Words', (1,)),
101 self.saved_item = None
102 self.ss_item = self.es_item = None
103 self.saved_word = None
104 self.ss_word = self.es_word = None
108 self.out_python = self.register(srd.OUTPUT_PYTHON)
109 self.out_ann = self.register(srd.OUTPUT_ANN)
111 def putpb(self, data):
112 self.put(self.ss_item, self.es_item, self.out_python, data)
114 def putb(self, data):
115 self.put(self.ss_item, self.es_item, self.out_ann, data)
117 def putpw(self, data):
118 self.put(self.ss_word, self.es_word, self.out_python, data)
120 def putw(self, data):
121 self.put(self.ss_word, self.es_word, self.out_ann, data)
123 def handle_bits(self, item, used_pins):
125 # If a word was previously accumulated, then emit its annotation
126 # now after its end samplenumber became available.
127 if self.saved_word is not None:
128 if self.options['wordsize'] > 0:
129 self.es_word = self.samplenum
130 self.putw([1, [self.fmt_word.format(self.saved_word)]])
131 self.putpw(['WORD', self.saved_word])
132 self.saved_word = None
134 # Defer annotations for individual items until the next sample
135 # is taken, and the previous sample's end samplenumber has
138 # Save the start sample and item for later (no output yet).
139 self.ss_item = self.samplenum
141 self.saved_item = item
143 # Output the saved item (from the last CLK edge to the current).
144 self.es_item = self.samplenum
145 self.putpb(['ITEM', self.saved_item])
146 self.putb([0, [self.fmt_item.format(self.saved_item)]])
147 self.ss_item = self.samplenum
148 self.saved_item = item
150 # Get as many items as the configured wordsize specifies.
152 self.ss_word = self.samplenum
153 self.items.append(item)
154 ws = self.options['wordsize']
155 if len(self.items) < ws:
158 # Collect words and prepare annotation details, but defer emission
159 # until the end samplenumber becomes available.
160 endian = self.options['endianness']
163 word = sum([self.items[i] << (i * used_pins) for i in range(ws)])
164 self.saved_word = word
168 # Determine which (optional) channels have input data. Insist in
169 # a non-empty input data set. Cope with sparse connection maps.
170 # Store enough state to later "compress" sampled input data.
171 max_possible = len(self.optional_channels)
173 idx if self.has_channel(idx) else None
174 for idx in range(max_possible)
176 has_channels = [idx for idx in idx_channels if idx is not None]
178 raise ChannelError('At least one channel has to be supplied.')
179 max_connected = max(has_channels)
181 # Determine .wait() conditions, depending on the presence of a
182 # clock signal. Either inspect samples on the configured edge of
183 # the clock, or inspect samples upon ANY edge of ANY of the pins
184 # which provide input data.
185 if self.has_channel(0):
186 edge = self.options['clock_edge'][0]
189 conds = [{idx: 'e'} for idx in has_channels]
191 # Pre-determine which input data to strip off, the width of
192 # individual items and multiplexed words, as well as format
193 # strings here. This simplifies call sites which run in tight
195 idx_strip = max_connected + 1
196 num_item_bits = idx_strip - 1
197 num_word_items = self.options['wordsize']
198 num_word_bits = num_item_bits * num_word_items
199 num_digits = (num_item_bits + 3) // 4
200 self.fmt_item = "{{:0{}x}}".format(num_digits)
201 num_digits = (num_word_bits + 3) // 4
202 self.fmt_word = "{{:0{}x}}".format(num_digits)
204 # Keep processing the input stream. Assume "always zero" for
205 # not-connected input lines. Pass data bits (all inputs except
206 # clock) to the handle_bits() method.
208 pins = self.wait(conds)
209 bits = [0 if idx is None else pins[idx] for idx in idx_channels]
210 item = bitpack(bits[1:idx_strip])
211 self.handle_bits(item, num_item_bits)