2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2011-2014 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 import sigrokdecode as srd
23 # Dict which maps command IDs to their names and descriptions.
25 0x06: ('WREN', 'Write enable'),
26 0x04: ('WRDI', 'Write disable'),
27 0x9f: ('RDID', 'Read identification'),
28 0x05: ('RDSR', 'Read status register'),
29 0x01: ('WRSR', 'Write status register'),
30 0x03: ('READ', 'Read data'),
31 0x0b: ('FAST/READ', 'Fast read data'),
32 0xbb: ('2READ', '2x I/O read'),
33 0x20: ('SE', 'Sector erase'),
34 0xd8: ('BE', 'Block erase'),
35 0x60: ('CE', 'Chip erase'),
36 0xc7: ('CE2', 'Chip erase'), # Alternative command ID
37 0x02: ('PP', 'Page program'),
38 0xad: ('CP', 'Continuously program mode'),
39 0xb9: ('DP', 'Deep power down'),
40 0xab: ('RDP/RES', 'Release from deep powerdown / Read electronic ID'),
41 0x90: ('REMS', 'Read electronic manufacturer & device ID'),
42 0xef: ('REMS2', 'Read ID for 2x I/O mode'),
43 0xb1: ('ENSO', 'Enter secured OTP'),
44 0xc1: ('EXSO', 'Exit secured OTP'),
45 0x2b: ('RDSCUR', 'Read security register'),
46 0x2f: ('WRSCUR', 'Write security register'),
47 0x70: ('ESRY', 'Enable SO to output RY/BY#'),
48 0x80: ('DSRY', 'Disable SO to output RY/BY#'),
57 def cmd_annotation_classes():
58 return tuple([tuple([cmd[0].lower(), cmd[1]]) for cmd in cmds.values()])
60 def decode_status_reg(data):
61 # TODO: Additional per-bit(s) self.put() calls with correct start/end.
63 # Bits[0:0]: WIP (write in progress)
64 s = 'W' if (data & (1 << 0)) else 'No w'
65 ret = '%srite operation in progress.\n' % s
67 # Bits[1:1]: WEL (write enable latch)
68 s = '' if (data & (1 << 1)) else 'not '
69 ret += 'Internal write enable latch is %sset.\n' % s
71 # Bits[5:2]: Block protect bits
72 # TODO: More detailed decoding (chip-dependent).
73 ret += 'Block protection bits (BP3-BP0): 0x%x.\n' % ((data & 0x3c) >> 2)
75 # Bits[6:6]: Continuously program mode (CP mode)
76 s = '' if (data & (1 << 6)) else 'not '
77 ret += 'Device is %sin continuously program mode (CP mode).\n' % s
79 # Bits[7:7]: SRWD (status register write disable)
80 s = 'not ' if (data & (1 << 7)) else ''
81 ret += 'Status register writes are %sallowed.\n' % s
85 class Decoder(srd.Decoder):
89 longname = 'Macronix MX25Lxx05D'
90 desc = 'SPI (NOR) flash chip protocol.'
93 outputs = ['mx25lxx05d']
94 annotations = cmd_annotation_classes() + (
97 ('warnings', 'Warnings'),
100 ('bits', 'Bits', (24, 25)),
101 ('commands', 'Commands', tuple(range(23 + 1))),
102 ('warnings', 'Warnings', (26,)),
105 def __init__(self, **kwargs):
112 self.out_ann = self.register(srd.OUTPUT_ANN)
114 def putx(self, data):
115 # Simplification, most annotations span exactly one SPI byte/packet.
116 self.put(self.ss, self.es, self.out_ann, data)
118 def handle_wren(self, mosi, miso):
119 self.putx([0, ['Command: %s' % cmds[self.state][1]]])
122 def handle_wrdi(self, mosi, miso):
125 # TODO: Check/display device ID / name
126 def handle_rdid(self, mosi, miso):
127 if self.cmdstate == 1:
128 # Byte 1: Master sends command ID.
129 self.start_sample = self.ss
130 self.putx([2, ['Command: %s' % cmds[self.state][1]]])
131 elif self.cmdstate == 2:
132 # Byte 2: Slave sends the JEDEC manufacturer ID.
133 self.putx([2, ['Manufacturer ID: 0x%02x' % miso]])
134 elif self.cmdstate == 3:
135 # Byte 3: Slave sends the memory type (0x20 for this chip).
136 self.putx([2, ['Memory type: 0x%02x' % miso]])
137 elif self.cmdstate == 4:
138 # Byte 4: Slave sends the device ID.
139 self.device_id = miso
140 self.putx([2, ['Device ID: 0x%02x' % miso]])
142 if self.cmdstate == 4:
143 # TODO: Check self.device_id is valid & exists in device_names.
144 # TODO: Same device ID? Check!
145 d = 'Device: Macronix %s' % device_name[self.device_id]
146 self.put(self.start_sample, self.es, self.out_ann, [0, [d]])
151 def handle_rdsr(self, mosi, miso):
152 # Read status register: Master asserts CS#, sends RDSR command,
153 # reads status register byte. If CS# is kept asserted, the status
154 # register can be read continuously / multiple times in a row.
155 # When done, the master de-asserts CS# again.
156 if self.cmdstate == 1:
157 # Byte 1: Master sends command ID.
158 self.putx([3, ['Command: %s' % cmds[self.state][1]]])
159 elif self.cmdstate >= 2:
160 # Bytes 2-x: Slave sends status register as long as master clocks.
161 if self.cmdstate <= 3: # TODO: While CS# asserted.
162 self.putx([24, ['Status register: 0x%02x' % miso]])
163 self.putx([25, [decode_status_reg(miso)]])
165 if self.cmdstate == 3: # TODO: If CS# got de-asserted.
171 def handle_wrsr(self, mosi, miso):
174 def handle_read(self, mosi, miso):
175 # Read data bytes: Master asserts CS#, sends READ command, sends
176 # 3-byte address, reads >= 1 data bytes, de-asserts CS#.
177 if self.cmdstate == 1:
178 # Byte 1: Master sends command ID.
179 self.putx([5, ['Command: %s' % cmds[self.state][1]]])
180 elif self.cmdstate in (2, 3, 4):
181 # Bytes 2/3/4: Master sends read address (24bits, MSB-first).
182 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
183 # self.putx([0, ['Read address, byte %d: 0x%02x' % \
184 # (4 - self.cmdstate, mosi)]])
185 if self.cmdstate == 4:
186 self.putx([24, ['Read address: 0x%06x' % self.addr]])
188 elif self.cmdstate >= 5:
189 # Bytes 5-x: Master reads data bytes (until CS# de-asserted).
190 # TODO: For now we hardcode 256 bytes per READ command.
191 if self.cmdstate <= 256 + 4: # TODO: While CS# asserted.
192 self.data.append(miso)
193 # self.putx([0, ['New read byte: 0x%02x' % miso]])
195 if self.cmdstate == 256 + 4: # TODO: If CS# got de-asserted.
196 # s = ', '.join(map(hex, self.data))
197 s = ''.join(map(chr, self.data))
198 self.putx([24, ['Read data']])
199 self.putx([25, ['Read data: %s' % s]])
206 def handle_fast_read(self, mosi, miso):
209 def handle_2read(self, mosi, miso):
212 # TODO: Warn/abort if we don't see the necessary amount of bytes.
213 # TODO: Warn if WREN was not seen before.
214 def handle_se(self, mosi, miso):
215 if self.cmdstate == 1:
216 # Byte 1: Master sends command ID.
218 self.start_sample = self.ss
219 self.putx([8, ['Command: %s' % cmds[self.state][1]]])
220 elif self.cmdstate in (2, 3, 4):
221 # Bytes 2/3/4: Master sends sectror address (24bits, MSB-first).
222 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
223 # self.putx([0, ['Sector address, byte %d: 0x%02x' % \
224 # (4 - self.cmdstate, mosi)]])
226 if self.cmdstate == 4:
227 d = 'Erase sector %d (0x%06x)' % (self.addr, self.addr)
228 self.put(self.start_sample, self.es, self.out_ann, [24, [d]])
229 # TODO: Max. size depends on chip, check that too if possible.
230 if self.addr % 4096 != 0:
231 # Sector addresses must be 4K-aligned (same for all 3 chips).
232 d = 'Warning: Invalid sector address!'
233 self.put(self.start_sample, self.es, self.out_ann, [101, [d]])
238 def handle_be(self, mosi, miso):
241 def handle_ce(self, mosi, miso):
244 def handle_ce2(self, mosi, miso):
247 def handle_pp(self, mosi, miso):
248 # Page program: Master asserts CS#, sends PP command, sends 3-byte
249 # page address, sends >= 1 data bytes, de-asserts CS#.
250 if self.cmdstate == 1:
251 # Byte 1: Master sends command ID.
252 self.putx([12, ['Command: %s' % cmds[self.state][1]]])
253 elif self.cmdstate in (2, 3, 4):
254 # Bytes 2/3/4: Master sends page address (24bits, MSB-first).
255 self.addr |= (mosi << ((4 - self.cmdstate) * 8))
256 # self.putx([0, ['Page address, byte %d: 0x%02x' % \
257 # (4 - self.cmdstate, mosi)]])
258 if self.cmdstate == 4:
259 self.putx([24, ['Page address: 0x%06x' % self.addr]])
261 elif self.cmdstate >= 5:
262 # Bytes 5-x: Master sends data bytes (until CS# de-asserted).
263 # TODO: For now we hardcode 256 bytes per page / PP command.
264 if self.cmdstate <= 256 + 4: # TODO: While CS# asserted.
265 self.data.append(mosi)
266 # self.putx([0, ['New data byte: 0x%02x' % mosi]])
268 if self.cmdstate == 256 + 4: # TODO: If CS# got de-asserted.
269 # s = ', '.join(map(hex, self.data))
270 s = ''.join(map(chr, self.data))
271 self.putx([24, ['Page data']])
272 self.putx([25, ['Page data: %s' % s]])
279 def handle_cp(self, mosi, miso):
282 def handle_dp(self, mosi, miso):
285 def handle_rdp_res(self, mosi, miso):
288 def handle_rems(self, mosi, miso):
289 if self.cmdstate == 1:
290 # Byte 1: Master sends command ID.
291 self.start_sample = self.ss
292 self.putx([16, ['Command: %s' % cmds[self.state][1]]])
293 elif self.cmdstate in (2, 3):
294 # Bytes 2/3: Master sends two dummy bytes.
295 # TODO: Check dummy bytes? Check reply from device?
296 self.putx([24, ['Dummy byte: %s' % mosi]])
297 elif self.cmdstate == 4:
298 # Byte 4: Master sends 0x00 or 0x01.
299 # 0x00: Master wants manufacturer ID as first reply byte.
300 # 0x01: Master wants device ID as first reply byte.
301 self.manufacturer_id_first = True if (mosi == 0x00) else False
302 d = 'manufacturer' if (mosi == 0x00) else 'device'
303 self.putx([24, ['Master wants %s ID first' % d]])
304 elif self.cmdstate == 5:
305 # Byte 5: Slave sends manufacturer ID (or device ID).
307 d = 'Manufacturer' if self.manufacturer_id_first else 'Device'
308 self.putx([24, ['%s ID' % d]])
309 elif self.cmdstate == 6:
310 # Byte 6: Slave sends device ID (or manufacturer ID).
311 self.ids.append(miso)
312 d = 'Manufacturer' if self.manufacturer_id_first else 'Device'
313 self.putx([24, ['%s ID' % d]])
315 if self.cmdstate == 6:
316 self.end_sample = self.es
317 id = self.ids[1] if self.manufacturer_id_first else self.ids[0]
318 self.putx([24, ['Device: Macronix %s' % device_name[id]]])
323 def handle_rems2(self, mosi, miso):
326 def handle_enso(self, mosi, miso):
329 def handle_exso(self, mosi, miso):
332 def handle_rdscur(self, mosi, miso):
335 def handle_wrscur(self, mosi, miso):
338 def handle_esry(self, mosi, miso):
341 def handle_dsry(self, mosi, miso):
344 def decode(self, ss, es, data):
346 ptype, mosi, miso = data
348 # if ptype == 'DATA':
349 # self.putx([0, ['MOSI: 0x%02x, MISO: 0x%02x' % (mosi, miso)]])
351 # if ptype == 'CS-CHANGE':
352 # if mosi == 1 and miso == 0:
353 # self.putx([0, ['Asserting CS#']])
354 # elif mosi == 0 and miso == 1:
355 # self.putx([0, ['De-asserting CS#']])
360 self.ss, self.es = ss, es
362 # If we encountered a known chip command, enter the resp. state.
363 if self.state is None:
368 if self.state in cmds:
369 s = 'handle_%s' % cmds[self.state][0].lower().replace('/', '_')
370 handle_reg = getattr(self, s)
371 handle_reg(mosi, miso)
373 self.putx([24, ['Unknown command: 0x%02x' % mosi]])