2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2017 Marcus Comstedt <marcus@mc.pp.se>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
20 import sigrokdecode as srd
31 class Decoder(srd.Decoder):
35 longname = 'SEGA Maple bus'
36 desc = 'Maple bus peripheral protocol for SEGA Dreamcast.'
39 outputs = ['maple_bus']
41 {'id': 'sdcka', 'name': 'SDCKA', 'desc': 'Data/clock line A'},
42 {'id': 'sdckb', 'name': 'SDCKB', 'desc': 'Data/clock line B'},
45 ('start', 'Start pattern'),
46 ('end', 'End pattern'),
47 ('start-with-crc', 'Start pattern with CRC'),
48 ('occupancy', 'SDCKB occupancy pattern'),
49 ('reset', 'RESET pattern'),
51 ('size', 'Data size'),
52 ('source', 'Source AP'),
53 ('dest', 'Destination AP'),
54 ('command', 'Command'),
56 ('checksum', 'Checksum'),
57 ('frame-error', 'Frame error'),
58 ('checksum-error', 'Checksum error'),
59 ('size-error', 'Size error'),
62 ('bits', 'Bits', (0, 1, 2, 3, 4, 5)),
63 ('fields', 'Fields', (6, 7, 8, 9, 10, 11)),
64 ('warnings', 'Warnings', (12, 13, 14)),
67 ('size', 'Data size'),
68 ('source', 'Source AP'),
69 ('dest', 'Destination AP'),
70 ('command', 'Command code'),
72 ('checksum', 'Checksum'),
82 self.out_ann = self.register(srd.OUTPUT_ANN)
83 self.out_binary = self.register(srd.OUTPUT_BINARY)
84 self.pending_bit_pos = None
87 self.put(self.ss, self.es, self.out_ann, data)
90 self.put(self.ss, self.es, self.out_binary, data)
92 def byte_annotation(self, bintype, d):
94 ['%s: %02X' % (name, d) for name in ann[bintype]] + ['%02X' % d]]
97 self.putx([0, ['Start pattern', 'Start', 'S']])
100 self.putx([1, ['End pattern', 'End', 'E']])
101 if self.length != self.expected_length + 1:
102 self.putx([14, ['Size error', 'L error', 'LE']])
104 def got_start_with_crc(self):
105 self.putx([2, ['Start pattern with CRC', 'Start CRC', 'SC']])
107 def got_occupancy(self):
108 self.putx([3, ['SDCKB occupancy pattern', 'Occupancy', 'O']])
111 self.putx([4, ['RESET pattern', 'RESET', 'R']])
113 def output_pending_bit(self):
114 if self.pending_bit_pos:
115 self.put(self.pending_bit_pos, self.pending_bit_pos, self.out_ann, [5, ['Bit: %d' % self.pending_bit, '%d' % self.pending_bit]])
117 def got_bit(self, n):
118 self.output_pending_bit()
119 self.data = self.data * 2 + n
121 self.pending_bit_pos = self.samplenum
124 self.output_pending_bit()
128 self.expected_length = 4 * (self.data + 1)
129 bintype = self.length
130 elif self.length == self.expected_length:
132 if self.data != self.checksum:
133 self.putx([13, ['Cksum error', 'K error', 'KE']])
134 self.length = self.length + 1
135 self.checksum = self.checksum ^ self.data
136 self.putx(self.byte_annotation(bintype, self.data))
137 self.putb([bintype, bytes([self.data])])
138 self.pending_bit_pos = None
140 def frame_error(self):
141 self.putx([7, ['Frame error', 'F error', 'FE']])
143 def handle_start(self):
144 self.wait({0: 'l', 1: 'h'})
145 self.ss = self.samplenum
148 sdcka, sdckb = self.wait([{1: 'f'}, {0: 'r'}])
152 self.es = self.samplenum
158 self.got_start_with_crc()
169 def handle_byte_or_stop(self):
170 self.ss = self.samplenum
171 self.pending_bit_pos = None
177 sdcka, sdckb = self.wait([{0: 'f'}, {1: 'f'}])
178 self.es = self.samplenum
183 elif counta == 1 and countb == 0 and self.data == 0 and sdckb == 0:
184 self.wait([{0: 'h', 1: 'h'}, {0: 'f'}, {1: 'f'}])
185 self.es = self.samplenum
194 elif self.matched[1]:
195 if counta == countb + 1:
198 elif counta == 0 and countb == 0 and sdcka == 1 and initial:
199 self.ss = self.samplenum
205 self.es = self.samplenum
211 while not self.handle_start():
214 self.expected_length = 4
216 while self.handle_byte_or_stop():