2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2020 Soeren Apel <soeren@apelpie.net>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
20 import sigrokdecode as srd
21 from common.srdhelper import bitpack
27 [<data>] where <data> is the payload contained between the LFAST header and
28 the LFAST stop bit. It's an array of bytes.
31 # See tc27xD_um_v2.2.pdf, Table 20-10
43 # See tc27xD_um_v2.2.pdf, Table 20-10
44 payload_byte_sizes = {
55 # See tc27xD_um_v2.2.pdf, Table 20-11
57 0b0000: 'Interface Control / PING (32 bit)',
58 0b0001: 'Unsolicited Status (32 bit)',
59 0b0010: 'Slave Interface Control / Read',
60 0b0011: 'CTS Transfer',
61 0b0100: 'Data Channel A',
62 0b0101: 'Data Channel B',
63 0b0110: 'Data Channel C',
64 0b0111: 'Data Channel D',
65 0b1000: 'Data Channel E',
66 0b1001: 'Data Channel F',
67 0b1010: 'Data Channel G',
68 0b1011: 'Data Channel H',
75 # See tc27xD_um_v2.2.pdf, Table 20-12
79 0x02: 'Slave interface clock multiplier start',
80 0x04: 'Slave interface clock multiplier stop',
81 0x08: 'Use 5 MBaud for M->S',
82 0x10: 'Use 320 MBaud for M->S',
83 0x20: 'Use 5 MBaud for S->M',
84 0x40: 'Use 20 MBaud for S->M (needs 20 MHz SysClk)',
85 0x80: 'Use 320 MBaud for S->M',
86 0x31: 'Enable slave interface transmitter',
87 0x32: 'Disable slave interface transmitter',
88 0x34: 'Enable clock test mode',
89 0x38: 'Disable clock test mode and payload loopback',
90 0xFF: 'Enable payload loopback',
94 ann_bit, ann_sync, ann_header_pl_size, ann_header_ch_type, ann_header_cts, \
95 ann_payload, ann_control_data, ann_sleepbit, ann_warning = range(9)
96 state_sync, state_header, state_payload, state_sleepbit = range(4)
98 class Decoder(srd.Decoder):
102 longname = 'NXP LFAST interface'
103 desc = 'Differential high-speed P2P interface'
107 tags = ['Embedded/industrial']
109 {'id': 'data', 'name': 'Data', 'desc': 'TXP or RXP'},
113 ('sync', 'Sync Pattern'),
114 ('header_pl_size', 'Payload Size'),
115 ('header_ch_type', 'Logical Channel Type'),
116 ('header_cts', 'Clear To Send'),
117 ('payload', 'Payload'),
118 ('ctrl_data', 'Control Data'),
119 ('sleep', 'Sleep Bit'),
120 ('warning', 'Warning'),
123 ('bits', 'Bits', (ann_bit,)),
124 ('fields', 'Fields', (ann_sync, ann_header_pl_size, ann_header_ch_type,
125 ann_header_cts, ann_payload, ann_control_data, ann_sleepbit,)),
126 ('warnings', 'Warnings', (ann_warning,)),
130 decimal.getcontext().rounding = decimal.ROUND_HALF_UP
134 self.ss = self.es = 0
135 self.ss_payload = self.es_payload = 0
138 self.payload_size = 0 # Expected number of bytes, as read from header
139 self.bit_len = 0 # Length of one bit time, in samples
140 self.timeout = 0 # desired timeout for next edge, in samples
141 self.ch_type_id = 0 # ID of channel type
142 self.state = state_sync
144 def metadata(self, key, value):
148 self.out_python = self.register(srd.OUTPUT_PYTHON)
149 self.out_ann = self.register(srd.OUTPUT_ANN)
151 def put_ann(self, ss, es, ann_class, value):
152 self.put(ss, es, self.out_ann, [ann_class, value])
154 def put_payload(self):
155 self.put(self.ss_payload, self.es_payload, self.out_python, self.payload)
157 def handle_sync(self):
158 if len(self.bits) == 1:
159 self.ss_sync = self.ss_bit
161 if len(self.bits) == 16:
162 value = bitpack(self.bits)
164 self.put_ann(self.ss_sync, self.es_bit, ann_sync, ['Sync OK'])
166 self.put_ann(self.ss_sync, self.es_bit, ann_warning, ['Wrong Sync Value: {:02X}'.format(value)])
169 self.state = state_header
171 def handle_header(self):
172 if len(self.bits) == 1:
173 self.ss_header = self.ss_bit
175 if len(self.bits) == 8:
176 # See tc27xD_um_v2.2.pdf, Figure 20-47, for the header structure
177 bit_len = (self.es_bit - self.ss_header) / 8
178 value = bitpack(self.bits)
181 es = ss + 3 * bit_len
182 size_id = (value & 0xE0) >> 5
183 size = payload_sizes.get(size_id)
184 self.payload_size = payload_byte_sizes.get(size_id)
185 self.put_ann(int(ss), int(es), ann_header_pl_size, [size])
188 es = ss + 4 * bit_len
189 self.ch_type_id = (value & 0x1E) >> 1
190 ch_type = channel_types.get(self.ch_type_id)
191 self.put_ann(int(ss), int(es), ann_header_ch_type, [ch_type])
196 self.put_ann(int(ss), int(es), ann_header_cts, ['{}'.format(cts)])
199 self.state = state_payload
201 def handle_payload(self):
202 if len(self.bits) == 1:
203 self.ss_byte = self.ss_bit
204 if self.ss_payload == 0:
205 self.ss_payload = self.ss_bit
207 if len(self.bits) == 8:
208 value = bitpack(self.bits)
209 value_hex = '{:02X}'.format(value)
211 # Control transfers have no SIPI payload, show them as control transfers
212 # Check the channel_types list for the meaning of the magic values
213 if (self.ch_type_id >= 0b0100) and (self.ch_type_id <= 0b1011):
214 self.put_ann(self.ss_byte, self.es_bit, ann_payload, [value_hex])
216 # Control transfers are 8-bit transfers, so only evaluate the first byte
217 if len(self.payload) == 0:
218 ctrl_data = control_payloads.get(value, value_hex)
219 self.put_ann(self.ss_byte, self.es_bit, ann_control_data, [ctrl_data])
221 self.put_ann(self.ss_byte, self.es_bit, ann_control_data, [value_hex])
224 self.payload.append(value)
225 self.es_payload = self.es_bit
227 self.timeout = int((self.payload_size - len(self.payload)) * 8 * self.bit_len)
229 if (len(self.payload) == self.payload_size):
230 self.timeout = int(1.4 * self.bit_len)
232 self.state = state_sleepbit
234 def handle_sleepbit(self):
235 if len(self.bits) == 0:
236 self.put_ann(self.ss_bit, self.es_bit, ann_sleepbit, ['No LVDS sleep mode request', 'No sleep', 'N'])
237 elif len(self.bits) > 1:
238 self.put_ann(self.ss_bit, self.es_bit, ann_warning, ['Expected only the sleep bit, got {} bits instead'.format(len(self.bits))])
240 if self.bits[0] == 1:
241 self.put_ann(self.ss_bit, self.es_bit, ann_sleepbit, ['LVDS sleep mode request', 'Sleep', 'Y'])
243 self.put_ann(self.ss_bit, self.es_bit, ann_sleepbit, ['No LVDS sleep mode request', 'No sleep', 'N'])
245 # We only send the payload out if this is an actual data transfer;
246 # check the channel_types list for the meaning of the magic values
247 if (self.ch_type_id >= 0b0100) and (self.ch_type_id <= 0b1011):
248 if len(self.payload) > 0:
255 if self.timeout == 0:
256 rising_edge, = self.wait({0: 'e'})
258 rising_edge, = self.wait([{0: 'e'}, {'skip': self.timeout}])
260 # If this is the first edge, we only update ss
262 self.ss = self.samplenum
265 self.es = self.samplenum
267 if int(self.es - self.ss) == 0:
270 # Check for the sleep bit if this is a timeout condition
271 if (self.timeout > 0) and (self.es - self.ss == self.timeout):
272 rising_edge = ~rising_edge
273 if self.state == state_sleepbit:
274 self.handle_sleepbit()
276 # We use the first bit to deduce the bit length
277 if self.bit_len == 0:
278 self.bit_len = self.es - self.ss
280 # Determine number of bits covered by this edge
281 bit_count = (self.es - self.ss) / self.bit_len
282 bit_count = int(decimal.Decimal(bit_count).to_integral_value())
285 self.put_ann(self.ss, self.es, ann_warning, ['Bit time too short'])
289 bit_value = '0' if rising_edge else '1'
291 divided_len = (self.es - self.ss) / bit_count
292 for i in range(bit_count):
293 self.ss_bit = int(self.ss + i * divided_len)
294 self.es_bit = int(self.ss_bit + divided_len)
295 self.put_ann(self.ss_bit, self.es_bit, ann_bit, [bit_value])
297 # Place the new bit at the front of the bit list
298 self.bits.insert(0, (0 if rising_edge else 1))
300 if self.state == state_sync:
302 elif self.state == state_header:
304 elif self.state == state_payload:
305 self.handle_payload()
306 elif self.state == state_sleepbit:
307 self.handle_sleepbit()
310 # Only update ss if we didn't just perform a reset
312 self.ss = self.samplenum