2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2010-2013 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 # I2C protocol decoder
23 # TODO: Look into arbitration, collision detection, clock synchronisation, etc.
24 # TODO: Handle clock stretching.
25 # TODO: Handle combined messages / repeated START.
26 # TODO: Implement support for 7bit and 10bit slave addresses.
27 # TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0).
28 # TODO: Implement support for detecting various bus errors.
29 # TODO: I2C address of slaves.
30 # TODO: Handle multiple different I2C devices on same bus
31 # -> we need to decode multiple protocols at the same time.
33 import sigrokdecode as srd
35 # CMD: [annotation-type-index, long annotation, short annotation]
37 'START': [0, 'Start', 'S'],
38 'START REPEAT': [1, 'Start repeat', 'Sr'],
39 'STOP': [2, 'Stop', 'P'],
40 'ACK': [3, 'ACK', 'A'],
41 'NACK': [4, 'NACK', 'N'],
42 'ADDRESS READ': [5, 'Address read', 'AR'],
43 'ADDRESS WRITE': [6, 'Address write', 'AW'],
44 'DATA READ': [7, 'Data read', 'DR'],
45 'DATA WRITE': [8, 'Data write', 'DW'],
48 class Decoder(srd.Decoder):
52 longname = 'Inter-Integrated Circuit'
53 desc = 'Two-wire, multi-master, serial bus.'
58 {'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'},
59 {'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'},
63 'addressing': ['Slave addressing (in bits)', 7], # 7 or 10
64 'address_format': ['Displayed slave address format', 'shifted'],
67 ['Start', 'Start condition'],
68 ['Repeat start', 'Repeat start condition'],
69 ['Stop', 'Stop condition'],
72 ['Address read', 'Address read'],
73 ['Address write', 'Address write'],
74 ['Data read', 'Data read'],
75 ['Data write', 'Data write'],
76 ['Warnings', 'Human-readable warnings'],
79 def __init__(self, **kwargs):
85 self.is_repeat_start = 0
86 self.state = 'FIND START'
91 def start(self, metadata):
92 self.out_proto = self.add(srd.OUTPUT_PROTO, 'i2c')
93 self.out_ann = self.add(srd.OUTPUT_ANN, 'i2c')
99 self.put(self.startsample, self.samplenum, self.out_ann, data)
101 def putp(self, data):
102 self.put(self.startsample, self.samplenum, self.out_proto, data)
104 def is_start_condition(self, scl, sda):
105 # START condition (S): SDA = falling, SCL = high
106 if (self.oldsda == 1 and sda == 0) and scl == 1:
110 def is_data_bit(self, scl, sda):
111 # Data sampling of receiver: SCL = rising
112 if self.oldscl == 0 and scl == 1:
116 def is_stop_condition(self, scl, sda):
117 # STOP condition (P): SDA = rising, SCL = high
118 if (self.oldsda == 0 and sda == 1) and scl == 1:
122 def found_start(self, scl, sda):
123 self.startsample = self.samplenum
124 cmd = 'START REPEAT' if (self.is_repeat_start == 1) else 'START'
125 self.putp([cmd, None])
126 self.putx([proto[cmd][0], proto[cmd][1:]])
127 self.state = 'FIND ADDRESS'
128 self.bitcount = self.databyte = 0
129 self.is_repeat_start = 1
132 # Gather 8 bits of data plus the ACK/NACK bit.
133 def found_address_or_data(self, scl, sda):
134 # Address and data are transmitted MSB-first.
138 if self.bitcount == 0:
139 self.startsample = self.samplenum
141 # Return if we haven't collected all 8 + 1 bits, yet.
143 if self.bitcount != 8:
146 # We triggered on the ACK/NACK bit, but won't report that until later.
147 self.startsample -= 1
150 if self.state == 'FIND ADDRESS':
151 # The READ/WRITE bit is only in address bytes, not data bytes.
152 self.wr = 0 if (self.databyte & 1) else 1
153 if self.options['address_format'] == 'shifted':
156 if self.state == 'FIND ADDRESS' and self.wr == 1:
157 cmd = 'ADDRESS WRITE'
158 elif self.state == 'FIND ADDRESS' and self.wr == 0:
160 elif self.state == 'FIND DATA' and self.wr == 1:
162 elif self.state == 'FIND DATA' and self.wr == 0:
166 self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d),
167 '%s: %02X' % (proto[cmd][2], d), '%02X' % d]])
169 # Done with this packet.
170 self.startsample = -1
171 self.bitcount = self.databyte = 0
172 self.state = 'FIND ACK'
174 def get_ack(self, scl, sda):
175 self.startsample = self.samplenum
176 cmd = 'NACK' if (sda == 1) else 'ACK'
177 self.putp([cmd, None])
178 self.putx([proto[cmd][0], proto[cmd][1:]])
179 # There could be multiple data bytes in a row, so either find
180 # another data byte or a STOP condition next.
181 self.state = 'FIND DATA'
183 def found_stop(self, scl, sda):
184 self.startsample = self.samplenum
186 self.putp([cmd, None])
187 self.putx([proto[cmd][0], proto[cmd][1:]])
188 self.state = 'FIND START'
189 self.is_repeat_start = 0
192 def decode(self, ss, es, data):
193 for (self.samplenum, pins) in data:
195 # Ignore identical samples early on (for performance reasons).
196 if self.oldpins == pins:
198 self.oldpins, (scl, sda) = pins, pins
200 # TODO: Wait until the bus is idle (SDA = SCL = 1) first?
203 if self.state == 'FIND START':
204 if self.is_start_condition(scl, sda):
205 self.found_start(scl, sda)
206 elif self.state == 'FIND ADDRESS':
207 if self.is_data_bit(scl, sda):
208 self.found_address_or_data(scl, sda)
209 elif self.state == 'FIND DATA':
210 if self.is_data_bit(scl, sda):
211 self.found_address_or_data(scl, sda)
212 elif self.is_start_condition(scl, sda):
213 self.found_start(scl, sda)
214 elif self.is_stop_condition(scl, sda):
215 self.found_stop(scl, sda)
216 elif self.state == 'FIND ACK':
217 if self.is_data_bit(scl, sda):
218 self.get_ack(scl, sda)
220 raise Exception('Invalid state: %s' % self.state)
222 # Save current SDA/SCL values for the next round.