2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2017 Karl Palsson <karlp@etactica.com>
6 ## Permission is hereby granted, free of charge, to any person obtaining a copy
7 ## of this software and associated documentation files (the "Software"), to deal
8 ## in the Software without restriction, including without limitation the rights
9 ## to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 ## copies of the Software, and to permit persons to whom the Software is
11 ## furnished to do so, subject to the following conditions:
13 ## The above copyright notice and this permission notice shall be included in all
14 ## copies or substantial portions of the Software.
16 ## THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 ## IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 ## FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 ## AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 ## LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 ## OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
25 import sigrokdecode as srd
28 class Decoder(srd.Decoder):
32 longname = 'Analog Devices ADE7758'
33 desc = 'Poly phase multifunction energy metering IC protocol.'
38 ('read', 'Register read commands'),
39 ('write', 'Register write commands'),
40 ('warning', 'Warnings'),
43 ('read', 'Read', (0,)),
44 ('write', 'Write', (1,)),
45 ('warnings', 'Warnings', (2,)),
54 self.ss_cmd, self.es_cmd = 0, 0
58 self.out_ann = self.register(srd.OUTPUT_ANN)
61 self.put(self.ss_cmd, self.es_cmd, self.out_ann, data)
63 def put_warn(self, pos, msg):
64 self.put(pos[0], pos[1], self.out_ann, [2, [msg]])
66 def decode(self, ss, es, data):
68 if ptype == 'CS-CHANGE':
69 # Bear in mind, that CS is optional according to the datasheet.
70 # If we transition high mid-stream, toss out our data and restart.
71 cs_old, cs_new = data[1:]
72 if cs_old is not None and cs_old == 0 and cs_new == 1:
73 if len(self.mosi_bytes) > 0 and len(self.mosi_bytes[1:]) < self.expected:
74 # Mark short read/write for reg at least!
76 write = self.cmd & 0x80
80 self.putx([1, ['%s: %s' % (rblob[0], "SHORT")]])
82 self.putx([0, ['%s: %s' % (rblob[0], "SHORT")]])
84 self.put_warn([self.ss_cmd, es], "Short transfer!")
88 # Don't care about anything else.
93 if len(self.mosi_bytes) == 0:
95 self.mosi_bytes.append(mosi)
96 self.miso_bytes.append(miso)
98 # A transfer is 2-4 bytes, (command + 1..3 byte reg).
99 if len(self.mosi_bytes) < 2:
102 self.cmd = self.mosi_bytes[0]
103 write = self.cmd & 0x80
104 reg = self.cmd & 0x7f
105 rblob = regs.get(reg)
107 # If you don't have CS, this will _destroy_ comms!
108 self.put_warn([self.ss_cmd, es], 'Unknown register!')
111 self.expected = math.ceil(rblob[3] / 8)
112 if len(self.mosi_bytes[1:]) != self.expected:
117 if self.expected == 3:
118 valo = self.mosi_bytes[1] << 16 | self.mosi_bytes[2] << 8 | \
120 vali = self.miso_bytes[1] << 16 | self.miso_bytes[2] << 8 | \
122 elif self.expected == 2:
123 valo = self.mosi_bytes[1] << 8 | self.mosi_bytes[2]
124 vali = self.miso_bytes[1] << 8 | self.miso_bytes[2]
125 elif self.expected == 1:
126 valo = self.mosi_bytes[1]
127 vali = self.miso_bytes[1]
130 self.putx([1, ['%s: %#x' % (rblob[0], valo)]])
132 self.putx([0, ['%s: %#x' % (rblob[0], vali)]])