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drivers: Consistently use the name trigger_matches[] everywhere.
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM,
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t devopts_cg_analog[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129static const char *trigger_sources[] = {
130 "CH1",
131 "CH2",
132 "CH3",
133 "CH4",
134 "EXT",
135 "AC Line",
136 "D0",
137 "D1",
138 "D2",
139 "D3",
140 "D4",
141 "D5",
142 "D6",
143 "D7",
144 "D8",
145 "D9",
146 "D10",
147 "D11",
148 "D12",
149 "D13",
150 "D14",
151 "D15",
152};
153
154static const char *trigger_slopes[] = {
155 "r",
156 "f",
157};
158
159static const char *coupling[] = {
160 "AC",
161 "DC",
162 "GND",
163};
164
165static const uint64_t probe_factor[] = {
166 1,
167 2,
168 5,
169 10,
170 20,
171 50,
172 100,
173 200,
174 500,
175 1000,
176};
177
178/* Do not change the order of entries */
179static const char *data_sources[] = {
180 "Live",
181 "Memory",
182 "Segmented",
183};
184
185enum vendor {
186 RIGOL,
187 AGILENT,
188};
189
190enum series {
191 VS5000,
192 DS1000,
193 DS2000,
194 DS2000A,
195 DSO1000,
196 DS1000Z,
197};
198
199/* short name, full name */
200static const struct rigol_ds_vendor supported_vendors[] = {
201 [RIGOL] = {"Rigol", "Rigol Technologies"},
202 [AGILENT] = {"Agilent", "Agilent Technologies"},
203};
204
205#define VENDOR(x) &supported_vendors[x]
206/* vendor, series/name, protocol, data format, max timebase, min vdiv,
207 * number of horizontal divs, live waveform samples, memory buffer samples */
208static const struct rigol_ds_series supported_series[] = {
209 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
210 {50, 1}, {2, 1000}, 14, 2048, 0},
211 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
212 {50, 1}, {2, 1000}, 12, 600, 1048576},
213 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
214 {500, 1}, {500, 1000000}, 14, 1400, 14000},
215 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
216 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
217 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
218 {50, 1}, {2, 1000}, 12, 600, 20480},
219 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
220 {50, 1}, {1, 1000}, 12, 1200, 12000000},
221};
222
223#define SERIES(x) &supported_series[x]
224/* series, model, min timebase, analog channels, digital */
225static const struct rigol_ds_model supported_models[] = {
226 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
227 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
228 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
229 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
230 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
231 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
232 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
233 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
234 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
235 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
236 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
237 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
238 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
239 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
240 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
241 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
242 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
243 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
244 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
245 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
246 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
247 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
248 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
249 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
250 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true},
251 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true},
252 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true},
253 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true},
254 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
255 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
256 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
257 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
258 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
259 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
260 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
261 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
262 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
263 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
264 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
265 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
266 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
267 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
268 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
269 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
270 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
271};
272
273static struct sr_dev_driver rigol_ds_driver_info;
274
275static void clear_helper(struct dev_context *devc)
276{
277 unsigned int i;
278
279 g_free(devc->data);
280 g_free(devc->buffer);
281 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
282 g_free(devc->coupling[i]);
283 g_free(devc->trigger_source);
284 g_free(devc->trigger_slope);
285 g_free(devc->analog_groups);
286}
287
288static int dev_clear(const struct sr_dev_driver *di)
289{
290 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
291}
292
293static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
294{
295 struct dev_context *devc;
296 struct sr_dev_inst *sdi;
297 struct sr_scpi_hw_info *hw_info;
298 struct sr_channel *ch;
299 long n[3];
300 unsigned int i;
301 const struct rigol_ds_model *model = NULL;
302 gchar *channel_name, **version;
303
304 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
305 sr_info("Couldn't get IDN response, retrying.");
306 sr_scpi_close(scpi);
307 sr_scpi_open(scpi);
308 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
309 sr_info("Couldn't get IDN response.");
310 return NULL;
311 }
312 }
313
314 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
315 if (!g_ascii_strcasecmp(hw_info->manufacturer,
316 supported_models[i].series->vendor->full_name) &&
317 !strcmp(hw_info->model, supported_models[i].name)) {
318 model = &supported_models[i];
319 break;
320 }
321 }
322
323 if (!model) {
324 sr_scpi_hw_info_free(hw_info);
325 return NULL;
326 }
327
328 sdi = g_malloc0(sizeof(struct sr_dev_inst));
329 sdi->vendor = g_strdup(model->series->vendor->name);
330 sdi->model = g_strdup(model->name);
331 sdi->version = g_strdup(hw_info->firmware_version);
332 sdi->conn = scpi;
333 sdi->driver = &rigol_ds_driver_info;
334 sdi->inst_type = SR_INST_SCPI;
335 sdi->serial_num = g_strdup(hw_info->serial_number);
336 devc = g_malloc0(sizeof(struct dev_context));
337 devc->limit_frames = 0;
338 devc->model = model;
339 devc->format = model->series->format;
340
341 /* DS1000 models with firmware before 0.2.4 used the old data format. */
342 if (model->series == SERIES(DS1000)) {
343 version = g_strsplit(hw_info->firmware_version, ".", 0);
344 do {
345 if (!version[0] || !version[1] || !version[2])
346 break;
347 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
348 break;
349 for (i = 0; i < 3; i++) {
350 if (sr_atol(version[i], &n[i]) != SR_OK)
351 break;
352 }
353 if (i != 3)
354 break;
355 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
356 if (scpi->firmware_version < 24) {
357 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
358 devc->format = FORMAT_RAW;
359 }
360 break;
361 } while (0);
362 g_strfreev(version);
363 }
364
365 sr_scpi_hw_info_free(hw_info);
366
367 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
368 model->analog_channels);
369
370 for (i = 0; i < model->analog_channels; i++) {
371 channel_name = g_strdup_printf("CH%d", i + 1);
372 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
373
374 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
375
376 devc->analog_groups[i]->name = channel_name;
377 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
378 sdi->channel_groups = g_slist_append(sdi->channel_groups,
379 devc->analog_groups[i]);
380 }
381
382 if (devc->model->has_digital) {
383 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
384
385 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
386 channel_name = g_strdup_printf("D%d", i);
387 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
388 g_free(channel_name);
389 devc->digital_group->channels = g_slist_append(
390 devc->digital_group->channels, ch);
391 }
392 devc->digital_group->name = g_strdup("LA");
393 sdi->channel_groups = g_slist_append(sdi->channel_groups,
394 devc->digital_group);
395 }
396
397 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
398 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
399 devc->timebases = &timebases[i];
400 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
401 devc->num_timebases = &timebases[i] - devc->timebases + 1;
402 }
403
404 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
405 if (!memcmp(&devc->model->series->min_vdiv,
406 &vdivs[i], sizeof(uint64_t[2]))) {
407 devc->vdivs = &vdivs[i];
408 devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
409 }
410 }
411
412 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
413 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
414
415 devc->data_source = DATA_SOURCE_LIVE;
416
417 sdi->priv = devc;
418
419 return sdi;
420}
421
422static GSList *scan(struct sr_dev_driver *di, GSList *options)
423{
424 return sr_scpi_scan(di->context, options, probe_device);
425}
426
427static int dev_open(struct sr_dev_inst *sdi)
428{
429 int ret;
430 struct sr_scpi_dev_inst *scpi = sdi->conn;
431
432 if ((ret = sr_scpi_open(scpi)) < 0) {
433 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
434 return SR_ERR;
435 }
436
437 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
438 sr_err("Failed to get device config: %s.", sr_strerror(ret));
439 return SR_ERR;
440 }
441
442 return SR_OK;
443}
444
445static int dev_close(struct sr_dev_inst *sdi)
446{
447 struct sr_scpi_dev_inst *scpi;
448 struct dev_context *devc;
449
450 scpi = sdi->conn;
451 devc = sdi->priv;
452
453 if (!scpi)
454 return SR_ERR_BUG;
455
456 if (devc->model->series->protocol == PROTOCOL_V2)
457 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
458
459 return sr_scpi_close(scpi);
460}
461
462static int analog_frame_size(const struct sr_dev_inst *sdi)
463{
464 struct dev_context *devc = sdi->priv;
465 struct sr_channel *ch;
466 int analog_channels = 0;
467 GSList *l;
468
469 for (l = sdi->channels; l; l = l->next) {
470 ch = l->data;
471 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
472 analog_channels++;
473 }
474
475 if (analog_channels == 0)
476 return 0;
477
478 switch (devc->data_source) {
479 case DATA_SOURCE_LIVE:
480 return devc->model->series->live_samples;
481 case DATA_SOURCE_MEMORY:
482 return devc->model->series->buffer_samples / analog_channels;
483 default:
484 return 0;
485 }
486}
487
488static int digital_frame_size(const struct sr_dev_inst *sdi)
489{
490 struct dev_context *devc = sdi->priv;
491
492 switch (devc->data_source) {
493 case DATA_SOURCE_LIVE:
494 return devc->model->series->live_samples * 2;
495 case DATA_SOURCE_MEMORY:
496 return devc->model->series->buffer_samples * 2;
497 default:
498 return 0;
499 }
500}
501
502static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
503 const struct sr_channel_group *cg)
504{
505 struct dev_context *devc;
506 struct sr_channel *ch;
507 const char *tmp_str;
508 uint64_t samplerate;
509 int analog_channel = -1;
510 float smallest_diff = INFINITY;
511 int idx = -1;
512 unsigned i;
513
514 if (!sdi)
515 return SR_ERR_ARG;
516
517 devc = sdi->priv;
518
519 /* If a channel group is specified, it must be a valid one. */
520 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
521 sr_err("Invalid channel group specified.");
522 return SR_ERR;
523 }
524
525 if (cg) {
526 ch = g_slist_nth_data(cg->channels, 0);
527 if (!ch)
528 return SR_ERR;
529 if (ch->type == SR_CHANNEL_ANALOG) {
530 if (ch->name[2] < '1' || ch->name[2] > '4')
531 return SR_ERR;
532 analog_channel = ch->name[2] - '1';
533 }
534 }
535
536 switch (key) {
537 case SR_CONF_NUM_HDIV:
538 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
539 break;
540 case SR_CONF_NUM_VDIV:
541 *data = g_variant_new_int32(devc->num_vdivs);
542 break;
543 case SR_CONF_DATA_SOURCE:
544 if (devc->data_source == DATA_SOURCE_LIVE)
545 *data = g_variant_new_string("Live");
546 else if (devc->data_source == DATA_SOURCE_MEMORY)
547 *data = g_variant_new_string("Memory");
548 else
549 *data = g_variant_new_string("Segmented");
550 break;
551 case SR_CONF_SAMPLERATE:
552 if (devc->data_source == DATA_SOURCE_LIVE) {
553 samplerate = analog_frame_size(sdi) /
554 (devc->timebase * devc->model->series->num_horizontal_divs);
555 *data = g_variant_new_uint64(samplerate);
556 } else {
557 sr_dbg("Unknown data source: %d.", devc->data_source);
558 return SR_ERR_NA;
559 }
560 break;
561 case SR_CONF_TRIGGER_SOURCE:
562 if (!strcmp(devc->trigger_source, "ACL"))
563 tmp_str = "AC Line";
564 else if (!strcmp(devc->trigger_source, "CHAN1"))
565 tmp_str = "CH1";
566 else if (!strcmp(devc->trigger_source, "CHAN2"))
567 tmp_str = "CH2";
568 else if (!strcmp(devc->trigger_source, "CHAN3"))
569 tmp_str = "CH3";
570 else if (!strcmp(devc->trigger_source, "CHAN4"))
571 tmp_str = "CH4";
572 else
573 tmp_str = devc->trigger_source;
574 *data = g_variant_new_string(tmp_str);
575 break;
576 case SR_CONF_TRIGGER_SLOPE:
577 if (!strncmp(devc->trigger_slope, "POS", 3)) {
578 tmp_str = "r";
579 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
580 tmp_str = "f";
581 } else {
582 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
583 return SR_ERR_NA;
584 }
585 *data = g_variant_new_string(tmp_str);
586 break;
587 case SR_CONF_TRIGGER_LEVEL:
588 *data = g_variant_new_double(devc->trigger_level);
589 break;
590 case SR_CONF_TIMEBASE:
591 for (i = 0; i < devc->num_timebases; i++) {
592 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
593 float diff = fabs(devc->timebase - tb);
594 if (diff < smallest_diff) {
595 smallest_diff = diff;
596 idx = i;
597 }
598 }
599 if (idx < 0) {
600 sr_dbg("Negative timebase index: %d.", idx);
601 return SR_ERR_NA;
602 }
603 *data = g_variant_new("(tt)", devc->timebases[idx][0],
604 devc->timebases[idx][1]);
605 break;
606 case SR_CONF_VDIV:
607 if (analog_channel < 0) {
608 sr_dbg("Negative analog channel: %d.", analog_channel);
609 return SR_ERR_NA;
610 }
611 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
612 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
613 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
614 if (diff < smallest_diff) {
615 smallest_diff = diff;
616 idx = i;
617 }
618 }
619 if (idx < 0) {
620 sr_dbg("Negative vdiv index: %d.", idx);
621 return SR_ERR_NA;
622 }
623 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
624 break;
625 case SR_CONF_COUPLING:
626 if (analog_channel < 0) {
627 sr_dbg("Negative analog channel: %d.", analog_channel);
628 return SR_ERR_NA;
629 }
630 *data = g_variant_new_string(devc->coupling[analog_channel]);
631 break;
632 case SR_CONF_PROBE_FACTOR:
633 if (analog_channel < 0) {
634 sr_dbg("Negative analog channel: %d.", analog_channel);
635 return SR_ERR_NA;
636 }
637 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
638 break;
639 default:
640 return SR_ERR_NA;
641 }
642
643 return SR_OK;
644}
645
646static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
647 const struct sr_channel_group *cg)
648{
649 struct dev_context *devc;
650 uint64_t p, q;
651 double t_dbl;
652 unsigned int i, j;
653 int ret;
654 const char *tmp_str;
655 char buffer[16];
656
657 devc = sdi->priv;
658
659 /* If a channel group is specified, it must be a valid one. */
660 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
661 sr_err("Invalid channel group specified.");
662 return SR_ERR;
663 }
664
665 ret = SR_OK;
666 switch (key) {
667 case SR_CONF_LIMIT_FRAMES:
668 devc->limit_frames = g_variant_get_uint64(data);
669 break;
670 case SR_CONF_TRIGGER_SLOPE:
671 tmp_str = g_variant_get_string(data, NULL);
672
673 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
674 sr_err("Unknown trigger slope: '%s'.",
675 (tmp_str) ? tmp_str : "NULL");
676 return SR_ERR_ARG;
677 }
678
679 g_free(devc->trigger_slope);
680 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
681 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
682 break;
683 case SR_CONF_HORIZ_TRIGGERPOS:
684 t_dbl = g_variant_get_double(data);
685 if (t_dbl < 0.0 || t_dbl > 1.0) {
686 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
687 return SR_ERR;
688 }
689 devc->horiz_triggerpos = t_dbl;
690 /* We have the trigger offset as a percentage of the frame, but
691 * need to express this in seconds. */
692 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
693 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
694 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
695 break;
696 case SR_CONF_TRIGGER_LEVEL:
697 t_dbl = g_variant_get_double(data);
698 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
699 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
700 if (ret == SR_OK)
701 devc->trigger_level = t_dbl;
702 break;
703 case SR_CONF_TIMEBASE:
704 g_variant_get(data, "(tt)", &p, &q);
705 for (i = 0; i < devc->num_timebases; i++) {
706 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
707 devc->timebase = (float)p / q;
708 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
709 devc->timebase);
710 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
711 break;
712 }
713 }
714 if (i == devc->num_timebases) {
715 sr_err("Invalid timebase index: %d.", i);
716 ret = SR_ERR_ARG;
717 }
718 break;
719 case SR_CONF_TRIGGER_SOURCE:
720 tmp_str = g_variant_get_string(data, NULL);
721 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
722 if (!strcmp(trigger_sources[i], tmp_str)) {
723 g_free(devc->trigger_source);
724 devc->trigger_source = g_strdup(trigger_sources[i]);
725 if (!strcmp(devc->trigger_source, "AC Line"))
726 tmp_str = "ACL";
727 else if (!strcmp(devc->trigger_source, "CH1"))
728 tmp_str = "CHAN1";
729 else if (!strcmp(devc->trigger_source, "CH2"))
730 tmp_str = "CHAN2";
731 else if (!strcmp(devc->trigger_source, "CH3"))
732 tmp_str = "CHAN3";
733 else if (!strcmp(devc->trigger_source, "CH4"))
734 tmp_str = "CHAN4";
735 else
736 tmp_str = (char *)devc->trigger_source;
737 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
738 break;
739 }
740 }
741 if (i == ARRAY_SIZE(trigger_sources)) {
742 sr_err("Invalid trigger source index: %d.", i);
743 ret = SR_ERR_ARG;
744 }
745 break;
746 case SR_CONF_VDIV:
747 if (!cg)
748 return SR_ERR_CHANNEL_GROUP;
749 g_variant_get(data, "(tt)", &p, &q);
750 for (i = 0; i < devc->model->analog_channels; i++) {
751 if (cg == devc->analog_groups[i]) {
752 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
753 if (vdivs[j][0] != p || vdivs[j][1] != q)
754 continue;
755 devc->vdiv[i] = (float)p / q;
756 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
757 devc->vdiv[i]);
758 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
759 buffer);
760 }
761 sr_err("Invalid vdiv index: %d.", j);
762 return SR_ERR_ARG;
763 }
764 }
765 sr_dbg("Didn't set vdiv, unknown channel(group).");
766 return SR_ERR_NA;
767 case SR_CONF_COUPLING:
768 if (!cg)
769 return SR_ERR_CHANNEL_GROUP;
770 tmp_str = g_variant_get_string(data, NULL);
771 for (i = 0; i < devc->model->analog_channels; i++) {
772 if (cg == devc->analog_groups[i]) {
773 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
774 if (!strcmp(tmp_str, coupling[j])) {
775 g_free(devc->coupling[i]);
776 devc->coupling[i] = g_strdup(coupling[j]);
777 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
778 devc->coupling[i]);
779 }
780 }
781 sr_err("Invalid coupling index: %d.", j);
782 return SR_ERR_ARG;
783 }
784 }
785 sr_dbg("Didn't set coupling, unknown channel(group).");
786 return SR_ERR_NA;
787 case SR_CONF_PROBE_FACTOR:
788 if (!cg)
789 return SR_ERR_CHANNEL_GROUP;
790 p = g_variant_get_uint64(data);
791 for (i = 0; i < devc->model->analog_channels; i++) {
792 if (cg == devc->analog_groups[i]) {
793 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
794 if (p == probe_factor[j]) {
795 devc->attenuation[i] = p;
796 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
797 i + 1, p);
798 if (ret == SR_OK)
799 rigol_ds_get_dev_cfg_vertical(sdi);
800 return ret;
801 }
802 }
803 sr_err("Invalid probe factor: %"PRIu64".", p);
804 return SR_ERR_ARG;
805 }
806 }
807 sr_dbg("Didn't set probe factor, unknown channel(group).");
808 return SR_ERR_NA;
809 case SR_CONF_DATA_SOURCE:
810 tmp_str = g_variant_get_string(data, NULL);
811 if (!strcmp(tmp_str, "Live"))
812 devc->data_source = DATA_SOURCE_LIVE;
813 else if (devc->model->series->protocol >= PROTOCOL_V2
814 && !strcmp(tmp_str, "Memory"))
815 devc->data_source = DATA_SOURCE_MEMORY;
816 else if (devc->model->series->protocol >= PROTOCOL_V3
817 && !strcmp(tmp_str, "Segmented"))
818 devc->data_source = DATA_SOURCE_SEGMENTED;
819 else {
820 sr_err("Unknown data source: '%s'.", tmp_str);
821 return SR_ERR;
822 }
823 break;
824 default:
825 return SR_ERR_NA;
826 }
827
828 return ret;
829}
830
831static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
832 const struct sr_channel_group *cg)
833{
834 unsigned int i;
835 struct dev_context *devc;
836
837 devc = (sdi) ? sdi->priv : NULL;
838
839 switch (key) {
840 case SR_CONF_SCAN_OPTIONS:
841 case SR_CONF_DEVICE_OPTIONS:
842 if (!cg)
843 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
844 if (cg == devc->digital_group) {
845 *data = std_gvar_array_u32(NULL, 0);
846 return SR_OK;
847 } else {
848 for (i = 0; i < devc->model->analog_channels; i++) {
849 if (cg == devc->analog_groups[i]) {
850 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
851 return SR_OK;
852 }
853 }
854 return SR_ERR_NA;
855 }
856 break;
857 case SR_CONF_COUPLING:
858 if (!cg)
859 return SR_ERR_CHANNEL_GROUP;
860 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
861 break;
862 case SR_CONF_PROBE_FACTOR:
863 if (!cg)
864 return SR_ERR_CHANNEL_GROUP;
865 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
866 break;
867 case SR_CONF_VDIV:
868 if (!devc)
869 /* Can't know this until we have the exact model. */
870 return SR_ERR_ARG;
871 if (!cg)
872 return SR_ERR_CHANNEL_GROUP;
873 *data = std_gvar_tuple_array((const uint64_t (*)[][2])devc->vdivs, devc->num_vdivs);
874 break;
875 case SR_CONF_TIMEBASE:
876 if (!devc)
877 /* Can't know this until we have the exact model. */
878 return SR_ERR_ARG;
879 if (devc->num_timebases <= 0)
880 return SR_ERR_NA;
881 *data = std_gvar_tuple_array((const uint64_t (*)[][2])devc->timebases, devc->num_timebases);
882 break;
883 case SR_CONF_TRIGGER_SOURCE:
884 if (!devc)
885 /* Can't know this until we have the exact model. */
886 return SR_ERR_ARG;
887 *data = g_variant_new_strv(trigger_sources,
888 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
889 break;
890 case SR_CONF_TRIGGER_SLOPE:
891 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
892 break;
893 case SR_CONF_DATA_SOURCE:
894 if (!devc)
895 /* Can't know this until we have the exact model. */
896 return SR_ERR_ARG;
897 switch (devc->model->series->protocol) {
898 case PROTOCOL_V1:
899 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
900 break;
901 case PROTOCOL_V2:
902 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
903 break;
904 default:
905 *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
906 break;
907 }
908 break;
909 default:
910 return SR_ERR_NA;
911 }
912
913 return SR_OK;
914}
915
916static int dev_acquisition_start(const struct sr_dev_inst *sdi)
917{
918 struct sr_scpi_dev_inst *scpi;
919 struct dev_context *devc;
920 struct sr_channel *ch;
921 struct sr_datafeed_packet packet;
922 gboolean some_digital;
923 GSList *l;
924
925 scpi = sdi->conn;
926 devc = sdi->priv;
927
928 devc->num_frames = 0;
929
930 some_digital = FALSE;
931 for (l = sdi->channels; l; l = l->next) {
932 ch = l->data;
933 sr_dbg("handling channel %s", ch->name);
934 if (ch->type == SR_CHANNEL_ANALOG) {
935 if (ch->enabled)
936 devc->enabled_channels = g_slist_append(
937 devc->enabled_channels, ch);
938 if (ch->enabled != devc->analog_channels[ch->index]) {
939 /* Enabled channel is currently disabled, or vice versa. */
940 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
941 ch->enabled ? "ON" : "OFF") != SR_OK)
942 return SR_ERR;
943 devc->analog_channels[ch->index] = ch->enabled;
944 }
945 } else if (ch->type == SR_CHANNEL_LOGIC) {
946 /* Only one list entry for older protocols. All channels are
947 * retrieved together when this entry is processed. */
948 if (ch->enabled && (
949 devc->model->series->protocol > PROTOCOL_V3 ||
950 !some_digital))
951 devc->enabled_channels = g_slist_append(
952 devc->enabled_channels, ch);
953 if (ch->enabled) {
954 some_digital = TRUE;
955 /* Turn on LA module if currently off. */
956 if (!devc->la_enabled) {
957 if (rigol_ds_config_set(sdi,
958 devc->model->series->protocol >= PROTOCOL_V3 ?
959 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
960 return SR_ERR;
961 devc->la_enabled = TRUE;
962 }
963 }
964 if (ch->enabled != devc->digital_channels[ch->index]) {
965 /* Enabled channel is currently disabled, or vice versa. */
966 if (rigol_ds_config_set(sdi,
967 devc->model->series->protocol >= PROTOCOL_V3 ?
968 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
969 ch->enabled ? "ON" : "OFF") != SR_OK)
970 return SR_ERR;
971 devc->digital_channels[ch->index] = ch->enabled;
972 }
973 }
974 }
975
976 if (!devc->enabled_channels)
977 return SR_ERR;
978
979 /* Turn off LA module if on and no digital channels selected. */
980 if (devc->la_enabled && !some_digital)
981 if (rigol_ds_config_set(sdi,
982 devc->model->series->protocol >= PROTOCOL_V3 ?
983 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
984 return SR_ERR;
985
986 /* Set memory mode. */
987 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
988 sr_err("Data source 'Segmented' not yet supported");
989 return SR_ERR;
990 }
991
992 devc->analog_frame_size = analog_frame_size(sdi);
993 devc->digital_frame_size = digital_frame_size(sdi);
994
995 switch (devc->model->series->protocol) {
996 case PROTOCOL_V2:
997 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
998 return SR_ERR;
999 break;
1000 case PROTOCOL_V3:
1001 /* Apparently for the DS2000 the memory
1002 * depth can only be set in Running state -
1003 * this matches the behaviour of the UI. */
1004 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1005 return SR_ERR;
1006 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1007 devc->analog_frame_size) != SR_OK)
1008 return SR_ERR;
1009 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1010 return SR_ERR;
1011 break;
1012 default:
1013 break;
1014 }
1015
1016 if (devc->data_source == DATA_SOURCE_LIVE)
1017 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1018 return SR_ERR;
1019
1020 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1021 rigol_ds_receive, (void *)sdi);
1022
1023 std_session_send_df_header(sdi);
1024
1025 devc->channel_entry = devc->enabled_channels;
1026
1027 if (rigol_ds_capture_start(sdi) != SR_OK)
1028 return SR_ERR;
1029
1030 /* Start of first frame. */
1031 packet.type = SR_DF_FRAME_BEGIN;
1032 sr_session_send(sdi, &packet);
1033
1034 return SR_OK;
1035}
1036
1037static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1038{
1039 struct dev_context *devc;
1040 struct sr_scpi_dev_inst *scpi;
1041
1042 devc = sdi->priv;
1043
1044 std_session_send_df_end(sdi);
1045
1046 g_slist_free(devc->enabled_channels);
1047 devc->enabled_channels = NULL;
1048 scpi = sdi->conn;
1049 sr_scpi_source_remove(sdi->session, scpi);
1050
1051 return SR_OK;
1052}
1053
1054static struct sr_dev_driver rigol_ds_driver_info = {
1055 .name = "rigol-ds",
1056 .longname = "Rigol DS",
1057 .api_version = 1,
1058 .init = std_init,
1059 .cleanup = std_cleanup,
1060 .scan = scan,
1061 .dev_list = std_dev_list,
1062 .dev_clear = dev_clear,
1063 .config_get = config_get,
1064 .config_set = config_set,
1065 .config_list = config_list,
1066 .dev_open = dev_open,
1067 .dev_close = dev_close,
1068 .dev_acquisition_start = dev_acquisition_start,
1069 .dev_acquisition_stop = dev_acquisition_stop,
1070 .context = NULL,
1071};
1072SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib