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demo: Add random analog signal generation
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM,
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t devopts_cg_analog[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129static const char *trigger_sources_2_chans[] = {
130 "CH1", "CH2",
131 "EXT", "AC Line",
132 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
133 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
134};
135
136static const char *trigger_sources_4_chans[] = {
137 "CH1", "CH2", "CH3", "CH4",
138 "EXT", "AC Line",
139 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
140 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
141};
142
143static const char *trigger_slopes[] = {
144 "r", "f",
145};
146
147static const char *coupling[] = {
148 "AC", "DC", "GND",
149};
150
151static const uint64_t probe_factor[] = {
152 1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
153};
154
155/* Do not change the order of entries */
156static const char *data_sources[] = {
157 "Live",
158 "Memory",
159 "Segmented",
160};
161
162static const struct rigol_ds_command std_cmd[] = {
163 { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
164 { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
165};
166
167static const struct rigol_ds_command mso7000a_cmd[] = {
168 { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
169 { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
170};
171
172enum vendor {
173 RIGOL,
174 AGILENT,
175};
176
177enum series {
178 VS5000,
179 DS1000,
180 DS2000,
181 DS2000A,
182 DSO1000,
183 DSO1000B,
184 DS1000Z,
185 DS4000,
186 MSO7000A,
187};
188
189/* short name, full name */
190static const struct rigol_ds_vendor supported_vendors[] = {
191 [RIGOL] = {"Rigol", "Rigol Technologies"},
192 [AGILENT] = {"Agilent", "Agilent Technologies"},
193};
194
195#define VENDOR(x) &supported_vendors[x]
196/* vendor, series/name, protocol, data format, max timebase, min vdiv,
197 * number of horizontal divs, live waveform samples, memory buffer samples */
198static const struct rigol_ds_series supported_series[] = {
199 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
200 {50, 1}, {2, 1000}, 14, 2048, 0},
201 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
202 {50, 1}, {2, 1000}, 12, 600, 1048576},
203 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
204 {500, 1}, {500, 1000000}, 14, 1400, 14000},
205 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
206 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
207 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
208 {50, 1}, {2, 1000}, 12, 600, 20480},
209 [DSO1000B] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
210 {50, 1}, {2, 1000}, 12, 600, 20480},
211 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
212 {50, 1}, {1, 1000}, 12, 1200, 12000000},
213 [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
214 {1000, 1}, {1, 1000}, 14, 1400, 0},
215 [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
216 {50, 1}, {2, 1000}, 10, 1000, 8000000},
217};
218
219#define SERIES(x) &supported_series[x]
220/*
221 * Use a macro to select the correct list of trigger sources and its length
222 * based on the number of analog channels and presence of digital channels.
223 */
224#define CH_INFO(num, digital) \
225 num, digital, trigger_sources_##num##_chans, \
226 digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
227/* series, model, min timebase, analog channels, digital */
228static const struct rigol_ds_model supported_models[] = {
229 {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
230 {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
231 {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
232 {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
233 {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
234 {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
235 {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
236 {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
237 {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
238 {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
239 {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
240 {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
241 {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
242 {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
243 {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
244 {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
245 {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
246 {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
247 {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
248 {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
249 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
250 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
251 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
252 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
253 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
254 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
255 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
256 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
257 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
258 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
259 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
260 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
261 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
262 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
263 {SERIES(DSO1000B), "DSO1052B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
264 {SERIES(DSO1000B), "DSO1072B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
265 {SERIES(DSO1000B), "DSO1102B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
266 {SERIES(DSO1000B), "DSO1152B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
267 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
268 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
269 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
270 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
271 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
272 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
273 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
274 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
275 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
276 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
277 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
278 {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
279 /* TODO: Digital channels are not yet supported on MSO7000A. */
280 {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
281};
282
283static struct sr_dev_driver rigol_ds_driver_info;
284
285static void clear_helper(struct dev_context *devc)
286{
287 unsigned int i;
288
289 g_free(devc->data);
290 g_free(devc->buffer);
291 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
292 g_free(devc->coupling[i]);
293 g_free(devc->trigger_source);
294 g_free(devc->trigger_slope);
295 g_free(devc->analog_groups);
296}
297
298static int dev_clear(const struct sr_dev_driver *di)
299{
300 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
301}
302
303static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
304{
305 struct dev_context *devc;
306 struct sr_dev_inst *sdi;
307 struct sr_scpi_hw_info *hw_info;
308 struct sr_channel *ch;
309 long n[3];
310 unsigned int i;
311 const struct rigol_ds_model *model = NULL;
312 gchar *channel_name, **version;
313
314 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
315 sr_info("Couldn't get IDN response, retrying.");
316 sr_scpi_close(scpi);
317 sr_scpi_open(scpi);
318 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
319 sr_info("Couldn't get IDN response.");
320 return NULL;
321 }
322 }
323
324 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
325 if (!g_ascii_strcasecmp(hw_info->manufacturer,
326 supported_models[i].series->vendor->full_name) &&
327 !strcmp(hw_info->model, supported_models[i].name)) {
328 model = &supported_models[i];
329 break;
330 }
331 }
332
333 if (!model) {
334 sr_scpi_hw_info_free(hw_info);
335 return NULL;
336 }
337
338 sdi = g_malloc0(sizeof(struct sr_dev_inst));
339 sdi->vendor = g_strdup(model->series->vendor->name);
340 sdi->model = g_strdup(model->name);
341 sdi->version = g_strdup(hw_info->firmware_version);
342 sdi->conn = scpi;
343 sdi->driver = &rigol_ds_driver_info;
344 sdi->inst_type = SR_INST_SCPI;
345 sdi->serial_num = g_strdup(hw_info->serial_number);
346 devc = g_malloc0(sizeof(struct dev_context));
347 devc->limit_frames = 0;
348 devc->model = model;
349 devc->format = model->series->format;
350
351 /* DS1000 models with firmware before 0.2.4 used the old data format. */
352 if (model->series == SERIES(DS1000)) {
353 version = g_strsplit(hw_info->firmware_version, ".", 0);
354 do {
355 if (!version[0] || !version[1] || !version[2])
356 break;
357 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
358 break;
359 for (i = 0; i < 3; i++) {
360 if (sr_atol(version[i], &n[i]) != SR_OK)
361 break;
362 }
363 if (i != 3)
364 break;
365 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
366 if (scpi->firmware_version < 24) {
367 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
368 devc->format = FORMAT_RAW;
369 }
370 break;
371 } while (0);
372 g_strfreev(version);
373 }
374
375 sr_scpi_hw_info_free(hw_info);
376
377 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
378 model->analog_channels);
379
380 for (i = 0; i < model->analog_channels; i++) {
381 channel_name = g_strdup_printf("CH%d", i + 1);
382 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
383
384 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
385
386 devc->analog_groups[i]->name = channel_name;
387 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
388 sdi->channel_groups = g_slist_append(sdi->channel_groups,
389 devc->analog_groups[i]);
390 }
391
392 if (devc->model->has_digital) {
393 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
394
395 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
396 channel_name = g_strdup_printf("D%d", i);
397 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
398 g_free(channel_name);
399 devc->digital_group->channels = g_slist_append(
400 devc->digital_group->channels, ch);
401 }
402 devc->digital_group->name = g_strdup("LA");
403 sdi->channel_groups = g_slist_append(sdi->channel_groups,
404 devc->digital_group);
405 }
406
407 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
408 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
409 devc->timebases = &timebases[i];
410 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
411 devc->num_timebases = &timebases[i] - devc->timebases + 1;
412 }
413
414 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
415 if (!memcmp(&devc->model->series->min_vdiv,
416 &vdivs[i], sizeof(uint64_t[2]))) {
417 devc->vdivs = &vdivs[i];
418 devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
419 }
420 }
421
422 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
423 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
424
425 devc->data_source = DATA_SOURCE_LIVE;
426
427 sdi->priv = devc;
428
429 return sdi;
430}
431
432static GSList *scan(struct sr_dev_driver *di, GSList *options)
433{
434 return sr_scpi_scan(di->context, options, probe_device);
435}
436
437static int dev_open(struct sr_dev_inst *sdi)
438{
439 int ret;
440 struct sr_scpi_dev_inst *scpi = sdi->conn;
441
442 if ((ret = sr_scpi_open(scpi)) < 0) {
443 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
444 return SR_ERR;
445 }
446
447 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
448 sr_err("Failed to get device config: %s.", sr_strerror(ret));
449 return SR_ERR;
450 }
451
452 return SR_OK;
453}
454
455static int dev_close(struct sr_dev_inst *sdi)
456{
457 struct sr_scpi_dev_inst *scpi;
458 struct dev_context *devc;
459
460 scpi = sdi->conn;
461 devc = sdi->priv;
462
463 if (!scpi)
464 return SR_ERR_BUG;
465
466 if (devc->model->series->protocol == PROTOCOL_V2)
467 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
468
469 return sr_scpi_close(scpi);
470}
471
472static int analog_frame_size(const struct sr_dev_inst *sdi)
473{
474 struct dev_context *devc = sdi->priv;
475 struct sr_channel *ch;
476 int analog_channels = 0;
477 GSList *l;
478
479 for (l = sdi->channels; l; l = l->next) {
480 ch = l->data;
481 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
482 analog_channels++;
483 }
484
485 if (analog_channels == 0)
486 return 0;
487
488 switch (devc->data_source) {
489 case DATA_SOURCE_LIVE:
490 return devc->model->series->live_samples;
491 case DATA_SOURCE_MEMORY:
492 return devc->model->series->buffer_samples / analog_channels;
493 default:
494 return 0;
495 }
496}
497
498static int digital_frame_size(const struct sr_dev_inst *sdi)
499{
500 struct dev_context *devc = sdi->priv;
501
502 switch (devc->data_source) {
503 case DATA_SOURCE_LIVE:
504 return devc->model->series->live_samples * 2;
505 case DATA_SOURCE_MEMORY:
506 return devc->model->series->buffer_samples * 2;
507 default:
508 return 0;
509 }
510}
511
512static int config_get(uint32_t key, GVariant **data,
513 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
514{
515 struct dev_context *devc;
516 struct sr_channel *ch;
517 const char *tmp_str;
518 uint64_t samplerate;
519 int analog_channel = -1;
520 float smallest_diff = INFINITY;
521 int idx = -1;
522 unsigned i;
523
524 if (!sdi)
525 return SR_ERR_ARG;
526
527 devc = sdi->priv;
528
529 /* If a channel group is specified, it must be a valid one. */
530 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
531 sr_err("Invalid channel group specified.");
532 return SR_ERR;
533 }
534
535 if (cg) {
536 ch = g_slist_nth_data(cg->channels, 0);
537 if (!ch)
538 return SR_ERR;
539 if (ch->type == SR_CHANNEL_ANALOG) {
540 if (ch->name[2] < '1' || ch->name[2] > '4')
541 return SR_ERR;
542 analog_channel = ch->name[2] - '1';
543 }
544 }
545
546 switch (key) {
547 case SR_CONF_NUM_HDIV:
548 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
549 break;
550 case SR_CONF_NUM_VDIV:
551 *data = g_variant_new_int32(devc->num_vdivs);
552 break;
553 case SR_CONF_DATA_SOURCE:
554 if (devc->data_source == DATA_SOURCE_LIVE)
555 *data = g_variant_new_string("Live");
556 else if (devc->data_source == DATA_SOURCE_MEMORY)
557 *data = g_variant_new_string("Memory");
558 else
559 *data = g_variant_new_string("Segmented");
560 break;
561 case SR_CONF_SAMPLERATE:
562 if (devc->data_source == DATA_SOURCE_LIVE) {
563 samplerate = analog_frame_size(sdi) /
564 (devc->timebase * devc->model->series->num_horizontal_divs);
565 *data = g_variant_new_uint64(samplerate);
566 } else {
567 sr_dbg("Unknown data source: %d.", devc->data_source);
568 return SR_ERR_NA;
569 }
570 break;
571 case SR_CONF_TRIGGER_SOURCE:
572 if (!strcmp(devc->trigger_source, "ACL"))
573 tmp_str = "AC Line";
574 else if (!strcmp(devc->trigger_source, "CHAN1"))
575 tmp_str = "CH1";
576 else if (!strcmp(devc->trigger_source, "CHAN2"))
577 tmp_str = "CH2";
578 else if (!strcmp(devc->trigger_source, "CHAN3"))
579 tmp_str = "CH3";
580 else if (!strcmp(devc->trigger_source, "CHAN4"))
581 tmp_str = "CH4";
582 else
583 tmp_str = devc->trigger_source;
584 *data = g_variant_new_string(tmp_str);
585 break;
586 case SR_CONF_TRIGGER_SLOPE:
587 if (!strncmp(devc->trigger_slope, "POS", 3)) {
588 tmp_str = "r";
589 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
590 tmp_str = "f";
591 } else {
592 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
593 return SR_ERR_NA;
594 }
595 *data = g_variant_new_string(tmp_str);
596 break;
597 case SR_CONF_TRIGGER_LEVEL:
598 *data = g_variant_new_double(devc->trigger_level);
599 break;
600 case SR_CONF_TIMEBASE:
601 for (i = 0; i < devc->num_timebases; i++) {
602 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
603 float diff = fabs(devc->timebase - tb);
604 if (diff < smallest_diff) {
605 smallest_diff = diff;
606 idx = i;
607 }
608 }
609 if (idx < 0) {
610 sr_dbg("Negative timebase index: %d.", idx);
611 return SR_ERR_NA;
612 }
613 *data = g_variant_new("(tt)", devc->timebases[idx][0],
614 devc->timebases[idx][1]);
615 break;
616 case SR_CONF_VDIV:
617 if (analog_channel < 0) {
618 sr_dbg("Negative analog channel: %d.", analog_channel);
619 return SR_ERR_NA;
620 }
621 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
622 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
623 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
624 if (diff < smallest_diff) {
625 smallest_diff = diff;
626 idx = i;
627 }
628 }
629 if (idx < 0) {
630 sr_dbg("Negative vdiv index: %d.", idx);
631 return SR_ERR_NA;
632 }
633 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
634 break;
635 case SR_CONF_COUPLING:
636 if (analog_channel < 0) {
637 sr_dbg("Negative analog channel: %d.", analog_channel);
638 return SR_ERR_NA;
639 }
640 *data = g_variant_new_string(devc->coupling[analog_channel]);
641 break;
642 case SR_CONF_PROBE_FACTOR:
643 if (analog_channel < 0) {
644 sr_dbg("Negative analog channel: %d.", analog_channel);
645 return SR_ERR_NA;
646 }
647 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
648 break;
649 default:
650 return SR_ERR_NA;
651 }
652
653 return SR_OK;
654}
655
656static int config_set(uint32_t key, GVariant *data,
657 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
658{
659 struct dev_context *devc;
660 uint64_t p;
661 double t_dbl;
662 int ret, idx, i;
663 const char *tmp_str;
664 char buffer[16];
665
666 devc = sdi->priv;
667
668 /* If a channel group is specified, it must be a valid one. */
669 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
670 sr_err("Invalid channel group specified.");
671 return SR_ERR;
672 }
673
674 switch (key) {
675 case SR_CONF_LIMIT_FRAMES:
676 devc->limit_frames = g_variant_get_uint64(data);
677 break;
678 case SR_CONF_TRIGGER_SLOPE:
679 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
680 return SR_ERR_ARG;
681 g_free(devc->trigger_slope);
682 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
683 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
684 case SR_CONF_HORIZ_TRIGGERPOS:
685 t_dbl = g_variant_get_double(data);
686 if (t_dbl < 0.0 || t_dbl > 1.0) {
687 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
688 return SR_ERR;
689 }
690 devc->horiz_triggerpos = t_dbl;
691 /* We have the trigger offset as a percentage of the frame, but
692 * need to express this in seconds. */
693 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
694 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
695 return rigol_ds_config_set(sdi,
696 devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
697 case SR_CONF_TRIGGER_LEVEL:
698 t_dbl = g_variant_get_double(data);
699 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
700 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
701 if (ret == SR_OK)
702 devc->trigger_level = t_dbl;
703 return ret;
704 case SR_CONF_TIMEBASE:
705 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
706 return SR_ERR_ARG;
707 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
708 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
709 devc->timebase);
710 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
711 case SR_CONF_TRIGGER_SOURCE:
712 if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0)
713 return SR_ERR_ARG;
714 g_free(devc->trigger_source);
715 devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]);
716 if (!strcmp(devc->trigger_source, "AC Line"))
717 tmp_str = "ACL";
718 else if (!strcmp(devc->trigger_source, "CH1"))
719 tmp_str = "CHAN1";
720 else if (!strcmp(devc->trigger_source, "CH2"))
721 tmp_str = "CHAN2";
722 else if (!strcmp(devc->trigger_source, "CH3"))
723 tmp_str = "CHAN3";
724 else if (!strcmp(devc->trigger_source, "CH4"))
725 tmp_str = "CHAN4";
726 else
727 tmp_str = (char *)devc->trigger_source;
728 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
729 case SR_CONF_VDIV:
730 if (!cg)
731 return SR_ERR_CHANNEL_GROUP;
732 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
733 return SR_ERR_ARG;
734 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
735 return SR_ERR_ARG;
736 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
737 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
738 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
739 case SR_CONF_COUPLING:
740 if (!cg)
741 return SR_ERR_CHANNEL_GROUP;
742 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
743 return SR_ERR_ARG;
744 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
745 return SR_ERR_ARG;
746 g_free(devc->coupling[i]);
747 devc->coupling[i] = g_strdup(coupling[idx]);
748 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
749 case SR_CONF_PROBE_FACTOR:
750 if (!cg)
751 return SR_ERR_CHANNEL_GROUP;
752 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
753 return SR_ERR_ARG;
754 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
755 return SR_ERR_ARG;
756 p = g_variant_get_uint64(data);
757 devc->attenuation[i] = probe_factor[idx];
758 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
759 if (ret == SR_OK)
760 rigol_ds_get_dev_cfg_vertical(sdi);
761 return ret;
762 case SR_CONF_DATA_SOURCE:
763 tmp_str = g_variant_get_string(data, NULL);
764 if (!strcmp(tmp_str, "Live"))
765 devc->data_source = DATA_SOURCE_LIVE;
766 else if (devc->model->series->protocol >= PROTOCOL_V2
767 && !strcmp(tmp_str, "Memory"))
768 devc->data_source = DATA_SOURCE_MEMORY;
769 else if (devc->model->series->protocol >= PROTOCOL_V3
770 && !strcmp(tmp_str, "Segmented"))
771 devc->data_source = DATA_SOURCE_SEGMENTED;
772 else {
773 sr_err("Unknown data source: '%s'.", tmp_str);
774 return SR_ERR;
775 }
776 break;
777 default:
778 return SR_ERR_NA;
779 }
780
781 return SR_OK;
782}
783
784static int config_list(uint32_t key, GVariant **data,
785 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
786{
787 struct dev_context *devc;
788
789 devc = (sdi) ? sdi->priv : NULL;
790
791 switch (key) {
792 case SR_CONF_SCAN_OPTIONS:
793 case SR_CONF_DEVICE_OPTIONS:
794 if (!cg)
795 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
796 if (!devc)
797 return SR_ERR_ARG;
798 if (cg == devc->digital_group) {
799 *data = std_gvar_array_u32(NULL, 0);
800 return SR_OK;
801 } else {
802 if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
803 return SR_ERR_ARG;
804 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
805 return SR_OK;
806 }
807 break;
808 case SR_CONF_COUPLING:
809 if (!cg)
810 return SR_ERR_CHANNEL_GROUP;
811 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
812 break;
813 case SR_CONF_PROBE_FACTOR:
814 if (!cg)
815 return SR_ERR_CHANNEL_GROUP;
816 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
817 break;
818 case SR_CONF_VDIV:
819 if (!devc)
820 /* Can't know this until we have the exact model. */
821 return SR_ERR_ARG;
822 if (!cg)
823 return SR_ERR_CHANNEL_GROUP;
824 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
825 break;
826 case SR_CONF_TIMEBASE:
827 if (!devc)
828 /* Can't know this until we have the exact model. */
829 return SR_ERR_ARG;
830 if (devc->num_timebases <= 0)
831 return SR_ERR_NA;
832 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
833 break;
834 case SR_CONF_TRIGGER_SOURCE:
835 if (!devc)
836 /* Can't know this until we have the exact model. */
837 return SR_ERR_ARG;
838 *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources);
839 break;
840 case SR_CONF_TRIGGER_SLOPE:
841 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
842 break;
843 case SR_CONF_DATA_SOURCE:
844 if (!devc)
845 /* Can't know this until we have the exact model. */
846 return SR_ERR_ARG;
847 switch (devc->model->series->protocol) {
848 case PROTOCOL_V1:
849 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
850 break;
851 case PROTOCOL_V2:
852 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
853 break;
854 default:
855 *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
856 break;
857 }
858 break;
859 default:
860 return SR_ERR_NA;
861 }
862
863 return SR_OK;
864}
865
866static int dev_acquisition_start(const struct sr_dev_inst *sdi)
867{
868 struct sr_scpi_dev_inst *scpi;
869 struct dev_context *devc;
870 struct sr_channel *ch;
871 struct sr_datafeed_packet packet;
872 gboolean some_digital;
873 GSList *l;
874
875 scpi = sdi->conn;
876 devc = sdi->priv;
877
878 devc->num_frames = 0;
879
880 some_digital = FALSE;
881 for (l = sdi->channels; l; l = l->next) {
882 ch = l->data;
883 sr_dbg("handling channel %s", ch->name);
884 if (ch->type == SR_CHANNEL_ANALOG) {
885 if (ch->enabled)
886 devc->enabled_channels = g_slist_append(
887 devc->enabled_channels, ch);
888 if (ch->enabled != devc->analog_channels[ch->index]) {
889 /* Enabled channel is currently disabled, or vice versa. */
890 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
891 ch->enabled ? "ON" : "OFF") != SR_OK)
892 return SR_ERR;
893 devc->analog_channels[ch->index] = ch->enabled;
894 }
895 } else if (ch->type == SR_CHANNEL_LOGIC) {
896 /* Only one list entry for older protocols. All channels are
897 * retrieved together when this entry is processed. */
898 if (ch->enabled && (
899 devc->model->series->protocol > PROTOCOL_V3 ||
900 !some_digital))
901 devc->enabled_channels = g_slist_append(
902 devc->enabled_channels, ch);
903 if (ch->enabled) {
904 some_digital = TRUE;
905 /* Turn on LA module if currently off. */
906 if (!devc->la_enabled) {
907 if (rigol_ds_config_set(sdi,
908 devc->model->series->protocol >= PROTOCOL_V3 ?
909 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
910 return SR_ERR;
911 devc->la_enabled = TRUE;
912 }
913 }
914 if (ch->enabled != devc->digital_channels[ch->index]) {
915 /* Enabled channel is currently disabled, or vice versa. */
916 if (rigol_ds_config_set(sdi,
917 devc->model->series->protocol >= PROTOCOL_V3 ?
918 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
919 ch->enabled ? "ON" : "OFF") != SR_OK)
920 return SR_ERR;
921 devc->digital_channels[ch->index] = ch->enabled;
922 }
923 }
924 }
925
926 if (!devc->enabled_channels)
927 return SR_ERR;
928
929 /* Turn off LA module if on and no digital channels selected. */
930 if (devc->la_enabled && !some_digital)
931 if (rigol_ds_config_set(sdi,
932 devc->model->series->protocol >= PROTOCOL_V3 ?
933 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
934 return SR_ERR;
935
936 /* Set memory mode. */
937 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
938 sr_err("Data source 'Segmented' not yet supported");
939 return SR_ERR;
940 }
941
942 devc->analog_frame_size = analog_frame_size(sdi);
943 devc->digital_frame_size = digital_frame_size(sdi);
944
945 switch (devc->model->series->protocol) {
946 case PROTOCOL_V2:
947 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
948 return SR_ERR;
949 break;
950 case PROTOCOL_V3:
951 /* Apparently for the DS2000 the memory
952 * depth can only be set in Running state -
953 * this matches the behaviour of the UI. */
954 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
955 return SR_ERR;
956 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
957 devc->analog_frame_size) != SR_OK)
958 return SR_ERR;
959 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
960 return SR_ERR;
961 break;
962 default:
963 break;
964 }
965
966 if (devc->data_source == DATA_SOURCE_LIVE)
967 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
968 return SR_ERR;
969
970 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
971 rigol_ds_receive, (void *)sdi);
972
973 std_session_send_df_header(sdi);
974
975 devc->channel_entry = devc->enabled_channels;
976
977 if (rigol_ds_capture_start(sdi) != SR_OK)
978 return SR_ERR;
979
980 /* Start of first frame. */
981 packet.type = SR_DF_FRAME_BEGIN;
982 sr_session_send(sdi, &packet);
983
984 return SR_OK;
985}
986
987static int dev_acquisition_stop(struct sr_dev_inst *sdi)
988{
989 struct dev_context *devc;
990 struct sr_scpi_dev_inst *scpi;
991
992 devc = sdi->priv;
993
994 std_session_send_df_end(sdi);
995
996 g_slist_free(devc->enabled_channels);
997 devc->enabled_channels = NULL;
998 scpi = sdi->conn;
999 sr_scpi_source_remove(sdi->session, scpi);
1000
1001 return SR_OK;
1002}
1003
1004static struct sr_dev_driver rigol_ds_driver_info = {
1005 .name = "rigol-ds",
1006 .longname = "Rigol DS",
1007 .api_version = 1,
1008 .init = std_init,
1009 .cleanup = std_cleanup,
1010 .scan = scan,
1011 .dev_list = std_dev_list,
1012 .dev_clear = dev_clear,
1013 .config_get = config_get,
1014 .config_set = config_set,
1015 .config_list = config_list,
1016 .dev_open = dev_open,
1017 .dev_close = dev_close,
1018 .dev_acquisition_start = dev_acquisition_start,
1019 .dev_acquisition_stop = dev_acquisition_stop,
1020 .context = NULL,
1021};
1022SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib