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rigol-ds: silence potential NULL dereference compiler warning
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM,
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t devopts_cg_analog[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129static const char *trigger_sources[] = {
130 "CH1", "CH2", "CH3", "CH4",
131 "EXT", "AC Line",
132 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
133 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
134};
135
136static const char *trigger_slopes[] = {
137 "r", "f",
138};
139
140static const char *coupling[] = {
141 "AC", "DC", "GND",
142};
143
144static const uint64_t probe_factor[] = {
145 1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
146};
147
148/* Do not change the order of entries */
149static const char *data_sources[] = {
150 "Live",
151 "Memory",
152 "Segmented",
153};
154
155enum vendor {
156 RIGOL,
157 AGILENT,
158};
159
160enum series {
161 VS5000,
162 DS1000,
163 DS2000,
164 DS2000A,
165 DSO1000,
166 DS1000Z,
167};
168
169/* short name, full name */
170static const struct rigol_ds_vendor supported_vendors[] = {
171 [RIGOL] = {"Rigol", "Rigol Technologies"},
172 [AGILENT] = {"Agilent", "Agilent Technologies"},
173};
174
175#define VENDOR(x) &supported_vendors[x]
176/* vendor, series/name, protocol, data format, max timebase, min vdiv,
177 * number of horizontal divs, live waveform samples, memory buffer samples */
178static const struct rigol_ds_series supported_series[] = {
179 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
180 {50, 1}, {2, 1000}, 14, 2048, 0},
181 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
182 {50, 1}, {2, 1000}, 12, 600, 1048576},
183 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
184 {500, 1}, {500, 1000000}, 14, 1400, 14000},
185 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
186 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
187 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
188 {50, 1}, {2, 1000}, 12, 600, 20480},
189 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
190 {50, 1}, {1, 1000}, 12, 1200, 12000000},
191};
192
193#define SERIES(x) &supported_series[x]
194/* series, model, min timebase, analog channels, digital */
195static const struct rigol_ds_model supported_models[] = {
196 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
197 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
198 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
199 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
200 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
201 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
202 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
203 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
204 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
205 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
206 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
207 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
208 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
209 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
210 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
211 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
212 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
213 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
214 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
215 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
216 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
217 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
218 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
219 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
220 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true},
221 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true},
222 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true},
223 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true},
224 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
225 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
226 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
227 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
228 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
229 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
230 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
231 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
232 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
233 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
234 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
235 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
236 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
237 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
238 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
239 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
240 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
241};
242
243static struct sr_dev_driver rigol_ds_driver_info;
244
245static void clear_helper(struct dev_context *devc)
246{
247 unsigned int i;
248
249 g_free(devc->data);
250 g_free(devc->buffer);
251 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
252 g_free(devc->coupling[i]);
253 g_free(devc->trigger_source);
254 g_free(devc->trigger_slope);
255 g_free(devc->analog_groups);
256}
257
258static int dev_clear(const struct sr_dev_driver *di)
259{
260 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
261}
262
263static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
264{
265 struct dev_context *devc;
266 struct sr_dev_inst *sdi;
267 struct sr_scpi_hw_info *hw_info;
268 struct sr_channel *ch;
269 long n[3];
270 unsigned int i;
271 const struct rigol_ds_model *model = NULL;
272 gchar *channel_name, **version;
273
274 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
275 sr_info("Couldn't get IDN response, retrying.");
276 sr_scpi_close(scpi);
277 sr_scpi_open(scpi);
278 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
279 sr_info("Couldn't get IDN response.");
280 return NULL;
281 }
282 }
283
284 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
285 if (!g_ascii_strcasecmp(hw_info->manufacturer,
286 supported_models[i].series->vendor->full_name) &&
287 !strcmp(hw_info->model, supported_models[i].name)) {
288 model = &supported_models[i];
289 break;
290 }
291 }
292
293 if (!model) {
294 sr_scpi_hw_info_free(hw_info);
295 return NULL;
296 }
297
298 sdi = g_malloc0(sizeof(struct sr_dev_inst));
299 sdi->vendor = g_strdup(model->series->vendor->name);
300 sdi->model = g_strdup(model->name);
301 sdi->version = g_strdup(hw_info->firmware_version);
302 sdi->conn = scpi;
303 sdi->driver = &rigol_ds_driver_info;
304 sdi->inst_type = SR_INST_SCPI;
305 sdi->serial_num = g_strdup(hw_info->serial_number);
306 devc = g_malloc0(sizeof(struct dev_context));
307 devc->limit_frames = 0;
308 devc->model = model;
309 devc->format = model->series->format;
310
311 /* DS1000 models with firmware before 0.2.4 used the old data format. */
312 if (model->series == SERIES(DS1000)) {
313 version = g_strsplit(hw_info->firmware_version, ".", 0);
314 do {
315 if (!version[0] || !version[1] || !version[2])
316 break;
317 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
318 break;
319 for (i = 0; i < 3; i++) {
320 if (sr_atol(version[i], &n[i]) != SR_OK)
321 break;
322 }
323 if (i != 3)
324 break;
325 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
326 if (scpi->firmware_version < 24) {
327 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
328 devc->format = FORMAT_RAW;
329 }
330 break;
331 } while (0);
332 g_strfreev(version);
333 }
334
335 sr_scpi_hw_info_free(hw_info);
336
337 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
338 model->analog_channels);
339
340 for (i = 0; i < model->analog_channels; i++) {
341 channel_name = g_strdup_printf("CH%d", i + 1);
342 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
343
344 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
345
346 devc->analog_groups[i]->name = channel_name;
347 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
348 sdi->channel_groups = g_slist_append(sdi->channel_groups,
349 devc->analog_groups[i]);
350 }
351
352 if (devc->model->has_digital) {
353 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
354
355 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
356 channel_name = g_strdup_printf("D%d", i);
357 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
358 g_free(channel_name);
359 devc->digital_group->channels = g_slist_append(
360 devc->digital_group->channels, ch);
361 }
362 devc->digital_group->name = g_strdup("LA");
363 sdi->channel_groups = g_slist_append(sdi->channel_groups,
364 devc->digital_group);
365 }
366
367 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
368 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
369 devc->timebases = &timebases[i];
370 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
371 devc->num_timebases = &timebases[i] - devc->timebases + 1;
372 }
373
374 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
375 if (!memcmp(&devc->model->series->min_vdiv,
376 &vdivs[i], sizeof(uint64_t[2]))) {
377 devc->vdivs = &vdivs[i];
378 devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
379 }
380 }
381
382 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
383 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
384
385 devc->data_source = DATA_SOURCE_LIVE;
386
387 sdi->priv = devc;
388
389 return sdi;
390}
391
392static GSList *scan(struct sr_dev_driver *di, GSList *options)
393{
394 return sr_scpi_scan(di->context, options, probe_device);
395}
396
397static int dev_open(struct sr_dev_inst *sdi)
398{
399 int ret;
400 struct sr_scpi_dev_inst *scpi = sdi->conn;
401
402 if ((ret = sr_scpi_open(scpi)) < 0) {
403 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
404 return SR_ERR;
405 }
406
407 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
408 sr_err("Failed to get device config: %s.", sr_strerror(ret));
409 return SR_ERR;
410 }
411
412 return SR_OK;
413}
414
415static int dev_close(struct sr_dev_inst *sdi)
416{
417 struct sr_scpi_dev_inst *scpi;
418 struct dev_context *devc;
419
420 scpi = sdi->conn;
421 devc = sdi->priv;
422
423 if (!scpi)
424 return SR_ERR_BUG;
425
426 if (devc->model->series->protocol == PROTOCOL_V2)
427 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
428
429 return sr_scpi_close(scpi);
430}
431
432static int analog_frame_size(const struct sr_dev_inst *sdi)
433{
434 struct dev_context *devc = sdi->priv;
435 struct sr_channel *ch;
436 int analog_channels = 0;
437 GSList *l;
438
439 for (l = sdi->channels; l; l = l->next) {
440 ch = l->data;
441 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
442 analog_channels++;
443 }
444
445 if (analog_channels == 0)
446 return 0;
447
448 switch (devc->data_source) {
449 case DATA_SOURCE_LIVE:
450 return devc->model->series->live_samples;
451 case DATA_SOURCE_MEMORY:
452 return devc->model->series->buffer_samples / analog_channels;
453 default:
454 return 0;
455 }
456}
457
458static int digital_frame_size(const struct sr_dev_inst *sdi)
459{
460 struct dev_context *devc = sdi->priv;
461
462 switch (devc->data_source) {
463 case DATA_SOURCE_LIVE:
464 return devc->model->series->live_samples * 2;
465 case DATA_SOURCE_MEMORY:
466 return devc->model->series->buffer_samples * 2;
467 default:
468 return 0;
469 }
470}
471
472static int config_get(uint32_t key, GVariant **data,
473 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
474{
475 struct dev_context *devc;
476 struct sr_channel *ch;
477 const char *tmp_str;
478 uint64_t samplerate;
479 int analog_channel = -1;
480 float smallest_diff = INFINITY;
481 int idx = -1;
482 unsigned i;
483
484 if (!sdi)
485 return SR_ERR_ARG;
486
487 devc = sdi->priv;
488
489 /* If a channel group is specified, it must be a valid one. */
490 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
491 sr_err("Invalid channel group specified.");
492 return SR_ERR;
493 }
494
495 if (cg) {
496 ch = g_slist_nth_data(cg->channels, 0);
497 if (!ch)
498 return SR_ERR;
499 if (ch->type == SR_CHANNEL_ANALOG) {
500 if (ch->name[2] < '1' || ch->name[2] > '4')
501 return SR_ERR;
502 analog_channel = ch->name[2] - '1';
503 }
504 }
505
506 switch (key) {
507 case SR_CONF_NUM_HDIV:
508 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
509 break;
510 case SR_CONF_NUM_VDIV:
511 *data = g_variant_new_int32(devc->num_vdivs);
512 break;
513 case SR_CONF_DATA_SOURCE:
514 if (devc->data_source == DATA_SOURCE_LIVE)
515 *data = g_variant_new_string("Live");
516 else if (devc->data_source == DATA_SOURCE_MEMORY)
517 *data = g_variant_new_string("Memory");
518 else
519 *data = g_variant_new_string("Segmented");
520 break;
521 case SR_CONF_SAMPLERATE:
522 if (devc->data_source == DATA_SOURCE_LIVE) {
523 samplerate = analog_frame_size(sdi) /
524 (devc->timebase * devc->model->series->num_horizontal_divs);
525 *data = g_variant_new_uint64(samplerate);
526 } else {
527 sr_dbg("Unknown data source: %d.", devc->data_source);
528 return SR_ERR_NA;
529 }
530 break;
531 case SR_CONF_TRIGGER_SOURCE:
532 if (!strcmp(devc->trigger_source, "ACL"))
533 tmp_str = "AC Line";
534 else if (!strcmp(devc->trigger_source, "CHAN1"))
535 tmp_str = "CH1";
536 else if (!strcmp(devc->trigger_source, "CHAN2"))
537 tmp_str = "CH2";
538 else if (!strcmp(devc->trigger_source, "CHAN3"))
539 tmp_str = "CH3";
540 else if (!strcmp(devc->trigger_source, "CHAN4"))
541 tmp_str = "CH4";
542 else
543 tmp_str = devc->trigger_source;
544 *data = g_variant_new_string(tmp_str);
545 break;
546 case SR_CONF_TRIGGER_SLOPE:
547 if (!strncmp(devc->trigger_slope, "POS", 3)) {
548 tmp_str = "r";
549 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
550 tmp_str = "f";
551 } else {
552 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
553 return SR_ERR_NA;
554 }
555 *data = g_variant_new_string(tmp_str);
556 break;
557 case SR_CONF_TRIGGER_LEVEL:
558 *data = g_variant_new_double(devc->trigger_level);
559 break;
560 case SR_CONF_TIMEBASE:
561 for (i = 0; i < devc->num_timebases; i++) {
562 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
563 float diff = fabs(devc->timebase - tb);
564 if (diff < smallest_diff) {
565 smallest_diff = diff;
566 idx = i;
567 }
568 }
569 if (idx < 0) {
570 sr_dbg("Negative timebase index: %d.", idx);
571 return SR_ERR_NA;
572 }
573 *data = g_variant_new("(tt)", devc->timebases[idx][0],
574 devc->timebases[idx][1]);
575 break;
576 case SR_CONF_VDIV:
577 if (analog_channel < 0) {
578 sr_dbg("Negative analog channel: %d.", analog_channel);
579 return SR_ERR_NA;
580 }
581 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
582 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
583 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
584 if (diff < smallest_diff) {
585 smallest_diff = diff;
586 idx = i;
587 }
588 }
589 if (idx < 0) {
590 sr_dbg("Negative vdiv index: %d.", idx);
591 return SR_ERR_NA;
592 }
593 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
594 break;
595 case SR_CONF_COUPLING:
596 if (analog_channel < 0) {
597 sr_dbg("Negative analog channel: %d.", analog_channel);
598 return SR_ERR_NA;
599 }
600 *data = g_variant_new_string(devc->coupling[analog_channel]);
601 break;
602 case SR_CONF_PROBE_FACTOR:
603 if (analog_channel < 0) {
604 sr_dbg("Negative analog channel: %d.", analog_channel);
605 return SR_ERR_NA;
606 }
607 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
608 break;
609 default:
610 return SR_ERR_NA;
611 }
612
613 return SR_OK;
614}
615
616static int config_set(uint32_t key, GVariant *data,
617 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
618{
619 struct dev_context *devc;
620 uint64_t p;
621 double t_dbl;
622 int ret, idx, i;
623 const char *tmp_str;
624 char buffer[16];
625
626 devc = sdi->priv;
627
628 /* If a channel group is specified, it must be a valid one. */
629 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
630 sr_err("Invalid channel group specified.");
631 return SR_ERR;
632 }
633
634 switch (key) {
635 case SR_CONF_LIMIT_FRAMES:
636 devc->limit_frames = g_variant_get_uint64(data);
637 break;
638 case SR_CONF_TRIGGER_SLOPE:
639 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
640 return SR_ERR_ARG;
641 g_free(devc->trigger_slope);
642 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
643 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
644 case SR_CONF_HORIZ_TRIGGERPOS:
645 t_dbl = g_variant_get_double(data);
646 if (t_dbl < 0.0 || t_dbl > 1.0) {
647 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
648 return SR_ERR;
649 }
650 devc->horiz_triggerpos = t_dbl;
651 /* We have the trigger offset as a percentage of the frame, but
652 * need to express this in seconds. */
653 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
654 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
655 return rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
656 case SR_CONF_TRIGGER_LEVEL:
657 t_dbl = g_variant_get_double(data);
658 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
659 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
660 if (ret == SR_OK)
661 devc->trigger_level = t_dbl;
662 return ret;
663 case SR_CONF_TIMEBASE:
664 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
665 return SR_ERR_ARG;
666 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
667 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
668 devc->timebase);
669 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
670 case SR_CONF_TRIGGER_SOURCE:
671 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_sources))) < 0)
672 return SR_ERR_ARG;
673 g_free(devc->trigger_source);
674 devc->trigger_source = g_strdup(trigger_sources[idx]);
675 if (!strcmp(devc->trigger_source, "AC Line"))
676 tmp_str = "ACL";
677 else if (!strcmp(devc->trigger_source, "CH1"))
678 tmp_str = "CHAN1";
679 else if (!strcmp(devc->trigger_source, "CH2"))
680 tmp_str = "CHAN2";
681 else if (!strcmp(devc->trigger_source, "CH3"))
682 tmp_str = "CHAN3";
683 else if (!strcmp(devc->trigger_source, "CH4"))
684 tmp_str = "CHAN4";
685 else
686 tmp_str = (char *)devc->trigger_source;
687 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
688 case SR_CONF_VDIV:
689 if (!cg)
690 return SR_ERR_CHANNEL_GROUP;
691 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
692 return SR_ERR_ARG;
693 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
694 return SR_ERR_ARG;
695 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
696 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
697 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
698 case SR_CONF_COUPLING:
699 if (!cg)
700 return SR_ERR_CHANNEL_GROUP;
701 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
702 return SR_ERR_ARG;
703 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
704 return SR_ERR_ARG;
705 g_free(devc->coupling[i]);
706 devc->coupling[i] = g_strdup(coupling[idx]);
707 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
708 case SR_CONF_PROBE_FACTOR:
709 if (!cg)
710 return SR_ERR_CHANNEL_GROUP;
711 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
712 return SR_ERR_ARG;
713 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
714 return SR_ERR_ARG;
715 p = g_variant_get_uint64(data);
716 devc->attenuation[i] = probe_factor[idx];
717 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
718 if (ret == SR_OK)
719 rigol_ds_get_dev_cfg_vertical(sdi);
720 return ret;
721 case SR_CONF_DATA_SOURCE:
722 tmp_str = g_variant_get_string(data, NULL);
723 if (!strcmp(tmp_str, "Live"))
724 devc->data_source = DATA_SOURCE_LIVE;
725 else if (devc->model->series->protocol >= PROTOCOL_V2
726 && !strcmp(tmp_str, "Memory"))
727 devc->data_source = DATA_SOURCE_MEMORY;
728 else if (devc->model->series->protocol >= PROTOCOL_V3
729 && !strcmp(tmp_str, "Segmented"))
730 devc->data_source = DATA_SOURCE_SEGMENTED;
731 else {
732 sr_err("Unknown data source: '%s'.", tmp_str);
733 return SR_ERR;
734 }
735 break;
736 default:
737 return SR_ERR_NA;
738 }
739
740 return SR_OK;
741}
742
743static int config_list(uint32_t key, GVariant **data,
744 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
745{
746 struct dev_context *devc;
747
748 devc = (sdi) ? sdi->priv : NULL;
749
750 switch (key) {
751 case SR_CONF_SCAN_OPTIONS:
752 case SR_CONF_DEVICE_OPTIONS:
753 if (!cg)
754 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
755 if (!devc)
756 return SR_ERR_ARG;
757 if (cg == devc->digital_group) {
758 *data = std_gvar_array_u32(NULL, 0);
759 return SR_OK;
760 } else {
761 if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
762 return SR_ERR_ARG;
763 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
764 return SR_OK;
765 }
766 break;
767 case SR_CONF_COUPLING:
768 if (!cg)
769 return SR_ERR_CHANNEL_GROUP;
770 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
771 break;
772 case SR_CONF_PROBE_FACTOR:
773 if (!cg)
774 return SR_ERR_CHANNEL_GROUP;
775 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
776 break;
777 case SR_CONF_VDIV:
778 if (!devc)
779 /* Can't know this until we have the exact model. */
780 return SR_ERR_ARG;
781 if (!cg)
782 return SR_ERR_CHANNEL_GROUP;
783 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
784 break;
785 case SR_CONF_TIMEBASE:
786 if (!devc)
787 /* Can't know this until we have the exact model. */
788 return SR_ERR_ARG;
789 if (devc->num_timebases <= 0)
790 return SR_ERR_NA;
791 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
792 break;
793 case SR_CONF_TRIGGER_SOURCE:
794 if (!devc)
795 /* Can't know this until we have the exact model. */
796 return SR_ERR_ARG;
797 *data = g_variant_new_strv(trigger_sources,
798 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
799 break;
800 case SR_CONF_TRIGGER_SLOPE:
801 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
802 break;
803 case SR_CONF_DATA_SOURCE:
804 if (!devc)
805 /* Can't know this until we have the exact model. */
806 return SR_ERR_ARG;
807 switch (devc->model->series->protocol) {
808 case PROTOCOL_V1:
809 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
810 break;
811 case PROTOCOL_V2:
812 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
813 break;
814 default:
815 *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
816 break;
817 }
818 break;
819 default:
820 return SR_ERR_NA;
821 }
822
823 return SR_OK;
824}
825
826static int dev_acquisition_start(const struct sr_dev_inst *sdi)
827{
828 struct sr_scpi_dev_inst *scpi;
829 struct dev_context *devc;
830 struct sr_channel *ch;
831 struct sr_datafeed_packet packet;
832 gboolean some_digital;
833 GSList *l;
834
835 scpi = sdi->conn;
836 devc = sdi->priv;
837
838 devc->num_frames = 0;
839
840 some_digital = FALSE;
841 for (l = sdi->channels; l; l = l->next) {
842 ch = l->data;
843 sr_dbg("handling channel %s", ch->name);
844 if (ch->type == SR_CHANNEL_ANALOG) {
845 if (ch->enabled)
846 devc->enabled_channels = g_slist_append(
847 devc->enabled_channels, ch);
848 if (ch->enabled != devc->analog_channels[ch->index]) {
849 /* Enabled channel is currently disabled, or vice versa. */
850 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
851 ch->enabled ? "ON" : "OFF") != SR_OK)
852 return SR_ERR;
853 devc->analog_channels[ch->index] = ch->enabled;
854 }
855 } else if (ch->type == SR_CHANNEL_LOGIC) {
856 /* Only one list entry for older protocols. All channels are
857 * retrieved together when this entry is processed. */
858 if (ch->enabled && (
859 devc->model->series->protocol > PROTOCOL_V3 ||
860 !some_digital))
861 devc->enabled_channels = g_slist_append(
862 devc->enabled_channels, ch);
863 if (ch->enabled) {
864 some_digital = TRUE;
865 /* Turn on LA module if currently off. */
866 if (!devc->la_enabled) {
867 if (rigol_ds_config_set(sdi,
868 devc->model->series->protocol >= PROTOCOL_V3 ?
869 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
870 return SR_ERR;
871 devc->la_enabled = TRUE;
872 }
873 }
874 if (ch->enabled != devc->digital_channels[ch->index]) {
875 /* Enabled channel is currently disabled, or vice versa. */
876 if (rigol_ds_config_set(sdi,
877 devc->model->series->protocol >= PROTOCOL_V3 ?
878 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
879 ch->enabled ? "ON" : "OFF") != SR_OK)
880 return SR_ERR;
881 devc->digital_channels[ch->index] = ch->enabled;
882 }
883 }
884 }
885
886 if (!devc->enabled_channels)
887 return SR_ERR;
888
889 /* Turn off LA module if on and no digital channels selected. */
890 if (devc->la_enabled && !some_digital)
891 if (rigol_ds_config_set(sdi,
892 devc->model->series->protocol >= PROTOCOL_V3 ?
893 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
894 return SR_ERR;
895
896 /* Set memory mode. */
897 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
898 sr_err("Data source 'Segmented' not yet supported");
899 return SR_ERR;
900 }
901
902 devc->analog_frame_size = analog_frame_size(sdi);
903 devc->digital_frame_size = digital_frame_size(sdi);
904
905 switch (devc->model->series->protocol) {
906 case PROTOCOL_V2:
907 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
908 return SR_ERR;
909 break;
910 case PROTOCOL_V3:
911 /* Apparently for the DS2000 the memory
912 * depth can only be set in Running state -
913 * this matches the behaviour of the UI. */
914 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
915 return SR_ERR;
916 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
917 devc->analog_frame_size) != SR_OK)
918 return SR_ERR;
919 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
920 return SR_ERR;
921 break;
922 default:
923 break;
924 }
925
926 if (devc->data_source == DATA_SOURCE_LIVE)
927 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
928 return SR_ERR;
929
930 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
931 rigol_ds_receive, (void *)sdi);
932
933 std_session_send_df_header(sdi);
934
935 devc->channel_entry = devc->enabled_channels;
936
937 if (rigol_ds_capture_start(sdi) != SR_OK)
938 return SR_ERR;
939
940 /* Start of first frame. */
941 packet.type = SR_DF_FRAME_BEGIN;
942 sr_session_send(sdi, &packet);
943
944 return SR_OK;
945}
946
947static int dev_acquisition_stop(struct sr_dev_inst *sdi)
948{
949 struct dev_context *devc;
950 struct sr_scpi_dev_inst *scpi;
951
952 devc = sdi->priv;
953
954 std_session_send_df_end(sdi);
955
956 g_slist_free(devc->enabled_channels);
957 devc->enabled_channels = NULL;
958 scpi = sdi->conn;
959 sr_scpi_source_remove(sdi->session, scpi);
960
961 return SR_OK;
962}
963
964static struct sr_dev_driver rigol_ds_driver_info = {
965 .name = "rigol-ds",
966 .longname = "Rigol DS",
967 .api_version = 1,
968 .init = std_init,
969 .cleanup = std_cleanup,
970 .scan = scan,
971 .dev_list = std_dev_list,
972 .dev_clear = dev_clear,
973 .config_get = config_get,
974 .config_set = config_set,
975 .config_list = config_list,
976 .dev_open = dev_open,
977 .dev_close = dev_close,
978 .dev_acquisition_start = dev_acquisition_start,
979 .dev_acquisition_stop = dev_acquisition_stop,
980 .context = NULL,
981};
982SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib