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rigol-ds: Rename the CHANINFO macro and comment it
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM,
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t devopts_cg_analog[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129static const char *trigger_sources_2_chans[] = {
130 "CH1", "CH2",
131 "EXT", "AC Line",
132 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
133 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
134};
135
136static const char *trigger_sources_4_chans[] = {
137 "CH1", "CH2", "CH3", "CH4",
138 "EXT", "AC Line",
139 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
140 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
141};
142
143static const char *trigger_slopes[] = {
144 "r", "f",
145};
146
147static const char *coupling[] = {
148 "AC", "DC", "GND",
149};
150
151static const uint64_t probe_factor[] = {
152 1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
153};
154
155/* Do not change the order of entries */
156static const char *data_sources[] = {
157 "Live",
158 "Memory",
159 "Segmented",
160};
161
162enum vendor {
163 RIGOL,
164 AGILENT,
165};
166
167enum series {
168 VS5000,
169 DS1000,
170 DS2000,
171 DS2000A,
172 DSO1000,
173 DS1000Z,
174};
175
176/* short name, full name */
177static const struct rigol_ds_vendor supported_vendors[] = {
178 [RIGOL] = {"Rigol", "Rigol Technologies"},
179 [AGILENT] = {"Agilent", "Agilent Technologies"},
180};
181
182#define VENDOR(x) &supported_vendors[x]
183/* vendor, series/name, protocol, data format, max timebase, min vdiv,
184 * number of horizontal divs, live waveform samples, memory buffer samples */
185static const struct rigol_ds_series supported_series[] = {
186 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
187 {50, 1}, {2, 1000}, 14, 2048, 0},
188 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
189 {50, 1}, {2, 1000}, 12, 600, 1048576},
190 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
191 {500, 1}, {500, 1000000}, 14, 1400, 14000},
192 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
193 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
194 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
195 {50, 1}, {2, 1000}, 12, 600, 20480},
196 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
197 {50, 1}, {1, 1000}, 12, 1200, 12000000},
198};
199
200#define SERIES(x) &supported_series[x]
201/*
202 * Use a macro to select the correct list of trigger sources and its length
203 * based on the number of analog channels and presence of digital channels.
204 */
205#define CH_INFO(num, digital) \
206 num, digital, trigger_sources_##num##_chans, \
207 digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
208/* series, model, min timebase, analog channels, digital */
209static const struct rigol_ds_model supported_models[] = {
210 {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false)},
211 {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false)},
212 {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false)},
213 {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false)},
214 {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false)},
215 {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true)},
216 {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true)},
217 {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true)},
218 {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true)},
219 {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true)},
220 {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false)},
221 {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false)},
222 {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false)},
223 {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true)},
224 {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true)},
225 {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true)},
226 {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false)},
227 {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false)},
228 {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false)},
229 {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false)},
230 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false)},
231 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false)},
232 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false)},
233 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false)},
234 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true)},
235 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true)},
236 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true)},
237 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true)},
238 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false)},
239 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false)},
240 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false)},
241 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false)},
242 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false)},
243 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false)},
244 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false)},
245 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false)},
246 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false)},
247 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false)},
248 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false)},
249 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false)},
250 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false)},
251 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true)},
252 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true)},
253 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true)},
254 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true)},
255};
256
257static struct sr_dev_driver rigol_ds_driver_info;
258
259static void clear_helper(struct dev_context *devc)
260{
261 unsigned int i;
262
263 g_free(devc->data);
264 g_free(devc->buffer);
265 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
266 g_free(devc->coupling[i]);
267 g_free(devc->trigger_source);
268 g_free(devc->trigger_slope);
269 g_free(devc->analog_groups);
270}
271
272static int dev_clear(const struct sr_dev_driver *di)
273{
274 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
275}
276
277static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
278{
279 struct dev_context *devc;
280 struct sr_dev_inst *sdi;
281 struct sr_scpi_hw_info *hw_info;
282 struct sr_channel *ch;
283 long n[3];
284 unsigned int i;
285 const struct rigol_ds_model *model = NULL;
286 gchar *channel_name, **version;
287
288 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
289 sr_info("Couldn't get IDN response, retrying.");
290 sr_scpi_close(scpi);
291 sr_scpi_open(scpi);
292 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
293 sr_info("Couldn't get IDN response.");
294 return NULL;
295 }
296 }
297
298 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
299 if (!g_ascii_strcasecmp(hw_info->manufacturer,
300 supported_models[i].series->vendor->full_name) &&
301 !strcmp(hw_info->model, supported_models[i].name)) {
302 model = &supported_models[i];
303 break;
304 }
305 }
306
307 if (!model) {
308 sr_scpi_hw_info_free(hw_info);
309 return NULL;
310 }
311
312 sdi = g_malloc0(sizeof(struct sr_dev_inst));
313 sdi->vendor = g_strdup(model->series->vendor->name);
314 sdi->model = g_strdup(model->name);
315 sdi->version = g_strdup(hw_info->firmware_version);
316 sdi->conn = scpi;
317 sdi->driver = &rigol_ds_driver_info;
318 sdi->inst_type = SR_INST_SCPI;
319 sdi->serial_num = g_strdup(hw_info->serial_number);
320 devc = g_malloc0(sizeof(struct dev_context));
321 devc->limit_frames = 0;
322 devc->model = model;
323 devc->format = model->series->format;
324
325 /* DS1000 models with firmware before 0.2.4 used the old data format. */
326 if (model->series == SERIES(DS1000)) {
327 version = g_strsplit(hw_info->firmware_version, ".", 0);
328 do {
329 if (!version[0] || !version[1] || !version[2])
330 break;
331 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
332 break;
333 for (i = 0; i < 3; i++) {
334 if (sr_atol(version[i], &n[i]) != SR_OK)
335 break;
336 }
337 if (i != 3)
338 break;
339 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
340 if (scpi->firmware_version < 24) {
341 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
342 devc->format = FORMAT_RAW;
343 }
344 break;
345 } while (0);
346 g_strfreev(version);
347 }
348
349 sr_scpi_hw_info_free(hw_info);
350
351 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
352 model->analog_channels);
353
354 for (i = 0; i < model->analog_channels; i++) {
355 channel_name = g_strdup_printf("CH%d", i + 1);
356 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
357
358 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
359
360 devc->analog_groups[i]->name = channel_name;
361 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
362 sdi->channel_groups = g_slist_append(sdi->channel_groups,
363 devc->analog_groups[i]);
364 }
365
366 if (devc->model->has_digital) {
367 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
368
369 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
370 channel_name = g_strdup_printf("D%d", i);
371 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
372 g_free(channel_name);
373 devc->digital_group->channels = g_slist_append(
374 devc->digital_group->channels, ch);
375 }
376 devc->digital_group->name = g_strdup("LA");
377 sdi->channel_groups = g_slist_append(sdi->channel_groups,
378 devc->digital_group);
379 }
380
381 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
382 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
383 devc->timebases = &timebases[i];
384 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
385 devc->num_timebases = &timebases[i] - devc->timebases + 1;
386 }
387
388 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
389 if (!memcmp(&devc->model->series->min_vdiv,
390 &vdivs[i], sizeof(uint64_t[2]))) {
391 devc->vdivs = &vdivs[i];
392 devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
393 }
394 }
395
396 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
397 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
398
399 devc->data_source = DATA_SOURCE_LIVE;
400
401 sdi->priv = devc;
402
403 return sdi;
404}
405
406static GSList *scan(struct sr_dev_driver *di, GSList *options)
407{
408 return sr_scpi_scan(di->context, options, probe_device);
409}
410
411static int dev_open(struct sr_dev_inst *sdi)
412{
413 int ret;
414 struct sr_scpi_dev_inst *scpi = sdi->conn;
415
416 if ((ret = sr_scpi_open(scpi)) < 0) {
417 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
418 return SR_ERR;
419 }
420
421 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
422 sr_err("Failed to get device config: %s.", sr_strerror(ret));
423 return SR_ERR;
424 }
425
426 return SR_OK;
427}
428
429static int dev_close(struct sr_dev_inst *sdi)
430{
431 struct sr_scpi_dev_inst *scpi;
432 struct dev_context *devc;
433
434 scpi = sdi->conn;
435 devc = sdi->priv;
436
437 if (!scpi)
438 return SR_ERR_BUG;
439
440 if (devc->model->series->protocol == PROTOCOL_V2)
441 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
442
443 return sr_scpi_close(scpi);
444}
445
446static int analog_frame_size(const struct sr_dev_inst *sdi)
447{
448 struct dev_context *devc = sdi->priv;
449 struct sr_channel *ch;
450 int analog_channels = 0;
451 GSList *l;
452
453 for (l = sdi->channels; l; l = l->next) {
454 ch = l->data;
455 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
456 analog_channels++;
457 }
458
459 if (analog_channels == 0)
460 return 0;
461
462 switch (devc->data_source) {
463 case DATA_SOURCE_LIVE:
464 return devc->model->series->live_samples;
465 case DATA_SOURCE_MEMORY:
466 return devc->model->series->buffer_samples / analog_channels;
467 default:
468 return 0;
469 }
470}
471
472static int digital_frame_size(const struct sr_dev_inst *sdi)
473{
474 struct dev_context *devc = sdi->priv;
475
476 switch (devc->data_source) {
477 case DATA_SOURCE_LIVE:
478 return devc->model->series->live_samples * 2;
479 case DATA_SOURCE_MEMORY:
480 return devc->model->series->buffer_samples * 2;
481 default:
482 return 0;
483 }
484}
485
486static int config_get(uint32_t key, GVariant **data,
487 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
488{
489 struct dev_context *devc;
490 struct sr_channel *ch;
491 const char *tmp_str;
492 uint64_t samplerate;
493 int analog_channel = -1;
494 float smallest_diff = INFINITY;
495 int idx = -1;
496 unsigned i;
497
498 if (!sdi)
499 return SR_ERR_ARG;
500
501 devc = sdi->priv;
502
503 /* If a channel group is specified, it must be a valid one. */
504 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
505 sr_err("Invalid channel group specified.");
506 return SR_ERR;
507 }
508
509 if (cg) {
510 ch = g_slist_nth_data(cg->channels, 0);
511 if (!ch)
512 return SR_ERR;
513 if (ch->type == SR_CHANNEL_ANALOG) {
514 if (ch->name[2] < '1' || ch->name[2] > '4')
515 return SR_ERR;
516 analog_channel = ch->name[2] - '1';
517 }
518 }
519
520 switch (key) {
521 case SR_CONF_NUM_HDIV:
522 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
523 break;
524 case SR_CONF_NUM_VDIV:
525 *data = g_variant_new_int32(devc->num_vdivs);
526 break;
527 case SR_CONF_DATA_SOURCE:
528 if (devc->data_source == DATA_SOURCE_LIVE)
529 *data = g_variant_new_string("Live");
530 else if (devc->data_source == DATA_SOURCE_MEMORY)
531 *data = g_variant_new_string("Memory");
532 else
533 *data = g_variant_new_string("Segmented");
534 break;
535 case SR_CONF_SAMPLERATE:
536 if (devc->data_source == DATA_SOURCE_LIVE) {
537 samplerate = analog_frame_size(sdi) /
538 (devc->timebase * devc->model->series->num_horizontal_divs);
539 *data = g_variant_new_uint64(samplerate);
540 } else {
541 sr_dbg("Unknown data source: %d.", devc->data_source);
542 return SR_ERR_NA;
543 }
544 break;
545 case SR_CONF_TRIGGER_SOURCE:
546 if (!strcmp(devc->trigger_source, "ACL"))
547 tmp_str = "AC Line";
548 else if (!strcmp(devc->trigger_source, "CHAN1"))
549 tmp_str = "CH1";
550 else if (!strcmp(devc->trigger_source, "CHAN2"))
551 tmp_str = "CH2";
552 else if (!strcmp(devc->trigger_source, "CHAN3"))
553 tmp_str = "CH3";
554 else if (!strcmp(devc->trigger_source, "CHAN4"))
555 tmp_str = "CH4";
556 else
557 tmp_str = devc->trigger_source;
558 *data = g_variant_new_string(tmp_str);
559 break;
560 case SR_CONF_TRIGGER_SLOPE:
561 if (!strncmp(devc->trigger_slope, "POS", 3)) {
562 tmp_str = "r";
563 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
564 tmp_str = "f";
565 } else {
566 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
567 return SR_ERR_NA;
568 }
569 *data = g_variant_new_string(tmp_str);
570 break;
571 case SR_CONF_TRIGGER_LEVEL:
572 *data = g_variant_new_double(devc->trigger_level);
573 break;
574 case SR_CONF_TIMEBASE:
575 for (i = 0; i < devc->num_timebases; i++) {
576 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
577 float diff = fabs(devc->timebase - tb);
578 if (diff < smallest_diff) {
579 smallest_diff = diff;
580 idx = i;
581 }
582 }
583 if (idx < 0) {
584 sr_dbg("Negative timebase index: %d.", idx);
585 return SR_ERR_NA;
586 }
587 *data = g_variant_new("(tt)", devc->timebases[idx][0],
588 devc->timebases[idx][1]);
589 break;
590 case SR_CONF_VDIV:
591 if (analog_channel < 0) {
592 sr_dbg("Negative analog channel: %d.", analog_channel);
593 return SR_ERR_NA;
594 }
595 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
596 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
597 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
598 if (diff < smallest_diff) {
599 smallest_diff = diff;
600 idx = i;
601 }
602 }
603 if (idx < 0) {
604 sr_dbg("Negative vdiv index: %d.", idx);
605 return SR_ERR_NA;
606 }
607 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
608 break;
609 case SR_CONF_COUPLING:
610 if (analog_channel < 0) {
611 sr_dbg("Negative analog channel: %d.", analog_channel);
612 return SR_ERR_NA;
613 }
614 *data = g_variant_new_string(devc->coupling[analog_channel]);
615 break;
616 case SR_CONF_PROBE_FACTOR:
617 if (analog_channel < 0) {
618 sr_dbg("Negative analog channel: %d.", analog_channel);
619 return SR_ERR_NA;
620 }
621 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
622 break;
623 default:
624 return SR_ERR_NA;
625 }
626
627 return SR_OK;
628}
629
630static int config_set(uint32_t key, GVariant *data,
631 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
632{
633 struct dev_context *devc;
634 uint64_t p;
635 double t_dbl;
636 int ret, idx, i;
637 const char *tmp_str;
638 char buffer[16];
639
640 devc = sdi->priv;
641
642 /* If a channel group is specified, it must be a valid one. */
643 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
644 sr_err("Invalid channel group specified.");
645 return SR_ERR;
646 }
647
648 switch (key) {
649 case SR_CONF_LIMIT_FRAMES:
650 devc->limit_frames = g_variant_get_uint64(data);
651 break;
652 case SR_CONF_TRIGGER_SLOPE:
653 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
654 return SR_ERR_ARG;
655 g_free(devc->trigger_slope);
656 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
657 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
658 case SR_CONF_HORIZ_TRIGGERPOS:
659 t_dbl = g_variant_get_double(data);
660 if (t_dbl < 0.0 || t_dbl > 1.0) {
661 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
662 return SR_ERR;
663 }
664 devc->horiz_triggerpos = t_dbl;
665 /* We have the trigger offset as a percentage of the frame, but
666 * need to express this in seconds. */
667 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
668 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
669 return rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
670 case SR_CONF_TRIGGER_LEVEL:
671 t_dbl = g_variant_get_double(data);
672 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
673 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
674 if (ret == SR_OK)
675 devc->trigger_level = t_dbl;
676 return ret;
677 case SR_CONF_TIMEBASE:
678 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
679 return SR_ERR_ARG;
680 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
681 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
682 devc->timebase);
683 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
684 case SR_CONF_TRIGGER_SOURCE:
685 if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0)
686 return SR_ERR_ARG;
687 g_free(devc->trigger_source);
688 devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]);
689 if (!strcmp(devc->trigger_source, "AC Line"))
690 tmp_str = "ACL";
691 else if (!strcmp(devc->trigger_source, "CH1"))
692 tmp_str = "CHAN1";
693 else if (!strcmp(devc->trigger_source, "CH2"))
694 tmp_str = "CHAN2";
695 else if (!strcmp(devc->trigger_source, "CH3"))
696 tmp_str = "CHAN3";
697 else if (!strcmp(devc->trigger_source, "CH4"))
698 tmp_str = "CHAN4";
699 else
700 tmp_str = (char *)devc->trigger_source;
701 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
702 case SR_CONF_VDIV:
703 if (!cg)
704 return SR_ERR_CHANNEL_GROUP;
705 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
706 return SR_ERR_ARG;
707 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
708 return SR_ERR_ARG;
709 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
710 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
711 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
712 case SR_CONF_COUPLING:
713 if (!cg)
714 return SR_ERR_CHANNEL_GROUP;
715 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
716 return SR_ERR_ARG;
717 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
718 return SR_ERR_ARG;
719 g_free(devc->coupling[i]);
720 devc->coupling[i] = g_strdup(coupling[idx]);
721 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
722 case SR_CONF_PROBE_FACTOR:
723 if (!cg)
724 return SR_ERR_CHANNEL_GROUP;
725 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
726 return SR_ERR_ARG;
727 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
728 return SR_ERR_ARG;
729 p = g_variant_get_uint64(data);
730 devc->attenuation[i] = probe_factor[idx];
731 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
732 if (ret == SR_OK)
733 rigol_ds_get_dev_cfg_vertical(sdi);
734 return ret;
735 case SR_CONF_DATA_SOURCE:
736 tmp_str = g_variant_get_string(data, NULL);
737 if (!strcmp(tmp_str, "Live"))
738 devc->data_source = DATA_SOURCE_LIVE;
739 else if (devc->model->series->protocol >= PROTOCOL_V2
740 && !strcmp(tmp_str, "Memory"))
741 devc->data_source = DATA_SOURCE_MEMORY;
742 else if (devc->model->series->protocol >= PROTOCOL_V3
743 && !strcmp(tmp_str, "Segmented"))
744 devc->data_source = DATA_SOURCE_SEGMENTED;
745 else {
746 sr_err("Unknown data source: '%s'.", tmp_str);
747 return SR_ERR;
748 }
749 break;
750 default:
751 return SR_ERR_NA;
752 }
753
754 return SR_OK;
755}
756
757static int config_list(uint32_t key, GVariant **data,
758 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
759{
760 struct dev_context *devc;
761
762 devc = (sdi) ? sdi->priv : NULL;
763
764 switch (key) {
765 case SR_CONF_SCAN_OPTIONS:
766 case SR_CONF_DEVICE_OPTIONS:
767 if (!cg)
768 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
769 if (!devc)
770 return SR_ERR_ARG;
771 if (cg == devc->digital_group) {
772 *data = std_gvar_array_u32(NULL, 0);
773 return SR_OK;
774 } else {
775 if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
776 return SR_ERR_ARG;
777 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
778 return SR_OK;
779 }
780 break;
781 case SR_CONF_COUPLING:
782 if (!cg)
783 return SR_ERR_CHANNEL_GROUP;
784 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
785 break;
786 case SR_CONF_PROBE_FACTOR:
787 if (!cg)
788 return SR_ERR_CHANNEL_GROUP;
789 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
790 break;
791 case SR_CONF_VDIV:
792 if (!devc)
793 /* Can't know this until we have the exact model. */
794 return SR_ERR_ARG;
795 if (!cg)
796 return SR_ERR_CHANNEL_GROUP;
797 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
798 break;
799 case SR_CONF_TIMEBASE:
800 if (!devc)
801 /* Can't know this until we have the exact model. */
802 return SR_ERR_ARG;
803 if (devc->num_timebases <= 0)
804 return SR_ERR_NA;
805 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
806 break;
807 case SR_CONF_TRIGGER_SOURCE:
808 if (!devc)
809 /* Can't know this until we have the exact model. */
810 return SR_ERR_ARG;
811 *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources);
812 break;
813 case SR_CONF_TRIGGER_SLOPE:
814 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
815 break;
816 case SR_CONF_DATA_SOURCE:
817 if (!devc)
818 /* Can't know this until we have the exact model. */
819 return SR_ERR_ARG;
820 switch (devc->model->series->protocol) {
821 case PROTOCOL_V1:
822 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
823 break;
824 case PROTOCOL_V2:
825 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
826 break;
827 default:
828 *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
829 break;
830 }
831 break;
832 default:
833 return SR_ERR_NA;
834 }
835
836 return SR_OK;
837}
838
839static int dev_acquisition_start(const struct sr_dev_inst *sdi)
840{
841 struct sr_scpi_dev_inst *scpi;
842 struct dev_context *devc;
843 struct sr_channel *ch;
844 struct sr_datafeed_packet packet;
845 gboolean some_digital;
846 GSList *l;
847
848 scpi = sdi->conn;
849 devc = sdi->priv;
850
851 devc->num_frames = 0;
852
853 some_digital = FALSE;
854 for (l = sdi->channels; l; l = l->next) {
855 ch = l->data;
856 sr_dbg("handling channel %s", ch->name);
857 if (ch->type == SR_CHANNEL_ANALOG) {
858 if (ch->enabled)
859 devc->enabled_channels = g_slist_append(
860 devc->enabled_channels, ch);
861 if (ch->enabled != devc->analog_channels[ch->index]) {
862 /* Enabled channel is currently disabled, or vice versa. */
863 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
864 ch->enabled ? "ON" : "OFF") != SR_OK)
865 return SR_ERR;
866 devc->analog_channels[ch->index] = ch->enabled;
867 }
868 } else if (ch->type == SR_CHANNEL_LOGIC) {
869 /* Only one list entry for older protocols. All channels are
870 * retrieved together when this entry is processed. */
871 if (ch->enabled && (
872 devc->model->series->protocol > PROTOCOL_V3 ||
873 !some_digital))
874 devc->enabled_channels = g_slist_append(
875 devc->enabled_channels, ch);
876 if (ch->enabled) {
877 some_digital = TRUE;
878 /* Turn on LA module if currently off. */
879 if (!devc->la_enabled) {
880 if (rigol_ds_config_set(sdi,
881 devc->model->series->protocol >= PROTOCOL_V3 ?
882 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
883 return SR_ERR;
884 devc->la_enabled = TRUE;
885 }
886 }
887 if (ch->enabled != devc->digital_channels[ch->index]) {
888 /* Enabled channel is currently disabled, or vice versa. */
889 if (rigol_ds_config_set(sdi,
890 devc->model->series->protocol >= PROTOCOL_V3 ?
891 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
892 ch->enabled ? "ON" : "OFF") != SR_OK)
893 return SR_ERR;
894 devc->digital_channels[ch->index] = ch->enabled;
895 }
896 }
897 }
898
899 if (!devc->enabled_channels)
900 return SR_ERR;
901
902 /* Turn off LA module if on and no digital channels selected. */
903 if (devc->la_enabled && !some_digital)
904 if (rigol_ds_config_set(sdi,
905 devc->model->series->protocol >= PROTOCOL_V3 ?
906 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
907 return SR_ERR;
908
909 /* Set memory mode. */
910 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
911 sr_err("Data source 'Segmented' not yet supported");
912 return SR_ERR;
913 }
914
915 devc->analog_frame_size = analog_frame_size(sdi);
916 devc->digital_frame_size = digital_frame_size(sdi);
917
918 switch (devc->model->series->protocol) {
919 case PROTOCOL_V2:
920 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
921 return SR_ERR;
922 break;
923 case PROTOCOL_V3:
924 /* Apparently for the DS2000 the memory
925 * depth can only be set in Running state -
926 * this matches the behaviour of the UI. */
927 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
928 return SR_ERR;
929 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
930 devc->analog_frame_size) != SR_OK)
931 return SR_ERR;
932 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
933 return SR_ERR;
934 break;
935 default:
936 break;
937 }
938
939 if (devc->data_source == DATA_SOURCE_LIVE)
940 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
941 return SR_ERR;
942
943 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
944 rigol_ds_receive, (void *)sdi);
945
946 std_session_send_df_header(sdi);
947
948 devc->channel_entry = devc->enabled_channels;
949
950 if (rigol_ds_capture_start(sdi) != SR_OK)
951 return SR_ERR;
952
953 /* Start of first frame. */
954 packet.type = SR_DF_FRAME_BEGIN;
955 sr_session_send(sdi, &packet);
956
957 return SR_OK;
958}
959
960static int dev_acquisition_stop(struct sr_dev_inst *sdi)
961{
962 struct dev_context *devc;
963 struct sr_scpi_dev_inst *scpi;
964
965 devc = sdi->priv;
966
967 std_session_send_df_end(sdi);
968
969 g_slist_free(devc->enabled_channels);
970 devc->enabled_channels = NULL;
971 scpi = sdi->conn;
972 sr_scpi_source_remove(sdi->session, scpi);
973
974 return SR_OK;
975}
976
977static struct sr_dev_driver rigol_ds_driver_info = {
978 .name = "rigol-ds",
979 .longname = "Rigol DS",
980 .api_version = 1,
981 .init = std_init,
982 .cleanup = std_cleanup,
983 .scan = scan,
984 .dev_list = std_dev_list,
985 .dev_clear = dev_clear,
986 .config_get = config_get,
987 .config_set = config_set,
988 .config_list = config_list,
989 .dev_open = dev_open,
990 .dev_close = dev_close,
991 .dev_acquisition_start = dev_acquisition_start,
992 .dev_acquisition_stop = dev_acquisition_stop,
993 .context = NULL,
994};
995SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib