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serial: introduce more general "have serial comm" feature flag
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM,
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t devopts_cg_analog[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129static const char *trigger_sources_2_chans[] = {
130 "CH1", "CH2",
131 "EXT", "AC Line",
132 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
133 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
134};
135
136static const char *trigger_sources_4_chans[] = {
137 "CH1", "CH2", "CH3", "CH4",
138 "EXT", "AC Line",
139 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
140 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
141};
142
143static const char *trigger_slopes[] = {
144 "r", "f",
145};
146
147static const char *coupling[] = {
148 "AC", "DC", "GND",
149};
150
151static const uint64_t probe_factor[] = {
152 1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
153};
154
155/* Do not change the order of entries */
156static const char *data_sources[] = {
157 "Live",
158 "Memory",
159 "Segmented",
160};
161
162static const struct rigol_ds_command std_cmd[] = {
163 { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
164 { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
165};
166
167static const struct rigol_ds_command mso7000a_cmd[] = {
168 { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
169 { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
170};
171
172enum vendor {
173 RIGOL,
174 AGILENT,
175};
176
177enum series {
178 VS5000,
179 DS1000,
180 DS2000,
181 DS2000A,
182 DSO1000,
183 DS1000Z,
184 DS4000,
185 MSO7000A,
186};
187
188/* short name, full name */
189static const struct rigol_ds_vendor supported_vendors[] = {
190 [RIGOL] = {"Rigol", "Rigol Technologies"},
191 [AGILENT] = {"Agilent", "Agilent Technologies"},
192};
193
194#define VENDOR(x) &supported_vendors[x]
195/* vendor, series/name, protocol, data format, max timebase, min vdiv,
196 * number of horizontal divs, live waveform samples, memory buffer samples */
197static const struct rigol_ds_series supported_series[] = {
198 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
199 {50, 1}, {2, 1000}, 14, 2048, 0},
200 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
201 {50, 1}, {2, 1000}, 12, 600, 1048576},
202 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
203 {500, 1}, {500, 1000000}, 14, 1400, 14000},
204 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
205 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
206 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
207 {50, 1}, {2, 1000}, 12, 600, 20480},
208 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
209 {50, 1}, {1, 1000}, 12, 1200, 12000000},
210 [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
211 {1000, 1}, {1, 1000}, 14, 1400, 0},
212 [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
213 {50, 1}, {2, 1000}, 10, 1000, 8000000},
214};
215
216#define SERIES(x) &supported_series[x]
217/*
218 * Use a macro to select the correct list of trigger sources and its length
219 * based on the number of analog channels and presence of digital channels.
220 */
221#define CH_INFO(num, digital) \
222 num, digital, trigger_sources_##num##_chans, \
223 digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
224/* series, model, min timebase, analog channels, digital */
225static const struct rigol_ds_model supported_models[] = {
226 {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
227 {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
228 {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
229 {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
230 {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
231 {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
232 {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
233 {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
234 {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
235 {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
236 {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
237 {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
238 {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
239 {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
240 {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
241 {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
242 {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
243 {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
244 {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
245 {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
246 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
247 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
248 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
249 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
250 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
251 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
252 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
253 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
254 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
255 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
256 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
257 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
258 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
259 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
260 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
261 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
262 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
263 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
264 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
265 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
266 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
267 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
268 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
269 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
270 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
271 {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
272 /* TODO: Digital channels are not yet supported on MSO7000A. */
273 {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
274};
275
276static struct sr_dev_driver rigol_ds_driver_info;
277
278static void clear_helper(struct dev_context *devc)
279{
280 unsigned int i;
281
282 g_free(devc->data);
283 g_free(devc->buffer);
284 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
285 g_free(devc->coupling[i]);
286 g_free(devc->trigger_source);
287 g_free(devc->trigger_slope);
288 g_free(devc->analog_groups);
289}
290
291static int dev_clear(const struct sr_dev_driver *di)
292{
293 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
294}
295
296static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
297{
298 struct dev_context *devc;
299 struct sr_dev_inst *sdi;
300 struct sr_scpi_hw_info *hw_info;
301 struct sr_channel *ch;
302 long n[3];
303 unsigned int i;
304 const struct rigol_ds_model *model = NULL;
305 gchar *channel_name, **version;
306
307 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
308 sr_info("Couldn't get IDN response, retrying.");
309 sr_scpi_close(scpi);
310 sr_scpi_open(scpi);
311 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
312 sr_info("Couldn't get IDN response.");
313 return NULL;
314 }
315 }
316
317 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
318 if (!g_ascii_strcasecmp(hw_info->manufacturer,
319 supported_models[i].series->vendor->full_name) &&
320 !strcmp(hw_info->model, supported_models[i].name)) {
321 model = &supported_models[i];
322 break;
323 }
324 }
325
326 if (!model) {
327 sr_scpi_hw_info_free(hw_info);
328 return NULL;
329 }
330
331 sdi = g_malloc0(sizeof(struct sr_dev_inst));
332 sdi->vendor = g_strdup(model->series->vendor->name);
333 sdi->model = g_strdup(model->name);
334 sdi->version = g_strdup(hw_info->firmware_version);
335 sdi->conn = scpi;
336 sdi->driver = &rigol_ds_driver_info;
337 sdi->inst_type = SR_INST_SCPI;
338 sdi->serial_num = g_strdup(hw_info->serial_number);
339 devc = g_malloc0(sizeof(struct dev_context));
340 devc->limit_frames = 0;
341 devc->model = model;
342 devc->format = model->series->format;
343
344 /* DS1000 models with firmware before 0.2.4 used the old data format. */
345 if (model->series == SERIES(DS1000)) {
346 version = g_strsplit(hw_info->firmware_version, ".", 0);
347 do {
348 if (!version[0] || !version[1] || !version[2])
349 break;
350 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
351 break;
352 for (i = 0; i < 3; i++) {
353 if (sr_atol(version[i], &n[i]) != SR_OK)
354 break;
355 }
356 if (i != 3)
357 break;
358 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
359 if (scpi->firmware_version < 24) {
360 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
361 devc->format = FORMAT_RAW;
362 }
363 break;
364 } while (0);
365 g_strfreev(version);
366 }
367
368 sr_scpi_hw_info_free(hw_info);
369
370 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
371 model->analog_channels);
372
373 for (i = 0; i < model->analog_channels; i++) {
374 channel_name = g_strdup_printf("CH%d", i + 1);
375 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
376
377 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
378
379 devc->analog_groups[i]->name = channel_name;
380 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
381 sdi->channel_groups = g_slist_append(sdi->channel_groups,
382 devc->analog_groups[i]);
383 }
384
385 if (devc->model->has_digital) {
386 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
387
388 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
389 channel_name = g_strdup_printf("D%d", i);
390 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
391 g_free(channel_name);
392 devc->digital_group->channels = g_slist_append(
393 devc->digital_group->channels, ch);
394 }
395 devc->digital_group->name = g_strdup("LA");
396 sdi->channel_groups = g_slist_append(sdi->channel_groups,
397 devc->digital_group);
398 }
399
400 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
401 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
402 devc->timebases = &timebases[i];
403 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
404 devc->num_timebases = &timebases[i] - devc->timebases + 1;
405 }
406
407 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
408 if (!memcmp(&devc->model->series->min_vdiv,
409 &vdivs[i], sizeof(uint64_t[2]))) {
410 devc->vdivs = &vdivs[i];
411 devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
412 }
413 }
414
415 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
416 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
417
418 devc->data_source = DATA_SOURCE_LIVE;
419
420 sdi->priv = devc;
421
422 return sdi;
423}
424
425static GSList *scan(struct sr_dev_driver *di, GSList *options)
426{
427 return sr_scpi_scan(di->context, options, probe_device);
428}
429
430static int dev_open(struct sr_dev_inst *sdi)
431{
432 int ret;
433 struct sr_scpi_dev_inst *scpi = sdi->conn;
434
435 if ((ret = sr_scpi_open(scpi)) < 0) {
436 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
437 return SR_ERR;
438 }
439
440 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
441 sr_err("Failed to get device config: %s.", sr_strerror(ret));
442 return SR_ERR;
443 }
444
445 return SR_OK;
446}
447
448static int dev_close(struct sr_dev_inst *sdi)
449{
450 struct sr_scpi_dev_inst *scpi;
451 struct dev_context *devc;
452
453 scpi = sdi->conn;
454 devc = sdi->priv;
455
456 if (!scpi)
457 return SR_ERR_BUG;
458
459 if (devc->model->series->protocol == PROTOCOL_V2)
460 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
461
462 return sr_scpi_close(scpi);
463}
464
465static int analog_frame_size(const struct sr_dev_inst *sdi)
466{
467 struct dev_context *devc = sdi->priv;
468 struct sr_channel *ch;
469 int analog_channels = 0;
470 GSList *l;
471
472 for (l = sdi->channels; l; l = l->next) {
473 ch = l->data;
474 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
475 analog_channels++;
476 }
477
478 if (analog_channels == 0)
479 return 0;
480
481 switch (devc->data_source) {
482 case DATA_SOURCE_LIVE:
483 return devc->model->series->live_samples;
484 case DATA_SOURCE_MEMORY:
485 return devc->model->series->buffer_samples / analog_channels;
486 default:
487 return 0;
488 }
489}
490
491static int digital_frame_size(const struct sr_dev_inst *sdi)
492{
493 struct dev_context *devc = sdi->priv;
494
495 switch (devc->data_source) {
496 case DATA_SOURCE_LIVE:
497 return devc->model->series->live_samples * 2;
498 case DATA_SOURCE_MEMORY:
499 return devc->model->series->buffer_samples * 2;
500 default:
501 return 0;
502 }
503}
504
505static int config_get(uint32_t key, GVariant **data,
506 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
507{
508 struct dev_context *devc;
509 struct sr_channel *ch;
510 const char *tmp_str;
511 uint64_t samplerate;
512 int analog_channel = -1;
513 float smallest_diff = INFINITY;
514 int idx = -1;
515 unsigned i;
516
517 if (!sdi)
518 return SR_ERR_ARG;
519
520 devc = sdi->priv;
521
522 /* If a channel group is specified, it must be a valid one. */
523 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
524 sr_err("Invalid channel group specified.");
525 return SR_ERR;
526 }
527
528 if (cg) {
529 ch = g_slist_nth_data(cg->channels, 0);
530 if (!ch)
531 return SR_ERR;
532 if (ch->type == SR_CHANNEL_ANALOG) {
533 if (ch->name[2] < '1' || ch->name[2] > '4')
534 return SR_ERR;
535 analog_channel = ch->name[2] - '1';
536 }
537 }
538
539 switch (key) {
540 case SR_CONF_NUM_HDIV:
541 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
542 break;
543 case SR_CONF_NUM_VDIV:
544 *data = g_variant_new_int32(devc->num_vdivs);
545 break;
546 case SR_CONF_DATA_SOURCE:
547 if (devc->data_source == DATA_SOURCE_LIVE)
548 *data = g_variant_new_string("Live");
549 else if (devc->data_source == DATA_SOURCE_MEMORY)
550 *data = g_variant_new_string("Memory");
551 else
552 *data = g_variant_new_string("Segmented");
553 break;
554 case SR_CONF_SAMPLERATE:
555 if (devc->data_source == DATA_SOURCE_LIVE) {
556 samplerate = analog_frame_size(sdi) /
557 (devc->timebase * devc->model->series->num_horizontal_divs);
558 *data = g_variant_new_uint64(samplerate);
559 } else {
560 sr_dbg("Unknown data source: %d.", devc->data_source);
561 return SR_ERR_NA;
562 }
563 break;
564 case SR_CONF_TRIGGER_SOURCE:
565 if (!strcmp(devc->trigger_source, "ACL"))
566 tmp_str = "AC Line";
567 else if (!strcmp(devc->trigger_source, "CHAN1"))
568 tmp_str = "CH1";
569 else if (!strcmp(devc->trigger_source, "CHAN2"))
570 tmp_str = "CH2";
571 else if (!strcmp(devc->trigger_source, "CHAN3"))
572 tmp_str = "CH3";
573 else if (!strcmp(devc->trigger_source, "CHAN4"))
574 tmp_str = "CH4";
575 else
576 tmp_str = devc->trigger_source;
577 *data = g_variant_new_string(tmp_str);
578 break;
579 case SR_CONF_TRIGGER_SLOPE:
580 if (!strncmp(devc->trigger_slope, "POS", 3)) {
581 tmp_str = "r";
582 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
583 tmp_str = "f";
584 } else {
585 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
586 return SR_ERR_NA;
587 }
588 *data = g_variant_new_string(tmp_str);
589 break;
590 case SR_CONF_TRIGGER_LEVEL:
591 *data = g_variant_new_double(devc->trigger_level);
592 break;
593 case SR_CONF_TIMEBASE:
594 for (i = 0; i < devc->num_timebases; i++) {
595 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
596 float diff = fabs(devc->timebase - tb);
597 if (diff < smallest_diff) {
598 smallest_diff = diff;
599 idx = i;
600 }
601 }
602 if (idx < 0) {
603 sr_dbg("Negative timebase index: %d.", idx);
604 return SR_ERR_NA;
605 }
606 *data = g_variant_new("(tt)", devc->timebases[idx][0],
607 devc->timebases[idx][1]);
608 break;
609 case SR_CONF_VDIV:
610 if (analog_channel < 0) {
611 sr_dbg("Negative analog channel: %d.", analog_channel);
612 return SR_ERR_NA;
613 }
614 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
615 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
616 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
617 if (diff < smallest_diff) {
618 smallest_diff = diff;
619 idx = i;
620 }
621 }
622 if (idx < 0) {
623 sr_dbg("Negative vdiv index: %d.", idx);
624 return SR_ERR_NA;
625 }
626 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
627 break;
628 case SR_CONF_COUPLING:
629 if (analog_channel < 0) {
630 sr_dbg("Negative analog channel: %d.", analog_channel);
631 return SR_ERR_NA;
632 }
633 *data = g_variant_new_string(devc->coupling[analog_channel]);
634 break;
635 case SR_CONF_PROBE_FACTOR:
636 if (analog_channel < 0) {
637 sr_dbg("Negative analog channel: %d.", analog_channel);
638 return SR_ERR_NA;
639 }
640 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
641 break;
642 default:
643 return SR_ERR_NA;
644 }
645
646 return SR_OK;
647}
648
649static int config_set(uint32_t key, GVariant *data,
650 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
651{
652 struct dev_context *devc;
653 uint64_t p;
654 double t_dbl;
655 int ret, idx, i;
656 const char *tmp_str;
657 char buffer[16];
658
659 devc = sdi->priv;
660
661 /* If a channel group is specified, it must be a valid one. */
662 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
663 sr_err("Invalid channel group specified.");
664 return SR_ERR;
665 }
666
667 switch (key) {
668 case SR_CONF_LIMIT_FRAMES:
669 devc->limit_frames = g_variant_get_uint64(data);
670 break;
671 case SR_CONF_TRIGGER_SLOPE:
672 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
673 return SR_ERR_ARG;
674 g_free(devc->trigger_slope);
675 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
676 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
677 case SR_CONF_HORIZ_TRIGGERPOS:
678 t_dbl = g_variant_get_double(data);
679 if (t_dbl < 0.0 || t_dbl > 1.0) {
680 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
681 return SR_ERR;
682 }
683 devc->horiz_triggerpos = t_dbl;
684 /* We have the trigger offset as a percentage of the frame, but
685 * need to express this in seconds. */
686 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
687 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
688 return rigol_ds_config_set(sdi,
689 devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
690 case SR_CONF_TRIGGER_LEVEL:
691 t_dbl = g_variant_get_double(data);
692 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
693 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
694 if (ret == SR_OK)
695 devc->trigger_level = t_dbl;
696 return ret;
697 case SR_CONF_TIMEBASE:
698 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
699 return SR_ERR_ARG;
700 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
701 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
702 devc->timebase);
703 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
704 case SR_CONF_TRIGGER_SOURCE:
705 if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0)
706 return SR_ERR_ARG;
707 g_free(devc->trigger_source);
708 devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]);
709 if (!strcmp(devc->trigger_source, "AC Line"))
710 tmp_str = "ACL";
711 else if (!strcmp(devc->trigger_source, "CH1"))
712 tmp_str = "CHAN1";
713 else if (!strcmp(devc->trigger_source, "CH2"))
714 tmp_str = "CHAN2";
715 else if (!strcmp(devc->trigger_source, "CH3"))
716 tmp_str = "CHAN3";
717 else if (!strcmp(devc->trigger_source, "CH4"))
718 tmp_str = "CHAN4";
719 else
720 tmp_str = (char *)devc->trigger_source;
721 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
722 case SR_CONF_VDIV:
723 if (!cg)
724 return SR_ERR_CHANNEL_GROUP;
725 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
726 return SR_ERR_ARG;
727 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
728 return SR_ERR_ARG;
729 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
730 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
731 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
732 case SR_CONF_COUPLING:
733 if (!cg)
734 return SR_ERR_CHANNEL_GROUP;
735 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
736 return SR_ERR_ARG;
737 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
738 return SR_ERR_ARG;
739 g_free(devc->coupling[i]);
740 devc->coupling[i] = g_strdup(coupling[idx]);
741 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
742 case SR_CONF_PROBE_FACTOR:
743 if (!cg)
744 return SR_ERR_CHANNEL_GROUP;
745 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
746 return SR_ERR_ARG;
747 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
748 return SR_ERR_ARG;
749 p = g_variant_get_uint64(data);
750 devc->attenuation[i] = probe_factor[idx];
751 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
752 if (ret == SR_OK)
753 rigol_ds_get_dev_cfg_vertical(sdi);
754 return ret;
755 case SR_CONF_DATA_SOURCE:
756 tmp_str = g_variant_get_string(data, NULL);
757 if (!strcmp(tmp_str, "Live"))
758 devc->data_source = DATA_SOURCE_LIVE;
759 else if (devc->model->series->protocol >= PROTOCOL_V2
760 && !strcmp(tmp_str, "Memory"))
761 devc->data_source = DATA_SOURCE_MEMORY;
762 else if (devc->model->series->protocol >= PROTOCOL_V3
763 && !strcmp(tmp_str, "Segmented"))
764 devc->data_source = DATA_SOURCE_SEGMENTED;
765 else {
766 sr_err("Unknown data source: '%s'.", tmp_str);
767 return SR_ERR;
768 }
769 break;
770 default:
771 return SR_ERR_NA;
772 }
773
774 return SR_OK;
775}
776
777static int config_list(uint32_t key, GVariant **data,
778 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
779{
780 struct dev_context *devc;
781
782 devc = (sdi) ? sdi->priv : NULL;
783
784 switch (key) {
785 case SR_CONF_SCAN_OPTIONS:
786 case SR_CONF_DEVICE_OPTIONS:
787 if (!cg)
788 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
789 if (!devc)
790 return SR_ERR_ARG;
791 if (cg == devc->digital_group) {
792 *data = std_gvar_array_u32(NULL, 0);
793 return SR_OK;
794 } else {
795 if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
796 return SR_ERR_ARG;
797 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
798 return SR_OK;
799 }
800 break;
801 case SR_CONF_COUPLING:
802 if (!cg)
803 return SR_ERR_CHANNEL_GROUP;
804 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
805 break;
806 case SR_CONF_PROBE_FACTOR:
807 if (!cg)
808 return SR_ERR_CHANNEL_GROUP;
809 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
810 break;
811 case SR_CONF_VDIV:
812 if (!devc)
813 /* Can't know this until we have the exact model. */
814 return SR_ERR_ARG;
815 if (!cg)
816 return SR_ERR_CHANNEL_GROUP;
817 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
818 break;
819 case SR_CONF_TIMEBASE:
820 if (!devc)
821 /* Can't know this until we have the exact model. */
822 return SR_ERR_ARG;
823 if (devc->num_timebases <= 0)
824 return SR_ERR_NA;
825 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
826 break;
827 case SR_CONF_TRIGGER_SOURCE:
828 if (!devc)
829 /* Can't know this until we have the exact model. */
830 return SR_ERR_ARG;
831 *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources);
832 break;
833 case SR_CONF_TRIGGER_SLOPE:
834 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
835 break;
836 case SR_CONF_DATA_SOURCE:
837 if (!devc)
838 /* Can't know this until we have the exact model. */
839 return SR_ERR_ARG;
840 switch (devc->model->series->protocol) {
841 case PROTOCOL_V1:
842 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
843 break;
844 case PROTOCOL_V2:
845 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
846 break;
847 default:
848 *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
849 break;
850 }
851 break;
852 default:
853 return SR_ERR_NA;
854 }
855
856 return SR_OK;
857}
858
859static int dev_acquisition_start(const struct sr_dev_inst *sdi)
860{
861 struct sr_scpi_dev_inst *scpi;
862 struct dev_context *devc;
863 struct sr_channel *ch;
864 struct sr_datafeed_packet packet;
865 gboolean some_digital;
866 GSList *l;
867
868 scpi = sdi->conn;
869 devc = sdi->priv;
870
871 devc->num_frames = 0;
872
873 some_digital = FALSE;
874 for (l = sdi->channels; l; l = l->next) {
875 ch = l->data;
876 sr_dbg("handling channel %s", ch->name);
877 if (ch->type == SR_CHANNEL_ANALOG) {
878 if (ch->enabled)
879 devc->enabled_channels = g_slist_append(
880 devc->enabled_channels, ch);
881 if (ch->enabled != devc->analog_channels[ch->index]) {
882 /* Enabled channel is currently disabled, or vice versa. */
883 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
884 ch->enabled ? "ON" : "OFF") != SR_OK)
885 return SR_ERR;
886 devc->analog_channels[ch->index] = ch->enabled;
887 }
888 } else if (ch->type == SR_CHANNEL_LOGIC) {
889 /* Only one list entry for older protocols. All channels are
890 * retrieved together when this entry is processed. */
891 if (ch->enabled && (
892 devc->model->series->protocol > PROTOCOL_V3 ||
893 !some_digital))
894 devc->enabled_channels = g_slist_append(
895 devc->enabled_channels, ch);
896 if (ch->enabled) {
897 some_digital = TRUE;
898 /* Turn on LA module if currently off. */
899 if (!devc->la_enabled) {
900 if (rigol_ds_config_set(sdi,
901 devc->model->series->protocol >= PROTOCOL_V3 ?
902 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
903 return SR_ERR;
904 devc->la_enabled = TRUE;
905 }
906 }
907 if (ch->enabled != devc->digital_channels[ch->index]) {
908 /* Enabled channel is currently disabled, or vice versa. */
909 if (rigol_ds_config_set(sdi,
910 devc->model->series->protocol >= PROTOCOL_V3 ?
911 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
912 ch->enabled ? "ON" : "OFF") != SR_OK)
913 return SR_ERR;
914 devc->digital_channels[ch->index] = ch->enabled;
915 }
916 }
917 }
918
919 if (!devc->enabled_channels)
920 return SR_ERR;
921
922 /* Turn off LA module if on and no digital channels selected. */
923 if (devc->la_enabled && !some_digital)
924 if (rigol_ds_config_set(sdi,
925 devc->model->series->protocol >= PROTOCOL_V3 ?
926 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
927 return SR_ERR;
928
929 /* Set memory mode. */
930 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
931 sr_err("Data source 'Segmented' not yet supported");
932 return SR_ERR;
933 }
934
935 devc->analog_frame_size = analog_frame_size(sdi);
936 devc->digital_frame_size = digital_frame_size(sdi);
937
938 switch (devc->model->series->protocol) {
939 case PROTOCOL_V2:
940 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
941 return SR_ERR;
942 break;
943 case PROTOCOL_V3:
944 /* Apparently for the DS2000 the memory
945 * depth can only be set in Running state -
946 * this matches the behaviour of the UI. */
947 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
948 return SR_ERR;
949 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
950 devc->analog_frame_size) != SR_OK)
951 return SR_ERR;
952 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
953 return SR_ERR;
954 break;
955 default:
956 break;
957 }
958
959 if (devc->data_source == DATA_SOURCE_LIVE)
960 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
961 return SR_ERR;
962
963 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
964 rigol_ds_receive, (void *)sdi);
965
966 std_session_send_df_header(sdi);
967
968 devc->channel_entry = devc->enabled_channels;
969
970 if (rigol_ds_capture_start(sdi) != SR_OK)
971 return SR_ERR;
972
973 /* Start of first frame. */
974 packet.type = SR_DF_FRAME_BEGIN;
975 sr_session_send(sdi, &packet);
976
977 return SR_OK;
978}
979
980static int dev_acquisition_stop(struct sr_dev_inst *sdi)
981{
982 struct dev_context *devc;
983 struct sr_scpi_dev_inst *scpi;
984
985 devc = sdi->priv;
986
987 std_session_send_df_end(sdi);
988
989 g_slist_free(devc->enabled_channels);
990 devc->enabled_channels = NULL;
991 scpi = sdi->conn;
992 sr_scpi_source_remove(sdi->session, scpi);
993
994 return SR_OK;
995}
996
997static struct sr_dev_driver rigol_ds_driver_info = {
998 .name = "rigol-ds",
999 .longname = "Rigol DS",
1000 .api_version = 1,
1001 .init = std_init,
1002 .cleanup = std_cleanup,
1003 .scan = scan,
1004 .dev_list = std_dev_list,
1005 .dev_clear = dev_clear,
1006 .config_get = config_get,
1007 .config_set = config_set,
1008 .config_list = config_list,
1009 .dev_open = dev_open,
1010 .dev_close = dev_close,
1011 .dev_acquisition_start = dev_acquisition_start,
1012 .dev_acquisition_stop = dev_acquisition_stop,
1013 .context = NULL,
1014};
1015SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib