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1 | /* | |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2012 Martin Ling <martin-git@earth.li> | |
5 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> | |
6 | * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #include <config.h> | |
23 | #include <fcntl.h> | |
24 | #include <unistd.h> | |
25 | #include <stdlib.h> | |
26 | #include <string.h> | |
27 | #include <strings.h> | |
28 | #include <math.h> | |
29 | #include <glib.h> | |
30 | #include <libsigrok/libsigrok.h> | |
31 | #include "libsigrok-internal.h" | |
32 | #include "scpi.h" | |
33 | #include "protocol.h" | |
34 | ||
35 | static const uint32_t scanopts[] = { | |
36 | SR_CONF_CONN, | |
37 | SR_CONF_SERIALCOMM, | |
38 | }; | |
39 | ||
40 | static const uint32_t drvopts[] = { | |
41 | SR_CONF_OSCILLOSCOPE, | |
42 | }; | |
43 | ||
44 | static const uint32_t devopts[] = { | |
45 | SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET, | |
46 | SR_CONF_SAMPLERATE | SR_CONF_GET, | |
47 | SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
48 | SR_CONF_NUM_HDIV | SR_CONF_GET, | |
49 | SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET, | |
50 | SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
51 | SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
52 | SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET, | |
53 | SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
54 | }; | |
55 | ||
56 | static const uint32_t devopts_cg_analog[] = { | |
57 | SR_CONF_NUM_VDIV | SR_CONF_GET, | |
58 | SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
59 | SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
60 | SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
61 | }; | |
62 | ||
63 | static const uint64_t timebases[][2] = { | |
64 | /* nanoseconds */ | |
65 | { 1, 1000000000 }, | |
66 | { 2, 1000000000 }, | |
67 | { 5, 1000000000 }, | |
68 | { 10, 1000000000 }, | |
69 | { 20, 1000000000 }, | |
70 | { 50, 1000000000 }, | |
71 | { 100, 1000000000 }, | |
72 | { 500, 1000000000 }, | |
73 | /* microseconds */ | |
74 | { 1, 1000000 }, | |
75 | { 2, 1000000 }, | |
76 | { 5, 1000000 }, | |
77 | { 10, 1000000 }, | |
78 | { 20, 1000000 }, | |
79 | { 50, 1000000 }, | |
80 | { 100, 1000000 }, | |
81 | { 200, 1000000 }, | |
82 | { 500, 1000000 }, | |
83 | /* milliseconds */ | |
84 | { 1, 1000 }, | |
85 | { 2, 1000 }, | |
86 | { 5, 1000 }, | |
87 | { 10, 1000 }, | |
88 | { 20, 1000 }, | |
89 | { 50, 1000 }, | |
90 | { 100, 1000 }, | |
91 | { 200, 1000 }, | |
92 | { 500, 1000 }, | |
93 | /* seconds */ | |
94 | { 1, 1 }, | |
95 | { 2, 1 }, | |
96 | { 5, 1 }, | |
97 | { 10, 1 }, | |
98 | { 20, 1 }, | |
99 | { 50, 1 }, | |
100 | { 100, 1 }, | |
101 | { 200, 1 }, | |
102 | { 500, 1 }, | |
103 | { 1000, 1 }, | |
104 | }; | |
105 | ||
106 | static const uint64_t vdivs[][2] = { | |
107 | /* microvolts */ | |
108 | { 500, 1000000 }, | |
109 | /* millivolts */ | |
110 | { 1, 1000 }, | |
111 | { 2, 1000 }, | |
112 | { 5, 1000 }, | |
113 | { 10, 1000 }, | |
114 | { 20, 1000 }, | |
115 | { 50, 1000 }, | |
116 | { 100, 1000 }, | |
117 | { 200, 1000 }, | |
118 | { 500, 1000 }, | |
119 | /* volts */ | |
120 | { 1, 1 }, | |
121 | { 2, 1 }, | |
122 | { 5, 1 }, | |
123 | { 10, 1 }, | |
124 | { 20, 1 }, | |
125 | { 50, 1 }, | |
126 | { 100, 1 }, | |
127 | }; | |
128 | ||
129 | static const char *trigger_sources_2_chans[] = { | |
130 | "CH1", "CH2", | |
131 | "EXT", "AC Line", | |
132 | "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7", | |
133 | "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15", | |
134 | }; | |
135 | ||
136 | static const char *trigger_sources_4_chans[] = { | |
137 | "CH1", "CH2", "CH3", "CH4", | |
138 | "EXT", "AC Line", | |
139 | "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7", | |
140 | "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15", | |
141 | }; | |
142 | ||
143 | static const char *trigger_slopes[] = { | |
144 | "r", "f", | |
145 | }; | |
146 | ||
147 | static const char *coupling[] = { | |
148 | "AC", "DC", "GND", | |
149 | }; | |
150 | ||
151 | static const uint64_t probe_factor[] = { | |
152 | 1, 2, 5, 10, 20, 50, 100, 200, 500, 1000, | |
153 | }; | |
154 | ||
155 | /* Do not change the order of entries */ | |
156 | static const char *data_sources[] = { | |
157 | "Live", | |
158 | "Memory", | |
159 | "Segmented", | |
160 | }; | |
161 | ||
162 | static const struct rigol_ds_command std_cmd[] = { | |
163 | { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" }, | |
164 | { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" }, | |
165 | }; | |
166 | ||
167 | static const struct rigol_ds_command mso7000a_cmd[] = { | |
168 | { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" }, | |
169 | { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" }, | |
170 | }; | |
171 | ||
172 | enum vendor { | |
173 | RIGOL, | |
174 | AGILENT, | |
175 | }; | |
176 | ||
177 | enum series { | |
178 | VS5000, | |
179 | DS1000, | |
180 | DS2000, | |
181 | DS2000A, | |
182 | DSO1000, | |
183 | DSO1000B, | |
184 | DS1000Z, | |
185 | DS4000, | |
186 | MSO5000, | |
187 | MSO7000A, | |
188 | }; | |
189 | ||
190 | /* short name, full name */ | |
191 | static const struct rigol_ds_vendor supported_vendors[] = { | |
192 | [RIGOL] = {"Rigol", "Rigol Technologies"}, | |
193 | [AGILENT] = {"Agilent", "Agilent Technologies"}, | |
194 | }; | |
195 | ||
196 | #define VENDOR(x) &supported_vendors[x] | |
197 | /* vendor, series/name, protocol, data format, max timebase, min vdiv, | |
198 | * number of horizontal divs, live waveform samples, memory buffer samples */ | |
199 | static const struct rigol_ds_series supported_series[] = { | |
200 | [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW, | |
201 | {50, 1}, {2, 1000}, 14, 2048, 0}, | |
202 | [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2, | |
203 | {50, 1}, {2, 1000}, 12, 600, 1048576}, | |
204 | [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2, | |
205 | {500, 1}, {500, 1000000}, 14, 1400, 14000}, | |
206 | [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2, | |
207 | {1000, 1}, {500, 1000000}, 14, 1400, 14000}, | |
208 | [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2, | |
209 | {50, 1}, {2, 1000}, 12, 600, 20480}, | |
210 | [DSO1000B] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2, | |
211 | {50, 1}, {2, 1000}, 12, 600, 20480}, | |
212 | [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2, | |
213 | {50, 1}, {1, 1000}, 12, 1200, 12000000}, | |
214 | [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2, | |
215 | {1000, 1}, {1, 1000}, 14, 1400, 0}, | |
216 | [MSO5000] = {VENDOR(RIGOL), "MSO5000", PROTOCOL_V5, FORMAT_IEEE488_2, | |
217 | {1000, 1}, {500, 1000000}, 10, 1000, 0}, | |
218 | [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2, | |
219 | {50, 1}, {2, 1000}, 10, 1000, 8000000}, | |
220 | }; | |
221 | ||
222 | #define SERIES(x) &supported_series[x] | |
223 | /* | |
224 | * Use a macro to select the correct list of trigger sources and its length | |
225 | * based on the number of analog channels and presence of digital channels. | |
226 | */ | |
227 | #define CH_INFO(num, digital) \ | |
228 | num, digital, trigger_sources_##num##_chans, \ | |
229 | digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2) | |
230 | /* series, model, min timebase, analog channels, digital */ | |
231 | static const struct rigol_ds_model supported_models[] = { | |
232 | {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd}, | |
233 | {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd}, | |
234 | {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd}, | |
235 | {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
236 | {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
237 | {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd}, | |
238 | {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd}, | |
239 | {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd}, | |
240 | {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd}, | |
241 | {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd}, | |
242 | {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd}, | |
243 | {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
244 | {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
245 | {SERIES(DS1000), "DS1152E-EDU", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
246 | {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd}, | |
247 | {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd}, | |
248 | {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd}, | |
249 | {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd}, | |
250 | {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd}, | |
251 | {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
252 | {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd}, | |
253 | {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd}, | |
254 | {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd}, | |
255 | {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
256 | {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd}, | |
257 | {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd}, | |
258 | {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd}, | |
259 | {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd}, | |
260 | {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd}, | |
261 | {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd}, | |
262 | {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd}, | |
263 | {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
264 | {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd}, | |
265 | {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
266 | {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd}, | |
267 | {SERIES(DSO1000B), "DSO1052B", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
268 | {SERIES(DSO1000B), "DSO1072B", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
269 | {SERIES(DSO1000B), "DSO1102B", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
270 | {SERIES(DSO1000B), "DSO1152B", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
271 | {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd}, | |
272 | {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd}, | |
273 | {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd}, | |
274 | {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd}, | |
275 | {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd}, | |
276 | {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd}, | |
277 | {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd}, | |
278 | {SERIES(DS1000Z), "DS1202Z-E", {2, 1000000000}, CH_INFO(2, false), std_cmd}, | |
279 | {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd}, | |
280 | {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd}, | |
281 | {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd}, | |
282 | {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd}, | |
283 | {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd}, | |
284 | {SERIES(MSO5000), "MSO5072", {1, 1000000000}, CH_INFO(2, true), std_cmd}, | |
285 | {SERIES(MSO5000), "MSO5074", {1, 1000000000}, CH_INFO(4, true), std_cmd}, | |
286 | {SERIES(MSO5000), "MSO5102", {1, 1000000000}, CH_INFO(2, true), std_cmd}, | |
287 | {SERIES(MSO5000), "MSO5104", {1, 1000000000}, CH_INFO(4, true), std_cmd}, | |
288 | {SERIES(MSO5000), "MSO5204", {1, 1000000000}, CH_INFO(4, true), std_cmd}, | |
289 | {SERIES(MSO5000), "MSO5354", {1, 1000000000}, CH_INFO(4, true), std_cmd}, | |
290 | /* TODO: Digital channels are not yet supported on MSO7000A. */ | |
291 | {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd}, | |
292 | }; | |
293 | ||
294 | static struct sr_dev_driver rigol_ds_driver_info; | |
295 | ||
296 | static int analog_frame_size(const struct sr_dev_inst *); | |
297 | ||
298 | static void clear_helper(struct dev_context *devc) | |
299 | { | |
300 | unsigned int i; | |
301 | ||
302 | g_free(devc->data); | |
303 | g_free(devc->buffer); | |
304 | for (i = 0; i < ARRAY_SIZE(devc->coupling); i++) | |
305 | g_free(devc->coupling[i]); | |
306 | g_free(devc->trigger_source); | |
307 | g_free(devc->trigger_slope); | |
308 | g_free(devc->analog_groups); | |
309 | } | |
310 | ||
311 | static int dev_clear(const struct sr_dev_driver *di) | |
312 | { | |
313 | return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper); | |
314 | } | |
315 | ||
316 | static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi) | |
317 | { | |
318 | struct dev_context *devc; | |
319 | struct sr_dev_inst *sdi; | |
320 | struct sr_scpi_hw_info *hw_info; | |
321 | struct sr_channel *ch; | |
322 | long n[3]; | |
323 | unsigned int i; | |
324 | const struct rigol_ds_model *model = NULL; | |
325 | gchar *channel_name, **version; | |
326 | ||
327 | if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) { | |
328 | sr_info("Couldn't get IDN response, retrying."); | |
329 | sr_scpi_close(scpi); | |
330 | sr_scpi_open(scpi); | |
331 | if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) { | |
332 | sr_info("Couldn't get IDN response."); | |
333 | return NULL; | |
334 | } | |
335 | } | |
336 | ||
337 | for (i = 0; i < ARRAY_SIZE(supported_models); i++) { | |
338 | if (!g_ascii_strcasecmp(hw_info->manufacturer, | |
339 | supported_models[i].series->vendor->full_name) && | |
340 | !strcmp(hw_info->model, supported_models[i].name)) { | |
341 | model = &supported_models[i]; | |
342 | break; | |
343 | } | |
344 | } | |
345 | ||
346 | if (!model) { | |
347 | sr_scpi_hw_info_free(hw_info); | |
348 | return NULL; | |
349 | } | |
350 | ||
351 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); | |
352 | sdi->vendor = g_strdup(model->series->vendor->name); | |
353 | sdi->model = g_strdup(model->name); | |
354 | sdi->version = g_strdup(hw_info->firmware_version); | |
355 | sdi->conn = scpi; | |
356 | sdi->driver = &rigol_ds_driver_info; | |
357 | sdi->inst_type = SR_INST_SCPI; | |
358 | sdi->serial_num = g_strdup(hw_info->serial_number); | |
359 | devc = g_malloc0(sizeof(struct dev_context)); | |
360 | devc->limit_frames = 0; | |
361 | devc->model = model; | |
362 | devc->format = model->series->format; | |
363 | ||
364 | /* DS1000 models with firmware before 0.2.4 used the old data format. */ | |
365 | if (model->series == SERIES(DS1000)) { | |
366 | version = g_strsplit(hw_info->firmware_version, ".", 0); | |
367 | do { | |
368 | if (!version[0] || !version[1] || !version[2]) | |
369 | break; | |
370 | if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0) | |
371 | break; | |
372 | for (i = 0; i < 3; i++) { | |
373 | if (sr_atol(version[i], &n[i]) != SR_OK) | |
374 | break; | |
375 | } | |
376 | if (i != 3) | |
377 | break; | |
378 | scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2]; | |
379 | if (scpi->firmware_version < 24) { | |
380 | sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format."); | |
381 | devc->format = FORMAT_RAW; | |
382 | } | |
383 | break; | |
384 | } while (0); | |
385 | g_strfreev(version); | |
386 | } | |
387 | ||
388 | sr_scpi_hw_info_free(hw_info); | |
389 | ||
390 | devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) * | |
391 | model->analog_channels); | |
392 | ||
393 | for (i = 0; i < model->analog_channels; i++) { | |
394 | channel_name = g_strdup_printf("CH%d", i + 1); | |
395 | ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name); | |
396 | ||
397 | devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group)); | |
398 | ||
399 | devc->analog_groups[i]->name = channel_name; | |
400 | devc->analog_groups[i]->channels = g_slist_append(NULL, ch); | |
401 | sdi->channel_groups = g_slist_append(sdi->channel_groups, | |
402 | devc->analog_groups[i]); | |
403 | } | |
404 | ||
405 | if (devc->model->has_digital) { | |
406 | devc->digital_group = g_malloc0(sizeof(struct sr_channel_group)); | |
407 | ||
408 | for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) { | |
409 | channel_name = g_strdup_printf("D%d", i); | |
410 | ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name); | |
411 | g_free(channel_name); | |
412 | devc->digital_group->channels = g_slist_append( | |
413 | devc->digital_group->channels, ch); | |
414 | } | |
415 | devc->digital_group->name = g_strdup("LA"); | |
416 | sdi->channel_groups = g_slist_append(sdi->channel_groups, | |
417 | devc->digital_group); | |
418 | } | |
419 | ||
420 | for (i = 0; i < ARRAY_SIZE(timebases); i++) { | |
421 | if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2]))) | |
422 | devc->timebases = &timebases[i]; | |
423 | if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2]))) | |
424 | devc->num_timebases = &timebases[i] - devc->timebases + 1; | |
425 | } | |
426 | ||
427 | for (i = 0; i < ARRAY_SIZE(vdivs); i++) { | |
428 | if (!memcmp(&devc->model->series->min_vdiv, | |
429 | &vdivs[i], sizeof(uint64_t[2]))) { | |
430 | devc->vdivs = &vdivs[i]; | |
431 | devc->num_vdivs = ARRAY_SIZE(vdivs) - i; | |
432 | } | |
433 | } | |
434 | ||
435 | devc->buffer = g_malloc(ACQ_BUFFER_SIZE); | |
436 | devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float)); | |
437 | ||
438 | devc->data_source = DATA_SOURCE_LIVE; | |
439 | ||
440 | sdi->priv = devc; | |
441 | ||
442 | return sdi; | |
443 | } | |
444 | ||
445 | static GSList *scan(struct sr_dev_driver *di, GSList *options) | |
446 | { | |
447 | return sr_scpi_scan(di->context, options, probe_device); | |
448 | } | |
449 | ||
450 | static int dev_open(struct sr_dev_inst *sdi) | |
451 | { | |
452 | int ret; | |
453 | struct sr_scpi_dev_inst *scpi = sdi->conn; | |
454 | ||
455 | if ((ret = sr_scpi_open(scpi)) < 0) { | |
456 | sr_err("Failed to open SCPI device: %s.", sr_strerror(ret)); | |
457 | return SR_ERR; | |
458 | } | |
459 | ||
460 | if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) { | |
461 | sr_err("Failed to get device config: %s.", sr_strerror(ret)); | |
462 | return SR_ERR; | |
463 | } | |
464 | ||
465 | return SR_OK; | |
466 | } | |
467 | ||
468 | static int dev_close(struct sr_dev_inst *sdi) | |
469 | { | |
470 | struct sr_scpi_dev_inst *scpi; | |
471 | struct dev_context *devc; | |
472 | ||
473 | scpi = sdi->conn; | |
474 | devc = sdi->priv; | |
475 | ||
476 | if (!scpi) | |
477 | return SR_ERR_BUG; | |
478 | ||
479 | if (devc->model->series->protocol == PROTOCOL_V2) | |
480 | rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE"); | |
481 | ||
482 | return sr_scpi_close(scpi); | |
483 | } | |
484 | ||
485 | static int analog_frame_size(const struct sr_dev_inst *sdi) | |
486 | { | |
487 | struct dev_context *devc = sdi->priv; | |
488 | struct sr_channel *ch; | |
489 | int analog_channels = 0; | |
490 | GSList *l; | |
491 | ||
492 | for (l = sdi->channels; l; l = l->next) { | |
493 | ch = l->data; | |
494 | if (ch->type == SR_CHANNEL_ANALOG && ch->enabled) | |
495 | analog_channels++; | |
496 | } | |
497 | ||
498 | if (analog_channels == 0) | |
499 | return 0; | |
500 | ||
501 | switch (devc->data_source) { | |
502 | case DATA_SOURCE_LIVE: | |
503 | return devc->model->series->live_samples; | |
504 | case DATA_SOURCE_MEMORY: | |
505 | case DATA_SOURCE_SEGMENTED: | |
506 | return devc->model->series->buffer_samples / analog_channels; | |
507 | default: | |
508 | return 0; | |
509 | } | |
510 | } | |
511 | ||
512 | static int digital_frame_size(const struct sr_dev_inst *sdi) | |
513 | { | |
514 | struct dev_context *devc = sdi->priv; | |
515 | ||
516 | switch (devc->data_source) { | |
517 | case DATA_SOURCE_LIVE: | |
518 | return devc->model->series->live_samples * 2; | |
519 | case DATA_SOURCE_MEMORY: | |
520 | case DATA_SOURCE_SEGMENTED: | |
521 | return devc->model->series->buffer_samples * 2; | |
522 | default: | |
523 | return 0; | |
524 | } | |
525 | } | |
526 | ||
527 | static int config_get(uint32_t key, GVariant **data, | |
528 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
529 | { | |
530 | struct dev_context *devc; | |
531 | struct sr_channel *ch; | |
532 | const char *tmp_str; | |
533 | int analog_channel = -1; | |
534 | float smallest_diff = INFINITY; | |
535 | int idx = -1; | |
536 | unsigned i; | |
537 | ||
538 | if (!sdi) | |
539 | return SR_ERR_ARG; | |
540 | ||
541 | devc = sdi->priv; | |
542 | ||
543 | /* If a channel group is specified, it must be a valid one. */ | |
544 | if (cg && !g_slist_find(sdi->channel_groups, cg)) { | |
545 | sr_err("Invalid channel group specified."); | |
546 | return SR_ERR; | |
547 | } | |
548 | ||
549 | if (cg) { | |
550 | ch = g_slist_nth_data(cg->channels, 0); | |
551 | if (!ch) | |
552 | return SR_ERR; | |
553 | if (ch->type == SR_CHANNEL_ANALOG) { | |
554 | if (ch->name[2] < '1' || ch->name[2] > '4') | |
555 | return SR_ERR; | |
556 | analog_channel = ch->name[2] - '1'; | |
557 | } | |
558 | } | |
559 | ||
560 | switch (key) { | |
561 | case SR_CONF_NUM_HDIV: | |
562 | *data = g_variant_new_int32(devc->model->series->num_horizontal_divs); | |
563 | break; | |
564 | case SR_CONF_NUM_VDIV: | |
565 | *data = g_variant_new_int32(devc->num_vdivs); | |
566 | break; | |
567 | case SR_CONF_DATA_SOURCE: | |
568 | if (devc->data_source == DATA_SOURCE_LIVE) | |
569 | *data = g_variant_new_string("Live"); | |
570 | else if (devc->data_source == DATA_SOURCE_MEMORY) | |
571 | *data = g_variant_new_string("Memory"); | |
572 | else | |
573 | *data = g_variant_new_string("Segmented"); | |
574 | break; | |
575 | case SR_CONF_LIMIT_FRAMES: | |
576 | *data = g_variant_new_uint64(devc->limit_frames); | |
577 | break; | |
578 | case SR_CONF_SAMPLERATE: | |
579 | *data = g_variant_new_uint64(devc->sample_rate); | |
580 | break; | |
581 | case SR_CONF_TRIGGER_SOURCE: | |
582 | if (!strcmp(devc->trigger_source, "ACL")) | |
583 | tmp_str = "AC Line"; | |
584 | else if (!strcmp(devc->trigger_source, "CHAN1")) | |
585 | tmp_str = "CH1"; | |
586 | else if (!strcmp(devc->trigger_source, "CHAN2")) | |
587 | tmp_str = "CH2"; | |
588 | else if (!strcmp(devc->trigger_source, "CHAN3")) | |
589 | tmp_str = "CH3"; | |
590 | else if (!strcmp(devc->trigger_source, "CHAN4")) | |
591 | tmp_str = "CH4"; | |
592 | else | |
593 | tmp_str = devc->trigger_source; | |
594 | *data = g_variant_new_string(tmp_str); | |
595 | break; | |
596 | case SR_CONF_TRIGGER_SLOPE: | |
597 | if (!strncmp(devc->trigger_slope, "POS", 3)) { | |
598 | tmp_str = "r"; | |
599 | } else if (!strncmp(devc->trigger_slope, "NEG", 3)) { | |
600 | tmp_str = "f"; | |
601 | } else { | |
602 | sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope); | |
603 | return SR_ERR_NA; | |
604 | } | |
605 | *data = g_variant_new_string(tmp_str); | |
606 | break; | |
607 | case SR_CONF_TRIGGER_LEVEL: | |
608 | *data = g_variant_new_double(devc->trigger_level); | |
609 | break; | |
610 | case SR_CONF_TIMEBASE: | |
611 | for (i = 0; i < devc->num_timebases; i++) { | |
612 | float tb = (float)devc->timebases[i][0] / devc->timebases[i][1]; | |
613 | float diff = fabs(devc->timebase - tb); | |
614 | if (diff < smallest_diff) { | |
615 | smallest_diff = diff; | |
616 | idx = i; | |
617 | } | |
618 | } | |
619 | if (idx < 0) { | |
620 | sr_dbg("Negative timebase index: %d.", idx); | |
621 | return SR_ERR_NA; | |
622 | } | |
623 | *data = g_variant_new("(tt)", devc->timebases[idx][0], | |
624 | devc->timebases[idx][1]); | |
625 | break; | |
626 | case SR_CONF_VDIV: | |
627 | if (analog_channel < 0) { | |
628 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
629 | return SR_ERR_NA; | |
630 | } | |
631 | for (i = 0; i < ARRAY_SIZE(vdivs); i++) { | |
632 | float vdiv = (float)vdivs[i][0] / vdivs[i][1]; | |
633 | float diff = fabs(devc->vdiv[analog_channel] - vdiv); | |
634 | if (diff < smallest_diff) { | |
635 | smallest_diff = diff; | |
636 | idx = i; | |
637 | } | |
638 | } | |
639 | if (idx < 0) { | |
640 | sr_dbg("Negative vdiv index: %d.", idx); | |
641 | return SR_ERR_NA; | |
642 | } | |
643 | *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]); | |
644 | break; | |
645 | case SR_CONF_COUPLING: | |
646 | if (analog_channel < 0) { | |
647 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
648 | return SR_ERR_NA; | |
649 | } | |
650 | *data = g_variant_new_string(devc->coupling[analog_channel]); | |
651 | break; | |
652 | case SR_CONF_PROBE_FACTOR: | |
653 | if (analog_channel < 0) { | |
654 | sr_dbg("Negative analog channel: %d.", analog_channel); | |
655 | return SR_ERR_NA; | |
656 | } | |
657 | *data = g_variant_new_uint64(devc->attenuation[analog_channel]); | |
658 | break; | |
659 | default: | |
660 | return SR_ERR_NA; | |
661 | } | |
662 | ||
663 | return SR_OK; | |
664 | } | |
665 | ||
666 | static int config_set(uint32_t key, GVariant *data, | |
667 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
668 | { | |
669 | struct dev_context *devc; | |
670 | uint64_t p; | |
671 | double t_dbl; | |
672 | int ret, idx, i; | |
673 | const char *tmp_str; | |
674 | char buffer[16]; | |
675 | ||
676 | devc = sdi->priv; | |
677 | ||
678 | /* If a channel group is specified, it must be a valid one. */ | |
679 | if (cg && !g_slist_find(sdi->channel_groups, cg)) { | |
680 | sr_err("Invalid channel group specified."); | |
681 | return SR_ERR; | |
682 | } | |
683 | ||
684 | switch (key) { | |
685 | case SR_CONF_LIMIT_FRAMES: | |
686 | devc->limit_frames = g_variant_get_uint64(data); | |
687 | break; | |
688 | case SR_CONF_TRIGGER_SLOPE: | |
689 | if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0) | |
690 | return SR_ERR_ARG; | |
691 | g_free(devc->trigger_slope); | |
692 | devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG"); | |
693 | return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope); | |
694 | case SR_CONF_HORIZ_TRIGGERPOS: | |
695 | t_dbl = g_variant_get_double(data); | |
696 | if (t_dbl < 0.0 || t_dbl > 1.0) { | |
697 | sr_err("Invalid horiz. trigger position: %g.", t_dbl); | |
698 | return SR_ERR; | |
699 | } | |
700 | devc->horiz_triggerpos = t_dbl; | |
701 | /* We have the trigger offset as a percentage of the frame, but | |
702 | * need to express this in seconds. */ | |
703 | t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases; | |
704 | g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl); | |
705 | return rigol_ds_config_set(sdi, | |
706 | devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer); | |
707 | case SR_CONF_TRIGGER_LEVEL: | |
708 | t_dbl = g_variant_get_double(data); | |
709 | g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl); | |
710 | ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer); | |
711 | if (ret == SR_OK) | |
712 | devc->trigger_level = t_dbl; | |
713 | return ret; | |
714 | case SR_CONF_TIMEBASE: | |
715 | if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0) | |
716 | return SR_ERR_ARG; | |
717 | devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1]; | |
718 | g_ascii_formatd(buffer, sizeof(buffer), "%.9f", | |
719 | devc->timebase); | |
720 | return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer); | |
721 | case SR_CONF_TRIGGER_SOURCE: | |
722 | if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0) | |
723 | return SR_ERR_ARG; | |
724 | g_free(devc->trigger_source); | |
725 | devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]); | |
726 | if (!strcmp(devc->trigger_source, "AC Line")) | |
727 | tmp_str = "ACL"; | |
728 | else if (!strcmp(devc->trigger_source, "CH1")) | |
729 | tmp_str = "CHAN1"; | |
730 | else if (!strcmp(devc->trigger_source, "CH2")) | |
731 | tmp_str = "CHAN2"; | |
732 | else if (!strcmp(devc->trigger_source, "CH3")) | |
733 | tmp_str = "CHAN3"; | |
734 | else if (!strcmp(devc->trigger_source, "CH4")) | |
735 | tmp_str = "CHAN4"; | |
736 | else | |
737 | tmp_str = (char *)devc->trigger_source; | |
738 | return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str); | |
739 | case SR_CONF_VDIV: | |
740 | if (!cg) | |
741 | return SR_ERR_CHANNEL_GROUP; | |
742 | if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0) | |
743 | return SR_ERR_ARG; | |
744 | if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0) | |
745 | return SR_ERR_ARG; | |
746 | devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1]; | |
747 | g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]); | |
748 | return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer); | |
749 | case SR_CONF_COUPLING: | |
750 | if (!cg) | |
751 | return SR_ERR_CHANNEL_GROUP; | |
752 | if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0) | |
753 | return SR_ERR_ARG; | |
754 | if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0) | |
755 | return SR_ERR_ARG; | |
756 | g_free(devc->coupling[i]); | |
757 | devc->coupling[i] = g_strdup(coupling[idx]); | |
758 | return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]); | |
759 | case SR_CONF_PROBE_FACTOR: | |
760 | if (!cg) | |
761 | return SR_ERR_CHANNEL_GROUP; | |
762 | if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0) | |
763 | return SR_ERR_ARG; | |
764 | if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0) | |
765 | return SR_ERR_ARG; | |
766 | p = g_variant_get_uint64(data); | |
767 | devc->attenuation[i] = probe_factor[idx]; | |
768 | ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p); | |
769 | if (ret == SR_OK) | |
770 | rigol_ds_get_dev_cfg_vertical(sdi); | |
771 | return ret; | |
772 | case SR_CONF_DATA_SOURCE: | |
773 | tmp_str = g_variant_get_string(data, NULL); | |
774 | if (!strcmp(tmp_str, "Live")) | |
775 | devc->data_source = DATA_SOURCE_LIVE; | |
776 | else if (devc->model->series->protocol >= PROTOCOL_V2 | |
777 | && !strcmp(tmp_str, "Memory")) | |
778 | devc->data_source = DATA_SOURCE_MEMORY; | |
779 | else if (devc->model->series->protocol >= PROTOCOL_V3 | |
780 | && !strcmp(tmp_str, "Segmented")) | |
781 | devc->data_source = DATA_SOURCE_SEGMENTED; | |
782 | else { | |
783 | sr_err("Unknown data source: '%s'.", tmp_str); | |
784 | return SR_ERR; | |
785 | } | |
786 | break; | |
787 | default: | |
788 | return SR_ERR_NA; | |
789 | } | |
790 | ||
791 | return SR_OK; | |
792 | } | |
793 | ||
794 | static int config_list(uint32_t key, GVariant **data, | |
795 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
796 | { | |
797 | struct dev_context *devc; | |
798 | ||
799 | devc = (sdi) ? sdi->priv : NULL; | |
800 | ||
801 | switch (key) { | |
802 | case SR_CONF_SCAN_OPTIONS: | |
803 | case SR_CONF_DEVICE_OPTIONS: | |
804 | if (!cg) | |
805 | return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts); | |
806 | if (!devc) | |
807 | return SR_ERR_ARG; | |
808 | if (cg == devc->digital_group) { | |
809 | *data = std_gvar_array_u32(NULL, 0); | |
810 | return SR_OK; | |
811 | } else { | |
812 | if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0) | |
813 | return SR_ERR_ARG; | |
814 | *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog)); | |
815 | return SR_OK; | |
816 | } | |
817 | break; | |
818 | case SR_CONF_COUPLING: | |
819 | if (!cg) | |
820 | return SR_ERR_CHANNEL_GROUP; | |
821 | *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling)); | |
822 | break; | |
823 | case SR_CONF_PROBE_FACTOR: | |
824 | if (!cg) | |
825 | return SR_ERR_CHANNEL_GROUP; | |
826 | *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor)); | |
827 | break; | |
828 | case SR_CONF_VDIV: | |
829 | if (!devc) | |
830 | /* Can't know this until we have the exact model. */ | |
831 | return SR_ERR_ARG; | |
832 | if (!cg) | |
833 | return SR_ERR_CHANNEL_GROUP; | |
834 | *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs); | |
835 | break; | |
836 | case SR_CONF_TIMEBASE: | |
837 | if (!devc) | |
838 | /* Can't know this until we have the exact model. */ | |
839 | return SR_ERR_ARG; | |
840 | if (devc->num_timebases <= 0) | |
841 | return SR_ERR_NA; | |
842 | *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases); | |
843 | break; | |
844 | case SR_CONF_TRIGGER_SOURCE: | |
845 | if (!devc) | |
846 | /* Can't know this until we have the exact model. */ | |
847 | return SR_ERR_ARG; | |
848 | *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources); | |
849 | break; | |
850 | case SR_CONF_TRIGGER_SLOPE: | |
851 | *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes)); | |
852 | break; | |
853 | case SR_CONF_DATA_SOURCE: | |
854 | if (!devc) | |
855 | /* Can't know this until we have the exact model. */ | |
856 | return SR_ERR_ARG; | |
857 | switch (devc->model->series->protocol) { | |
858 | case PROTOCOL_V1: | |
859 | *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2); | |
860 | break; | |
861 | case PROTOCOL_V2: | |
862 | *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1); | |
863 | break; | |
864 | default: | |
865 | *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources)); | |
866 | break; | |
867 | } | |
868 | break; | |
869 | default: | |
870 | return SR_ERR_NA; | |
871 | } | |
872 | ||
873 | return SR_OK; | |
874 | } | |
875 | ||
876 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) | |
877 | { | |
878 | struct sr_scpi_dev_inst *scpi; | |
879 | struct dev_context *devc; | |
880 | struct sr_channel *ch; | |
881 | gboolean some_digital; | |
882 | GSList *l; | |
883 | char *cmd; | |
884 | int protocol; | |
885 | ||
886 | scpi = sdi->conn; | |
887 | devc = sdi->priv; | |
888 | protocol = devc->model->series->protocol; | |
889 | ||
890 | devc->num_frames = 0; | |
891 | devc->num_frames_segmented = 0; | |
892 | ||
893 | some_digital = FALSE; | |
894 | for (l = sdi->channels; l; l = l->next) { | |
895 | ch = l->data; | |
896 | sr_dbg("handling channel %s", ch->name); | |
897 | if (ch->type == SR_CHANNEL_ANALOG) { | |
898 | if (ch->enabled) | |
899 | devc->enabled_channels = g_slist_append( | |
900 | devc->enabled_channels, ch); | |
901 | if (ch->enabled != devc->analog_channels[ch->index]) { | |
902 | /* Enabled channel is currently disabled, or vice versa. */ | |
903 | if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1, | |
904 | ch->enabled ? "ON" : "OFF") != SR_OK) | |
905 | return SR_ERR; | |
906 | devc->analog_channels[ch->index] = ch->enabled; | |
907 | } | |
908 | } else if (ch->type == SR_CHANNEL_LOGIC) { | |
909 | /* Only one list entry for older protocols. All channels are | |
910 | * retrieved together when this entry is processed. */ | |
911 | if (ch->enabled && ( | |
912 | protocol > PROTOCOL_V3 || | |
913 | !some_digital)) | |
914 | devc->enabled_channels = g_slist_append( | |
915 | devc->enabled_channels, ch); | |
916 | if (ch->enabled) { | |
917 | some_digital = TRUE; | |
918 | /* Turn on LA module if currently off. */ | |
919 | if (!devc->la_enabled) { | |
920 | if (rigol_ds_config_set(sdi, protocol >= PROTOCOL_V3 ? | |
921 | ":LA:STAT ON" : ":LA:DISP ON") != SR_OK) | |
922 | return SR_ERR; | |
923 | devc->la_enabled = TRUE; | |
924 | } | |
925 | } | |
926 | if (ch->enabled != devc->digital_channels[ch->index]) { | |
927 | /* Enabled channel is currently disabled, or vice versa. */ | |
928 | if (protocol >= PROTOCOL_V5) | |
929 | cmd = ":LA:DISP D%d,%s"; | |
930 | else if (protocol >= PROTOCOL_V3) | |
931 | cmd = ":LA:DIG%d:DISP %s"; | |
932 | else | |
933 | cmd = ":DIG%d:TURN %s"; | |
934 | ||
935 | if (rigol_ds_config_set(sdi, cmd, ch->index, | |
936 | ch->enabled ? "ON" : "OFF") != SR_OK) | |
937 | return SR_ERR; | |
938 | devc->digital_channels[ch->index] = ch->enabled; | |
939 | } | |
940 | } | |
941 | } | |
942 | ||
943 | if (!devc->enabled_channels) | |
944 | return SR_ERR; | |
945 | ||
946 | /* Turn off LA module if on and no digital channels selected. */ | |
947 | if (devc->la_enabled && !some_digital) | |
948 | if (rigol_ds_config_set(sdi, | |
949 | devc->model->series->protocol >= PROTOCOL_V3 ? | |
950 | ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK) | |
951 | return SR_ERR; | |
952 | ||
953 | /* Set memory mode. */ | |
954 | if (devc->data_source == DATA_SOURCE_SEGMENTED) { | |
955 | switch (protocol) { | |
956 | case PROTOCOL_V1: | |
957 | case PROTOCOL_V2: | |
958 | /* V1 and V2 do not have segmented data */ | |
959 | sr_err("Data source 'Segmented' not supported on this model"); | |
960 | break; | |
961 | case PROTOCOL_V3: | |
962 | case PROTOCOL_V4: | |
963 | { | |
964 | int frames = 0; | |
965 | if (sr_scpi_get_int(sdi->conn, | |
966 | protocol == PROTOCOL_V4 ? "FUNC:WREP:FEND?" : | |
967 | "FUNC:WREP:FMAX?", &frames) != SR_OK) | |
968 | return SR_ERR; | |
969 | if (frames <= 0) { | |
970 | sr_err("No segmented data available"); | |
971 | return SR_ERR; | |
972 | } | |
973 | devc->num_frames_segmented = frames; | |
974 | break; | |
975 | } | |
976 | case PROTOCOL_V5: | |
977 | /* The frame limit has to be read on the fly, just set up | |
978 | * reading of the first frame */ | |
979 | if (rigol_ds_config_set(sdi, "REC:CURR 1") != SR_OK) | |
980 | return SR_ERR; | |
981 | break; | |
982 | default: | |
983 | sr_err("Data source 'Segmented' not yet supported"); | |
984 | return SR_ERR; | |
985 | } | |
986 | } | |
987 | ||
988 | devc->analog_frame_size = analog_frame_size(sdi); | |
989 | devc->digital_frame_size = digital_frame_size(sdi); | |
990 | ||
991 | switch (devc->model->series->protocol) { | |
992 | case PROTOCOL_V2: | |
993 | if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK) | |
994 | return SR_ERR; | |
995 | break; | |
996 | case PROTOCOL_V3: | |
997 | /* Apparently for the DS2000 the memory | |
998 | * depth can only be set in Running state - | |
999 | * this matches the behaviour of the UI. */ | |
1000 | if (rigol_ds_config_set(sdi, ":RUN") != SR_OK) | |
1001 | return SR_ERR; | |
1002 | if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d", | |
1003 | devc->analog_frame_size) != SR_OK) | |
1004 | return SR_ERR; | |
1005 | if (rigol_ds_config_set(sdi, ":STOP") != SR_OK) | |
1006 | return SR_ERR; | |
1007 | break; | |
1008 | default: | |
1009 | break; | |
1010 | } | |
1011 | ||
1012 | if (devc->data_source == DATA_SOURCE_LIVE) | |
1013 | if (rigol_ds_config_set(sdi, ":RUN") != SR_OK) | |
1014 | return SR_ERR; | |
1015 | ||
1016 | sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50, | |
1017 | rigol_ds_receive, (void *)sdi); | |
1018 | ||
1019 | std_session_send_df_header(sdi); | |
1020 | ||
1021 | devc->channel_entry = devc->enabled_channels; | |
1022 | ||
1023 | if (devc->data_source == DATA_SOURCE_LIVE) | |
1024 | devc->sample_rate = analog_frame_size(sdi) / | |
1025 | (devc->timebase * devc->model->series->num_horizontal_divs); | |
1026 | else { | |
1027 | float xinc; | |
1028 | if (devc->model->series->protocol >= PROTOCOL_V3 && | |
1029 | sr_scpi_get_float(sdi->conn, "WAV:XINC?", &xinc) != SR_OK) { | |
1030 | sr_err("Couldn't get sampling rate"); | |
1031 | return SR_ERR; | |
1032 | } | |
1033 | devc->sample_rate = 1. / xinc; | |
1034 | } | |
1035 | ||
1036 | ||
1037 | if (rigol_ds_capture_start(sdi) != SR_OK) | |
1038 | return SR_ERR; | |
1039 | ||
1040 | /* Start of first frame. */ | |
1041 | std_session_send_df_frame_begin(sdi); | |
1042 | ||
1043 | return SR_OK; | |
1044 | } | |
1045 | ||
1046 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) | |
1047 | { | |
1048 | struct dev_context *devc; | |
1049 | struct sr_scpi_dev_inst *scpi; | |
1050 | ||
1051 | devc = sdi->priv; | |
1052 | ||
1053 | std_session_send_df_end(sdi); | |
1054 | ||
1055 | g_slist_free(devc->enabled_channels); | |
1056 | devc->enabled_channels = NULL; | |
1057 | scpi = sdi->conn; | |
1058 | sr_scpi_source_remove(sdi->session, scpi); | |
1059 | ||
1060 | return SR_OK; | |
1061 | } | |
1062 | ||
1063 | static struct sr_dev_driver rigol_ds_driver_info = { | |
1064 | .name = "rigol-ds", | |
1065 | .longname = "Rigol DS", | |
1066 | .api_version = 1, | |
1067 | .init = std_init, | |
1068 | .cleanup = std_cleanup, | |
1069 | .scan = scan, | |
1070 | .dev_list = std_dev_list, | |
1071 | .dev_clear = dev_clear, | |
1072 | .config_get = config_get, | |
1073 | .config_set = config_set, | |
1074 | .config_list = config_list, | |
1075 | .dev_open = dev_open, | |
1076 | .dev_close = dev_close, | |
1077 | .dev_acquisition_start = dev_acquisition_start, | |
1078 | .dev_acquisition_stop = dev_acquisition_stop, | |
1079 | .context = NULL, | |
1080 | }; | |
1081 | SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info); |