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1 | /* | |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <config.h> | |
21 | #include "protocol.h" | |
22 | ||
23 | static const uint32_t devopts[] = { | |
24 | SR_CONF_LOGIC_ANALYZER, | |
25 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
26 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
27 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, | |
28 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
29 | SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
30 | SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET, | |
31 | SR_CONF_SWAP | SR_CONF_SET, | |
32 | SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET, | |
33 | }; | |
34 | ||
35 | static const int32_t trigger_matches[] = { | |
36 | SR_TRIGGER_ZERO, | |
37 | SR_TRIGGER_ONE, | |
38 | SR_TRIGGER_RISING, | |
39 | SR_TRIGGER_FALLING, | |
40 | }; | |
41 | ||
42 | #define STR_PATTERN_NONE "None" | |
43 | #define STR_PATTERN_EXTERNAL "External" | |
44 | #define STR_PATTERN_INTERNAL "Internal" | |
45 | ||
46 | /* Supported methods of test pattern outputs */ | |
47 | enum { | |
48 | /** | |
49 | * Capture pins 31:16 (unbuffered wing) output a test pattern | |
50 | * that can captured on pins 0:15. | |
51 | */ | |
52 | PATTERN_EXTERNAL, | |
53 | ||
54 | /** Route test pattern internally to capture buffer. */ | |
55 | PATTERN_INTERNAL, | |
56 | }; | |
57 | ||
58 | static const char *patterns[] = { | |
59 | STR_PATTERN_NONE, | |
60 | STR_PATTERN_EXTERNAL, | |
61 | STR_PATTERN_INTERNAL, | |
62 | }; | |
63 | ||
64 | /* Channels are numbered 0-31 (on the PCB silkscreen). */ | |
65 | SR_PRIV const char *p_ols_channel_names[] = { | |
66 | "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", | |
67 | "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", | |
68 | "24", "25", "26", "27", "28", "29", "30", "31", | |
69 | }; | |
70 | ||
71 | /* Default supported samplerates, can be overridden by device metadata. */ | |
72 | static const uint64_t samplerates[] = { | |
73 | SR_HZ(10), | |
74 | SR_MHZ(200), | |
75 | SR_HZ(1), | |
76 | }; | |
77 | ||
78 | static GSList *scan(struct sr_dev_driver *di, GSList *options) | |
79 | { | |
80 | struct sr_dev_inst *sdi; | |
81 | struct dev_context *devc; | |
82 | GSList *devices; | |
83 | int ret, i; | |
84 | char buf[70]; | |
85 | int bytes_read; | |
86 | ||
87 | (void)options; | |
88 | ||
89 | devices = NULL; | |
90 | ||
91 | /* Allocate memory for our private device context. */ | |
92 | devc = g_malloc0(sizeof(struct dev_context)); | |
93 | ||
94 | /* Device-specific settings */ | |
95 | devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0; | |
96 | ||
97 | /* Acquisition settings */ | |
98 | devc->limit_samples = devc->capture_ratio = 0; | |
99 | devc->trigger_at = -1; | |
100 | devc->channel_mask = 0xffffffff; | |
101 | devc->flag_reg = 0; | |
102 | ||
103 | /* Allocate memory for the incoming ftdi data. */ | |
104 | devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE); | |
105 | ||
106 | /* Allocate memory for the FTDI context (ftdic) and initialize it. */ | |
107 | if (!(devc->ftdic = ftdi_new())) { | |
108 | sr_err("Failed to initialize libftdi."); | |
109 | goto err_free_ftdi_buf;; | |
110 | } | |
111 | ||
112 | /* Try to open the FTDI device */ | |
113 | if (p_ols_open(devc) != SR_OK) { | |
114 | goto err_free_ftdic; | |
115 | } | |
116 | ||
117 | /* The discovery procedure is like this: first send the Reset | |
118 | * command (0x00) 5 times, since the device could be anywhere | |
119 | * in a 5-byte command. Then send the ID command (0x02). | |
120 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
121 | * have a match. | |
122 | */ | |
123 | ||
124 | ret = SR_OK; | |
125 | for (i = 0; i < 5; i++) { | |
126 | if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) { | |
127 | break; | |
128 | } | |
129 | } | |
130 | if (ret != SR_OK) { | |
131 | sr_err("Could not reset device. Quitting."); | |
132 | goto err_close_ftdic; | |
133 | } | |
134 | write_shortcommand(devc, CMD_ID); | |
135 | ||
136 | /* Read the response data. */ | |
137 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4); | |
138 | if (bytes_read < 0) { | |
139 | sr_err("Failed to read FTDI data (%d): %s.", | |
140 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
141 | goto err_close_ftdic; | |
142 | } | |
143 | if (bytes_read == 0) { | |
144 | goto err_close_ftdic; | |
145 | } | |
146 | ||
147 | if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) | |
148 | goto err_close_ftdic; | |
149 | ||
150 | /* Definitely using the OLS protocol, check if it supports | |
151 | * the metadata command. | |
152 | */ | |
153 | write_shortcommand(devc, CMD_METADATA); | |
154 | ||
155 | /* Read the metadata. */ | |
156 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64); | |
157 | if (bytes_read < 0) { | |
158 | sr_err("Failed to read FTDI data (%d): %s.", | |
159 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
160 | goto err_close_ftdic; | |
161 | } | |
162 | if (bytes_read == 0) { | |
163 | goto err_close_ftdic; | |
164 | } | |
165 | ||
166 | /* Close device. We'll reopen it again when we need it. */ | |
167 | p_ols_close(devc); | |
168 | ||
169 | /* Parse the metadata. */ | |
170 | sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc); | |
171 | ||
172 | /* Configure samplerate and divider. */ | |
173 | if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK) | |
174 | sr_dbg("Failed to set default samplerate (%"PRIu64").", | |
175 | DEFAULT_SAMPLERATE); | |
176 | ||
177 | devices = g_slist_append(devices, sdi); | |
178 | ||
179 | return std_scan_complete(di, devices); | |
180 | ||
181 | err_close_ftdic: | |
182 | p_ols_close(devc); | |
183 | err_free_ftdic: | |
184 | ftdi_free(devc->ftdic); /* NOT free() or g_free()! */ | |
185 | err_free_ftdi_buf: | |
186 | g_free(devc->ftdi_buf); | |
187 | g_free(devc); | |
188 | ||
189 | return NULL; | |
190 | } | |
191 | ||
192 | static void clear_helper(void *priv) | |
193 | { | |
194 | struct dev_context *devc; | |
195 | ||
196 | devc = priv; | |
197 | ||
198 | ftdi_free(devc->ftdic); | |
199 | g_free(devc->ftdi_buf); | |
200 | } | |
201 | ||
202 | static int dev_clear(const struct sr_dev_driver *di) | |
203 | { | |
204 | return std_dev_clear(di, clear_helper); | |
205 | } | |
206 | ||
207 | static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, | |
208 | const struct sr_channel_group *cg) | |
209 | { | |
210 | struct dev_context *devc; | |
211 | ||
212 | (void)cg; | |
213 | ||
214 | if (!sdi) | |
215 | return SR_ERR_ARG; | |
216 | ||
217 | devc = sdi->priv; | |
218 | switch (key) { | |
219 | case SR_CONF_SAMPLERATE: | |
220 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
221 | break; | |
222 | case SR_CONF_CAPTURE_RATIO: | |
223 | *data = g_variant_new_uint64(devc->capture_ratio); | |
224 | break; | |
225 | case SR_CONF_LIMIT_SAMPLES: | |
226 | *data = g_variant_new_uint64(devc->limit_samples); | |
227 | break; | |
228 | case SR_CONF_PATTERN_MODE: | |
229 | if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE) | |
230 | *data = g_variant_new_string(STR_PATTERN_EXTERNAL); | |
231 | else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE) | |
232 | *data = g_variant_new_string(STR_PATTERN_INTERNAL); | |
233 | else | |
234 | *data = g_variant_new_string(STR_PATTERN_NONE); | |
235 | break; | |
236 | case SR_CONF_RLE: | |
237 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE); | |
238 | break; | |
239 | case SR_CONF_EXTERNAL_CLOCK: | |
240 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE); | |
241 | break; | |
242 | default: | |
243 | return SR_ERR_NA; | |
244 | } | |
245 | ||
246 | return SR_OK; | |
247 | } | |
248 | ||
249 | static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, | |
250 | const struct sr_channel_group *cg) | |
251 | { | |
252 | struct dev_context *devc; | |
253 | uint16_t flag; | |
254 | uint64_t tmp_u64; | |
255 | int ret; | |
256 | const char *stropt; | |
257 | ||
258 | (void)cg; | |
259 | ||
260 | devc = sdi->priv; | |
261 | ||
262 | switch (key) { | |
263 | case SR_CONF_SAMPLERATE: | |
264 | tmp_u64 = g_variant_get_uint64(data); | |
265 | if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1]) | |
266 | return SR_ERR_SAMPLERATE; | |
267 | ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data)); | |
268 | break; | |
269 | case SR_CONF_LIMIT_SAMPLES: | |
270 | tmp_u64 = g_variant_get_uint64(data); | |
271 | if (tmp_u64 < MIN_NUM_SAMPLES) | |
272 | return SR_ERR; | |
273 | devc->limit_samples = tmp_u64; | |
274 | ret = SR_OK; | |
275 | break; | |
276 | case SR_CONF_CAPTURE_RATIO: | |
277 | devc->capture_ratio = g_variant_get_uint64(data); | |
278 | if (devc->capture_ratio < 0 || devc->capture_ratio > 100) | |
279 | ret = SR_ERR; | |
280 | else | |
281 | ret = SR_OK; | |
282 | break; | |
283 | case SR_CONF_EXTERNAL_CLOCK: | |
284 | if (g_variant_get_boolean(data)) { | |
285 | sr_info("Enabling external clock."); | |
286 | devc->flag_reg |= FLAG_CLOCK_EXTERNAL; | |
287 | } else { | |
288 | sr_info("Disabled external clock."); | |
289 | devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL; | |
290 | } | |
291 | ret = SR_OK; | |
292 | break; | |
293 | case SR_CONF_PATTERN_MODE: | |
294 | stropt = g_variant_get_string(data, NULL); | |
295 | ret = SR_OK; | |
296 | flag = 0xffff; | |
297 | if (!strcmp(stropt, STR_PATTERN_NONE)) { | |
298 | sr_info("Disabling test modes."); | |
299 | flag = 0x0000; | |
300 | }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) { | |
301 | sr_info("Enabling internal test mode."); | |
302 | flag = FLAG_INTERNAL_TEST_MODE; | |
303 | } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) { | |
304 | sr_info("Enabling external test mode."); | |
305 | flag = FLAG_EXTERNAL_TEST_MODE; | |
306 | } else { | |
307 | ret = SR_ERR; | |
308 | } | |
309 | if (flag != 0xffff) { | |
310 | devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE); | |
311 | devc->flag_reg |= flag; | |
312 | } | |
313 | break; | |
314 | case SR_CONF_SWAP: | |
315 | if (g_variant_get_boolean(data)) { | |
316 | sr_info("Enabling channel swapping."); | |
317 | devc->flag_reg |= FLAG_SWAP_CHANNELS; | |
318 | } else { | |
319 | sr_info("Disabling channel swapping."); | |
320 | devc->flag_reg &= ~FLAG_SWAP_CHANNELS; | |
321 | } | |
322 | ret = SR_OK; | |
323 | break; | |
324 | ||
325 | case SR_CONF_RLE: | |
326 | if (g_variant_get_boolean(data)) { | |
327 | sr_info("Enabling RLE."); | |
328 | devc->flag_reg |= FLAG_RLE; | |
329 | } else { | |
330 | sr_info("Disabling RLE."); | |
331 | devc->flag_reg &= ~FLAG_RLE; | |
332 | } | |
333 | ret = SR_OK; | |
334 | break; | |
335 | default: | |
336 | ret = SR_ERR_NA; | |
337 | } | |
338 | ||
339 | return ret; | |
340 | } | |
341 | ||
342 | static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, | |
343 | const struct sr_channel_group *cg) | |
344 | { | |
345 | struct dev_context *devc; | |
346 | GVariant *gvar, *grange[2]; | |
347 | GVariantBuilder gvb; | |
348 | int num_pols_changrp, i; | |
349 | ||
350 | (void)cg; | |
351 | ||
352 | switch (key) { | |
353 | case SR_CONF_DEVICE_OPTIONS: | |
354 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32, | |
355 | devopts, ARRAY_SIZE(devopts), sizeof(uint32_t)); | |
356 | break; | |
357 | case SR_CONF_SAMPLERATE: | |
358 | g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}")); | |
359 | gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates, | |
360 | ARRAY_SIZE(samplerates), sizeof(uint64_t)); | |
361 | g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar); | |
362 | *data = g_variant_builder_end(&gvb); | |
363 | break; | |
364 | case SR_CONF_TRIGGER_MATCH: | |
365 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, | |
366 | trigger_matches, ARRAY_SIZE(trigger_matches), | |
367 | sizeof(int32_t)); | |
368 | break; | |
369 | case SR_CONF_PATTERN_MODE: | |
370 | *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns)); | |
371 | break; | |
372 | case SR_CONF_LIMIT_SAMPLES: | |
373 | if (!sdi) | |
374 | return SR_ERR_ARG; | |
375 | devc = sdi->priv; | |
376 | if (devc->flag_reg & FLAG_RLE) | |
377 | return SR_ERR_NA; | |
378 | if (devc->max_samplebytes == 0) | |
379 | /* Device didn't specify sample memory size in metadata. */ | |
380 | return SR_ERR_NA; | |
381 | /* | |
382 | * Channel groups are turned off if no channels in that group are | |
383 | * enabled, making more room for samples for the enabled group. | |
384 | */ | |
385 | pols_channel_mask(sdi); | |
386 | num_pols_changrp = 0; | |
387 | for (i = 0; i < 4; i++) { | |
388 | if (devc->channel_mask & (0xff << (i * 8))) | |
389 | num_pols_changrp++; | |
390 | } | |
391 | /* 3 channel groups takes as many bytes as 4 channel groups */ | |
392 | if (num_pols_changrp == 3) | |
393 | num_pols_changrp = 4; | |
394 | grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES); | |
395 | if (num_pols_changrp) | |
396 | grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp); | |
397 | else | |
398 | grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES); | |
399 | *data = g_variant_new_tuple(grange, 2); | |
400 | break; | |
401 | default: | |
402 | return SR_ERR_NA; | |
403 | } | |
404 | ||
405 | return SR_OK; | |
406 | } | |
407 | ||
408 | static int dev_open(struct sr_dev_inst *sdi) | |
409 | { | |
410 | struct dev_context *devc; | |
411 | ||
412 | devc = sdi->priv; | |
413 | ||
414 | if (p_ols_open(devc) != SR_OK) { | |
415 | return SR_ERR; | |
416 | } else { | |
417 | sdi->status = SR_ST_ACTIVE; | |
418 | return SR_OK; | |
419 | } | |
420 | } | |
421 | ||
422 | static int dev_close(struct sr_dev_inst *sdi) | |
423 | { | |
424 | struct dev_context *devc; | |
425 | ||
426 | devc = sdi->priv; | |
427 | ||
428 | sdi->status = SR_ST_INACTIVE; | |
429 | ||
430 | return p_ols_close(devc); | |
431 | } | |
432 | ||
433 | static int set_trigger(const struct sr_dev_inst *sdi, int stage) | |
434 | { | |
435 | struct dev_context *devc; | |
436 | uint8_t cmd, arg[4]; | |
437 | ||
438 | devc = sdi->priv; | |
439 | ||
440 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
441 | arg[0] = devc->trigger_mask[stage] & 0xff; | |
442 | arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff; | |
443 | arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff; | |
444 | arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff; | |
445 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
446 | return SR_ERR; | |
447 | ||
448 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
449 | arg[0] = devc->trigger_value[stage] & 0xff; | |
450 | arg[1] = (devc->trigger_value[stage] >> 8) & 0xff; | |
451 | arg[2] = (devc->trigger_value[stage] >> 16) & 0xff; | |
452 | arg[3] = (devc->trigger_value[stage] >> 24) & 0xff; | |
453 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
454 | return SR_ERR; | |
455 | ||
456 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
457 | arg[0] = arg[1] = arg[3] = 0x00; | |
458 | arg[2] = stage; | |
459 | if (stage == devc->num_stages) | |
460 | /* Last stage, fire when this one matches. */ | |
461 | arg[3] |= TRIGGER_START; | |
462 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
463 | return SR_ERR; | |
464 | ||
465 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; | |
466 | arg[0] = devc->trigger_edge[stage] & 0xff; | |
467 | arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff; | |
468 | arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff; | |
469 | arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff; | |
470 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
471 | return SR_ERR; | |
472 | ||
473 | return SR_OK; | |
474 | } | |
475 | ||
476 | static int disable_trigger(const struct sr_dev_inst *sdi, int stage) | |
477 | { | |
478 | struct dev_context *devc; | |
479 | uint8_t cmd, arg[4]; | |
480 | ||
481 | devc = sdi->priv; | |
482 | ||
483 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
484 | arg[0] = arg[1] = arg[2] = arg[3] = 0x00; | |
485 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
486 | return SR_ERR; | |
487 | ||
488 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
489 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
490 | return SR_ERR; | |
491 | ||
492 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
493 | arg[2] = 0x03; | |
494 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
495 | return SR_ERR; | |
496 | ||
497 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; | |
498 | arg[2] = 0x00; | |
499 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
500 | return SR_ERR; | |
501 | ||
502 | return SR_OK; | |
503 | } | |
504 | ||
505 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) | |
506 | { | |
507 | struct dev_context *devc; | |
508 | uint32_t samplecount, readcount, delaycount; | |
509 | uint8_t pols_changrp_mask, arg[4]; | |
510 | uint16_t flag_tmp; | |
511 | int num_pols_changrp, samplespercount; | |
512 | int ret, i; | |
513 | ||
514 | devc = sdi->priv; | |
515 | ||
516 | pols_channel_mask(sdi); | |
517 | ||
518 | /* | |
519 | * Enable/disable channel groups in the flag register according to the | |
520 | * channel mask. Calculate this here, because num_pols_changrp is | |
521 | * needed to limit readcount. | |
522 | */ | |
523 | pols_changrp_mask = 0; | |
524 | num_pols_changrp = 0; | |
525 | for (i = 0; i < 4; i++) { | |
526 | if (devc->channel_mask & (0xff << (i * 8))) { | |
527 | pols_changrp_mask |= (1 << i); | |
528 | num_pols_changrp++; | |
529 | } | |
530 | } | |
531 | /* 3 channel groups takes as many bytes as 4 channel groups */ | |
532 | if (num_pols_changrp == 3) | |
533 | num_pols_changrp = 4; | |
534 | /* maximum number of samples (or RLE counts) the buffer memory can hold */ | |
535 | devc->max_samples = devc->max_samplebytes / num_pols_changrp; | |
536 | ||
537 | /* | |
538 | * Limit readcount to prevent reading past the end of the hardware | |
539 | * buffer. | |
540 | */ | |
541 | sr_dbg("max_samples = %d", devc->max_samples); | |
542 | sr_dbg("limit_samples = %" PRIu64, devc->limit_samples); | |
543 | samplecount = MIN(devc->max_samples, devc->limit_samples); | |
544 | sr_dbg("Samplecount = %d", samplecount); | |
545 | ||
546 | /* In demux mode the OLS is processing two samples per clock */ | |
547 | if (devc->flag_reg & FLAG_DEMUX) { | |
548 | samplespercount = 8; | |
549 | } | |
550 | else { | |
551 | samplespercount = 4; | |
552 | } | |
553 | ||
554 | readcount = samplecount / samplespercount; | |
555 | ||
556 | /* Rather read too many samples than too few. */ | |
557 | if (samplecount % samplespercount != 0) | |
558 | readcount++; | |
559 | ||
560 | /* Basic triggers. */ | |
561 | if (pols_convert_trigger(sdi) != SR_OK) { | |
562 | sr_err("Failed to configure channels."); | |
563 | return SR_ERR; | |
564 | } | |
565 | ||
566 | if (devc->num_stages > 0) { | |
567 | delaycount = readcount * (1 - devc->capture_ratio / 100.0); | |
568 | devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages; | |
569 | for (i = 0; i < NUM_TRIGGER_STAGES; i++) { | |
570 | if (i <= devc->num_stages) { | |
571 | sr_dbg("Setting p-ols stage %d trigger.", i); | |
572 | if ((ret = set_trigger(sdi, i)) != SR_OK) | |
573 | return ret; | |
574 | } | |
575 | else { | |
576 | sr_dbg("Disabling p-ols stage %d trigger.", i); | |
577 | if ((ret = disable_trigger(sdi, i)) != SR_OK) | |
578 | return ret; | |
579 | } | |
580 | } | |
581 | } else { | |
582 | /* No triggers configured, force trigger on first stage. */ | |
583 | sr_dbg("Forcing trigger at stage 0."); | |
584 | if ((ret = set_trigger(sdi, 0)) != SR_OK) | |
585 | return ret; | |
586 | delaycount = readcount; | |
587 | } | |
588 | ||
589 | /* Samplerate. */ | |
590 | sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)", | |
591 | devc->cur_samplerate, devc->cur_samplerate_divider); | |
592 | arg[0] = devc->cur_samplerate_divider & 0xff; | |
593 | arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8; | |
594 | arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16; | |
595 | arg[3] = 0x00; | |
596 | if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK) | |
597 | return SR_ERR; | |
598 | ||
599 | /* Send extended sample limit and pre/post-trigger capture ratio. */ | |
600 | arg[0] = ((readcount - 1) & 0xff); | |
601 | arg[1] = ((readcount - 1) & 0xff00) >> 8; | |
602 | arg[2] = ((readcount - 1) & 0xff0000) >> 16; | |
603 | arg[3] = ((readcount - 1) & 0xff000000) >> 24; | |
604 | if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK) | |
605 | return SR_ERR; | |
606 | arg[0] = ((delaycount - 1) & 0xff); | |
607 | arg[1] = ((delaycount - 1) & 0xff00) >> 8; | |
608 | arg[2] = ((delaycount - 1) & 0xff0000) >> 16; | |
609 | arg[3] = ((delaycount - 1) & 0xff000000) >> 24; | |
610 | if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK) | |
611 | return SR_ERR; | |
612 | ||
613 | /* Flag register. */ | |
614 | sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s", | |
615 | devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off", | |
616 | devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off", | |
617 | devc->flag_reg & FLAG_RLE ? "on" : "off", | |
618 | devc->flag_reg & FLAG_FILTER ? "on": "off", | |
619 | devc->flag_reg & FLAG_DEMUX ? "on" : "off"); | |
620 | ||
621 | /* | |
622 | * Enable/disable OLS channel groups in the flag register according | |
623 | * to the channel mask. 1 means "disable channel". | |
624 | */ | |
625 | devc->flag_reg &= ~0x3c; | |
626 | devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c; | |
627 | sr_dbg("flag_reg = %x", devc->flag_reg); | |
628 | ||
629 | /* | |
630 | * In demux mode the OLS is processing two 8-bit or 16-bit samples | |
631 | * in parallel and for this to work the lower two bits of the four | |
632 | * "channel_disable" bits must be replicated to the upper two bits. | |
633 | */ | |
634 | flag_tmp = devc->flag_reg; | |
635 | if (devc->flag_reg & FLAG_DEMUX) { | |
636 | flag_tmp &= ~0x30; | |
637 | flag_tmp |= ~(pols_changrp_mask << 4) & 0x30; | |
638 | } | |
639 | arg[0] = flag_tmp & 0xff; | |
640 | arg[1] = flag_tmp >> 8; | |
641 | arg[2] = arg[3] = 0x00; | |
642 | if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK) | |
643 | return SR_ERR; | |
644 | ||
645 | /* Start acquisition on the device. */ | |
646 | if (write_shortcommand(devc, CMD_RUN) != SR_OK) | |
647 | return SR_ERR; | |
648 | ||
649 | /* Reset all operational states. */ | |
650 | devc->rle_count = devc->num_transfers = 0; | |
651 | devc->num_samples = devc->num_bytes = 0; | |
652 | devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0; | |
653 | memset(devc->sample, 0, 4); | |
654 | ||
655 | std_session_send_df_header(sdi); | |
656 | ||
657 | /* Hook up a dummy handler to receive data from the device. */ | |
658 | sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data, | |
659 | (struct sr_dev_inst *)sdi); | |
660 | ||
661 | return SR_OK; | |
662 | } | |
663 | ||
664 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) | |
665 | { | |
666 | struct dev_context *devc; | |
667 | ||
668 | devc = sdi->priv; | |
669 | ||
670 | write_shortcommand(devc, CMD_RESET); | |
671 | write_shortcommand(devc, CMD_RESET); | |
672 | write_shortcommand(devc, CMD_RESET); | |
673 | write_shortcommand(devc, CMD_RESET); | |
674 | write_shortcommand(devc, CMD_RESET); | |
675 | ||
676 | sr_session_source_remove(sdi->session, -1); | |
677 | ||
678 | std_session_send_df_end(sdi); | |
679 | ||
680 | return SR_OK; | |
681 | } | |
682 | ||
683 | SR_PRIV struct sr_dev_driver p_ols_driver_info = { | |
684 | .name = "p-ols", | |
685 | .longname = "Pipistrello OLS", | |
686 | .api_version = 1, | |
687 | .init = std_init, | |
688 | .cleanup = std_cleanup, | |
689 | .scan = scan, | |
690 | .dev_list = std_dev_list, | |
691 | .dev_clear = dev_clear, | |
692 | .config_get = config_get, | |
693 | .config_set = config_set, | |
694 | .config_list = config_list, | |
695 | .dev_open = dev_open, | |
696 | .dev_close = dev_close, | |
697 | .dev_acquisition_start = dev_acquisition_start, | |
698 | .dev_acquisition_stop = dev_acquisition_stop, | |
699 | .context = NULL, | |
700 | }; | |
701 | SR_REGISTER_DEV_DRIVER(p_ols_driver_info); |