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1 | /* | |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "protocol.h" | |
21 | ||
22 | static const uint32_t devopts[] = { | |
23 | SR_CONF_LOGIC_ANALYZER, | |
24 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
25 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
26 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, | |
27 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
28 | SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
29 | SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET, | |
30 | SR_CONF_SWAP | SR_CONF_SET, | |
31 | SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET, | |
32 | }; | |
33 | ||
34 | static const int32_t trigger_matches[] = { | |
35 | SR_TRIGGER_ZERO, | |
36 | SR_TRIGGER_ONE, | |
37 | SR_TRIGGER_RISING, | |
38 | SR_TRIGGER_FALLING, | |
39 | }; | |
40 | ||
41 | #define STR_PATTERN_NONE "None" | |
42 | #define STR_PATTERN_EXTERNAL "External" | |
43 | #define STR_PATTERN_INTERNAL "Internal" | |
44 | ||
45 | /* Supported methods of test pattern outputs */ | |
46 | enum { | |
47 | /** | |
48 | * Capture pins 31:16 (unbuffered wing) output a test pattern | |
49 | * that can captured on pins 0:15. | |
50 | */ | |
51 | PATTERN_EXTERNAL, | |
52 | ||
53 | /** Route test pattern internally to capture buffer. */ | |
54 | PATTERN_INTERNAL, | |
55 | }; | |
56 | ||
57 | static const char *patterns[] = { | |
58 | STR_PATTERN_NONE, | |
59 | STR_PATTERN_EXTERNAL, | |
60 | STR_PATTERN_INTERNAL, | |
61 | }; | |
62 | ||
63 | /* Channels are numbered 0-31 (on the PCB silkscreen). */ | |
64 | SR_PRIV const char *p_ols_channel_names[NUM_CHANNELS + 1] = { | |
65 | "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", | |
66 | "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", | |
67 | "24", "25", "26", "27", "28", "29", "30", "31", | |
68 | NULL, | |
69 | }; | |
70 | ||
71 | /* Default supported samplerates, can be overridden by device metadata. */ | |
72 | static const uint64_t samplerates[] = { | |
73 | SR_HZ(10), | |
74 | SR_MHZ(200), | |
75 | SR_HZ(1), | |
76 | }; | |
77 | ||
78 | SR_PRIV struct sr_dev_driver p_ols_driver_info; | |
79 | static struct sr_dev_driver *di = &p_ols_driver_info; | |
80 | ||
81 | static int init(struct sr_context *sr_ctx) | |
82 | { | |
83 | return std_init(sr_ctx, di, LOG_PREFIX); | |
84 | } | |
85 | ||
86 | static GSList *scan(GSList *options) | |
87 | { | |
88 | struct sr_dev_inst *sdi; | |
89 | struct drv_context *drvc; | |
90 | struct dev_context *devc; | |
91 | GSList *devices; | |
92 | int ret, i; | |
93 | char buf[70]; | |
94 | int bytes_read; | |
95 | ||
96 | (void)options; | |
97 | ||
98 | drvc = di->priv; | |
99 | ||
100 | devices = NULL; | |
101 | ||
102 | /* Allocate memory for our private device context. */ | |
103 | devc = g_malloc0(sizeof(struct dev_context)); | |
104 | ||
105 | /* Device-specific settings */ | |
106 | devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0; | |
107 | ||
108 | /* Acquisition settings */ | |
109 | devc->limit_samples = devc->capture_ratio = 0; | |
110 | devc->trigger_at = -1; | |
111 | devc->channel_mask = 0xffffffff; | |
112 | devc->flag_reg = 0; | |
113 | ||
114 | /* Allocate memory for the incoming ftdi data. */ | |
115 | if (!(devc->ftdi_buf = g_try_malloc0(FTDI_BUF_SIZE))) { | |
116 | sr_err("ftdi_buf malloc failed."); | |
117 | goto err_free_devc; | |
118 | } | |
119 | ||
120 | /* Allocate memory for the FTDI context (ftdic) and initialize it. */ | |
121 | if (!(devc->ftdic = ftdi_new())) { | |
122 | sr_err("Failed to initialize libftdi."); | |
123 | goto err_free_ftdi_buf;; | |
124 | } | |
125 | ||
126 | /* Try to open the FTDI device */ | |
127 | if (p_ols_open(devc) != SR_OK) { | |
128 | goto err_free_ftdic; | |
129 | } | |
130 | ||
131 | /* The discovery procedure is like this: first send the Reset | |
132 | * command (0x00) 5 times, since the device could be anywhere | |
133 | * in a 5-byte command. Then send the ID command (0x02). | |
134 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
135 | * have a match. | |
136 | */ | |
137 | ||
138 | ret = SR_OK; | |
139 | for (i = 0; i < 5; i++) { | |
140 | if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) { | |
141 | break; | |
142 | } | |
143 | } | |
144 | if (ret != SR_OK) { | |
145 | sr_err("Could not reset device. Quitting."); | |
146 | goto err_close_ftdic; | |
147 | } | |
148 | write_shortcommand(devc, CMD_ID); | |
149 | ||
150 | /* Read the response data. */ | |
151 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4); | |
152 | if (bytes_read < 0) { | |
153 | sr_err("Failed to read FTDI data (%d): %s.", | |
154 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
155 | goto err_close_ftdic; | |
156 | } | |
157 | if (bytes_read == 0) { | |
158 | goto err_close_ftdic; | |
159 | } | |
160 | ||
161 | if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) | |
162 | goto err_close_ftdic; | |
163 | ||
164 | /* Definitely using the OLS protocol, check if it supports | |
165 | * the metadata command. | |
166 | */ | |
167 | write_shortcommand(devc, CMD_METADATA); | |
168 | ||
169 | /* Read the metadata. */ | |
170 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64); | |
171 | if (bytes_read < 0) { | |
172 | sr_err("Failed to read FTDI data (%d): %s.", | |
173 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
174 | goto err_close_ftdic; | |
175 | } | |
176 | if (bytes_read == 0) { | |
177 | goto err_close_ftdic; | |
178 | } | |
179 | ||
180 | /* Close device. We'll reopen it again when we need it. */ | |
181 | p_ols_close(devc); | |
182 | ||
183 | /* Parse the metadata. */ | |
184 | sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc); | |
185 | ||
186 | /* Configure samplerate and divider. */ | |
187 | if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK) | |
188 | sr_dbg("Failed to set default samplerate (%"PRIu64").", | |
189 | DEFAULT_SAMPLERATE); | |
190 | ||
191 | drvc->instances = g_slist_append(drvc->instances, sdi); | |
192 | devices = g_slist_append(devices, sdi); | |
193 | ||
194 | return devices; | |
195 | ||
196 | err_close_ftdic: | |
197 | p_ols_close(devc); | |
198 | err_free_ftdic: | |
199 | ftdi_free(devc->ftdic); /* NOT free() or g_free()! */ | |
200 | err_free_ftdi_buf: | |
201 | g_free(devc->ftdi_buf); | |
202 | err_free_devc: | |
203 | g_free(devc); | |
204 | ||
205 | return NULL; | |
206 | } | |
207 | ||
208 | static GSList *dev_list(void) | |
209 | { | |
210 | return ((struct drv_context *)(di->priv))->instances; | |
211 | } | |
212 | ||
213 | static void clear_helper(void *priv) | |
214 | { | |
215 | struct dev_context *devc; | |
216 | ||
217 | devc = priv; | |
218 | ||
219 | ftdi_free(devc->ftdic); | |
220 | g_free(devc->ftdi_buf); | |
221 | } | |
222 | ||
223 | static int dev_clear(void) | |
224 | { | |
225 | return std_dev_clear(di, clear_helper); | |
226 | } | |
227 | ||
228 | static int cleanup(void) | |
229 | { | |
230 | return dev_clear(); | |
231 | } | |
232 | ||
233 | ||
234 | static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, | |
235 | const struct sr_channel_group *cg) | |
236 | { | |
237 | struct dev_context *devc; | |
238 | ||
239 | (void)cg; | |
240 | ||
241 | if (!sdi) | |
242 | return SR_ERR_ARG; | |
243 | ||
244 | devc = sdi->priv; | |
245 | switch (key) { | |
246 | case SR_CONF_SAMPLERATE: | |
247 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
248 | break; | |
249 | case SR_CONF_CAPTURE_RATIO: | |
250 | *data = g_variant_new_uint64(devc->capture_ratio); | |
251 | break; | |
252 | case SR_CONF_LIMIT_SAMPLES: | |
253 | *data = g_variant_new_uint64(devc->limit_samples); | |
254 | break; | |
255 | case SR_CONF_PATTERN_MODE: | |
256 | if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE) | |
257 | *data = g_variant_new_string(STR_PATTERN_EXTERNAL); | |
258 | else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE) | |
259 | *data = g_variant_new_string(STR_PATTERN_INTERNAL); | |
260 | else | |
261 | *data = g_variant_new_string(STR_PATTERN_NONE); | |
262 | break; | |
263 | case SR_CONF_RLE: | |
264 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE); | |
265 | break; | |
266 | case SR_CONF_EXTERNAL_CLOCK: | |
267 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE); | |
268 | break; | |
269 | default: | |
270 | return SR_ERR_NA; | |
271 | } | |
272 | ||
273 | return SR_OK; | |
274 | } | |
275 | ||
276 | static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, | |
277 | const struct sr_channel_group *cg) | |
278 | { | |
279 | struct dev_context *devc; | |
280 | uint16_t flag; | |
281 | uint64_t tmp_u64; | |
282 | int ret; | |
283 | const char *stropt; | |
284 | ||
285 | (void)cg; | |
286 | ||
287 | if (sdi->status != SR_ST_ACTIVE) | |
288 | return SR_ERR_DEV_CLOSED; | |
289 | ||
290 | devc = sdi->priv; | |
291 | ||
292 | switch (key) { | |
293 | case SR_CONF_SAMPLERATE: | |
294 | tmp_u64 = g_variant_get_uint64(data); | |
295 | if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1]) | |
296 | return SR_ERR_SAMPLERATE; | |
297 | ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data)); | |
298 | break; | |
299 | case SR_CONF_LIMIT_SAMPLES: | |
300 | tmp_u64 = g_variant_get_uint64(data); | |
301 | if (tmp_u64 < MIN_NUM_SAMPLES) | |
302 | return SR_ERR; | |
303 | devc->limit_samples = tmp_u64; | |
304 | ret = SR_OK; | |
305 | break; | |
306 | case SR_CONF_CAPTURE_RATIO: | |
307 | devc->capture_ratio = g_variant_get_uint64(data); | |
308 | if (devc->capture_ratio < 0 || devc->capture_ratio > 100) { | |
309 | devc->capture_ratio = 0; | |
310 | ret = SR_ERR; | |
311 | } else | |
312 | ret = SR_OK; | |
313 | break; | |
314 | case SR_CONF_EXTERNAL_CLOCK: | |
315 | if (g_variant_get_boolean(data)) { | |
316 | sr_info("Enabling external clock."); | |
317 | devc->flag_reg |= FLAG_CLOCK_EXTERNAL; | |
318 | } else { | |
319 | sr_info("Disabled external clock."); | |
320 | devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL; | |
321 | } | |
322 | ret = SR_OK; | |
323 | break; | |
324 | case SR_CONF_PATTERN_MODE: | |
325 | stropt = g_variant_get_string(data, NULL); | |
326 | ret = SR_OK; | |
327 | flag = 0xffff; | |
328 | if (!strcmp(stropt, STR_PATTERN_NONE)) { | |
329 | sr_info("Disabling test modes."); | |
330 | flag = 0x0000; | |
331 | }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) { | |
332 | sr_info("Enabling internal test mode."); | |
333 | flag = FLAG_INTERNAL_TEST_MODE; | |
334 | } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) { | |
335 | sr_info("Enabling external test mode."); | |
336 | flag = FLAG_EXTERNAL_TEST_MODE; | |
337 | } else { | |
338 | ret = SR_ERR; | |
339 | } | |
340 | if (flag != 0xffff) { | |
341 | devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE); | |
342 | devc->flag_reg |= flag; | |
343 | } | |
344 | break; | |
345 | case SR_CONF_SWAP: | |
346 | if (g_variant_get_boolean(data)) { | |
347 | sr_info("Enabling channel swapping."); | |
348 | devc->flag_reg |= FLAG_SWAP_CHANNELS; | |
349 | } else { | |
350 | sr_info("Disabling channel swapping."); | |
351 | devc->flag_reg &= ~FLAG_SWAP_CHANNELS; | |
352 | } | |
353 | ret = SR_OK; | |
354 | break; | |
355 | ||
356 | case SR_CONF_RLE: | |
357 | if (g_variant_get_boolean(data)) { | |
358 | sr_info("Enabling RLE."); | |
359 | devc->flag_reg |= FLAG_RLE; | |
360 | } else { | |
361 | sr_info("Disabling RLE."); | |
362 | devc->flag_reg &= ~FLAG_RLE; | |
363 | } | |
364 | ret = SR_OK; | |
365 | break; | |
366 | default: | |
367 | ret = SR_ERR_NA; | |
368 | } | |
369 | ||
370 | return ret; | |
371 | } | |
372 | ||
373 | static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, | |
374 | const struct sr_channel_group *cg) | |
375 | { | |
376 | struct dev_context *devc; | |
377 | GVariant *gvar, *grange[2]; | |
378 | GVariantBuilder gvb; | |
379 | int num_pols_changrp, i; | |
380 | ||
381 | (void)cg; | |
382 | ||
383 | switch (key) { | |
384 | case SR_CONF_DEVICE_OPTIONS: | |
385 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32, | |
386 | devopts, ARRAY_SIZE(devopts), sizeof(uint32_t)); | |
387 | break; | |
388 | case SR_CONF_SAMPLERATE: | |
389 | g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}")); | |
390 | gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates, | |
391 | ARRAY_SIZE(samplerates), sizeof(uint64_t)); | |
392 | g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar); | |
393 | *data = g_variant_builder_end(&gvb); | |
394 | break; | |
395 | case SR_CONF_TRIGGER_MATCH: | |
396 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, | |
397 | trigger_matches, ARRAY_SIZE(trigger_matches), | |
398 | sizeof(int32_t)); | |
399 | break; | |
400 | case SR_CONF_PATTERN_MODE: | |
401 | *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns)); | |
402 | break; | |
403 | case SR_CONF_LIMIT_SAMPLES: | |
404 | if (!sdi) | |
405 | return SR_ERR_ARG; | |
406 | devc = sdi->priv; | |
407 | if (devc->flag_reg & FLAG_RLE) | |
408 | return SR_ERR_NA; | |
409 | if (devc->max_samplebytes == 0) | |
410 | /* Device didn't specify sample memory size in metadata. */ | |
411 | return SR_ERR_NA; | |
412 | /* | |
413 | * Channel groups are turned off if no channels in that group are | |
414 | * enabled, making more room for samples for the enabled group. | |
415 | */ | |
416 | pols_channel_mask(sdi); | |
417 | num_pols_changrp = 0; | |
418 | for (i = 0; i < 4; i++) { | |
419 | if (devc->channel_mask & (0xff << (i * 8))) | |
420 | num_pols_changrp++; | |
421 | } | |
422 | /* 3 channel groups takes as many bytes as 4 channel groups */ | |
423 | if (num_pols_changrp == 3) | |
424 | num_pols_changrp = 4; | |
425 | grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES); | |
426 | if (num_pols_changrp) | |
427 | grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp); | |
428 | else | |
429 | grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES); | |
430 | *data = g_variant_new_tuple(grange, 2); | |
431 | break; | |
432 | default: | |
433 | return SR_ERR_NA; | |
434 | } | |
435 | ||
436 | return SR_OK; | |
437 | } | |
438 | ||
439 | static int dev_open(struct sr_dev_inst *sdi) | |
440 | { | |
441 | struct dev_context *devc; | |
442 | ||
443 | devc = sdi->priv; | |
444 | ||
445 | if (p_ols_open(devc) != SR_OK) { | |
446 | return SR_ERR; | |
447 | } else { | |
448 | sdi->status = SR_ST_ACTIVE; | |
449 | return SR_OK; | |
450 | } | |
451 | } | |
452 | ||
453 | static int dev_close(struct sr_dev_inst *sdi) | |
454 | { | |
455 | int ret; | |
456 | struct dev_context *devc; | |
457 | ||
458 | ret = SR_OK; | |
459 | devc = sdi->priv; | |
460 | ||
461 | if (sdi->status == SR_ST_ACTIVE) { | |
462 | sr_dbg("Status ACTIVE, closing device."); | |
463 | ret = p_ols_close(devc); | |
464 | } else { | |
465 | sr_spew("Status not ACTIVE, nothing to do."); | |
466 | } | |
467 | ||
468 | sdi->status = SR_ST_INACTIVE; | |
469 | ||
470 | return ret; | |
471 | } | |
472 | ||
473 | ||
474 | static int set_trigger(const struct sr_dev_inst *sdi, int stage) | |
475 | { | |
476 | struct dev_context *devc; | |
477 | uint8_t cmd, arg[4]; | |
478 | ||
479 | devc = sdi->priv; | |
480 | ||
481 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
482 | arg[0] = devc->trigger_mask[stage] & 0xff; | |
483 | arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff; | |
484 | arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff; | |
485 | arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff; | |
486 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
487 | return SR_ERR; | |
488 | ||
489 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
490 | arg[0] = devc->trigger_value[stage] & 0xff; | |
491 | arg[1] = (devc->trigger_value[stage] >> 8) & 0xff; | |
492 | arg[2] = (devc->trigger_value[stage] >> 16) & 0xff; | |
493 | arg[3] = (devc->trigger_value[stage] >> 24) & 0xff; | |
494 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
495 | return SR_ERR; | |
496 | ||
497 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
498 | arg[0] = arg[1] = arg[3] = 0x00; | |
499 | arg[2] = stage; | |
500 | if (stage == devc->num_stages) | |
501 | /* Last stage, fire when this one matches. */ | |
502 | arg[3] |= TRIGGER_START; | |
503 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
504 | return SR_ERR; | |
505 | ||
506 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; | |
507 | arg[0] = devc->trigger_edge[stage] & 0xff; | |
508 | arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff; | |
509 | arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff; | |
510 | arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff; | |
511 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
512 | return SR_ERR; | |
513 | ||
514 | return SR_OK; | |
515 | } | |
516 | ||
517 | static int disable_trigger(const struct sr_dev_inst *sdi, int stage) | |
518 | { | |
519 | struct dev_context *devc; | |
520 | uint8_t cmd, arg[4]; | |
521 | ||
522 | devc = sdi->priv; | |
523 | ||
524 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
525 | arg[0] = arg[1] = arg[2] = arg[3] = 0x00; | |
526 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
527 | return SR_ERR; | |
528 | ||
529 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
530 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
531 | return SR_ERR; | |
532 | ||
533 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
534 | arg[2] = 0x03; | |
535 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
536 | return SR_ERR; | |
537 | ||
538 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; | |
539 | arg[2] = 0x00; | |
540 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
541 | return SR_ERR; | |
542 | ||
543 | return SR_OK; | |
544 | } | |
545 | ||
546 | static int dev_acquisition_start(const struct sr_dev_inst *sdi, | |
547 | void *cb_data) | |
548 | { | |
549 | struct dev_context *devc; | |
550 | uint32_t samplecount, readcount, delaycount; | |
551 | uint8_t pols_changrp_mask, arg[4]; | |
552 | uint16_t flag_tmp; | |
553 | int num_pols_changrp, samplespercount; | |
554 | int ret, i; | |
555 | ||
556 | if (sdi->status != SR_ST_ACTIVE) | |
557 | return SR_ERR_DEV_CLOSED; | |
558 | ||
559 | devc = sdi->priv; | |
560 | ||
561 | pols_channel_mask(sdi); | |
562 | ||
563 | /* | |
564 | * Enable/disable channel groups in the flag register according to the | |
565 | * channel mask. Calculate this here, because num_pols_changrp is | |
566 | * needed to limit readcount. | |
567 | */ | |
568 | pols_changrp_mask = 0; | |
569 | num_pols_changrp = 0; | |
570 | for (i = 0; i < 4; i++) { | |
571 | if (devc->channel_mask & (0xff << (i * 8))) { | |
572 | pols_changrp_mask |= (1 << i); | |
573 | num_pols_changrp++; | |
574 | } | |
575 | } | |
576 | /* 3 channel groups takes as many bytes as 4 channel groups */ | |
577 | if (num_pols_changrp == 3) | |
578 | num_pols_changrp = 4; | |
579 | /* maximum number of samples (or RLE counts) the buffer memory can hold */ | |
580 | devc->max_samples = devc->max_samplebytes / num_pols_changrp; | |
581 | ||
582 | /* | |
583 | * Limit readcount to prevent reading past the end of the hardware | |
584 | * buffer. | |
585 | */ | |
586 | sr_dbg("max_samples = %d", devc->max_samples); | |
587 | sr_dbg("limit_samples = %d", devc->limit_samples); | |
588 | samplecount = MIN(devc->max_samples, devc->limit_samples); | |
589 | sr_dbg("Samplecount = %d", samplecount); | |
590 | ||
591 | /* In demux mode the OLS is processing two samples per clock */ | |
592 | if (devc->flag_reg & FLAG_DEMUX) { | |
593 | samplespercount = 8; | |
594 | } | |
595 | else { | |
596 | samplespercount = 4; | |
597 | } | |
598 | ||
599 | readcount = samplecount / samplespercount; | |
600 | ||
601 | /* Rather read too many samples than too few. */ | |
602 | if (samplecount % samplespercount != 0) | |
603 | readcount++; | |
604 | ||
605 | /* Basic triggers. */ | |
606 | if (pols_convert_trigger(sdi) != SR_OK) { | |
607 | sr_err("Failed to configure channels."); | |
608 | return SR_ERR; | |
609 | } | |
610 | ||
611 | if (devc->num_stages > 0) { | |
612 | delaycount = readcount * (1 - devc->capture_ratio / 100.0); | |
613 | devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages; | |
614 | for (i = 0; i < NUM_TRIGGER_STAGES; i++) { | |
615 | if (i <= devc->num_stages) { | |
616 | sr_dbg("Setting p-ols stage %d trigger.", i); | |
617 | if ((ret = set_trigger(sdi, i)) != SR_OK) | |
618 | return ret; | |
619 | } | |
620 | else { | |
621 | sr_dbg("Disabling p-ols stage %d trigger.", i); | |
622 | if ((ret = disable_trigger(sdi, i)) != SR_OK) | |
623 | return ret; | |
624 | } | |
625 | } | |
626 | } else { | |
627 | /* No triggers configured, force trigger on first stage. */ | |
628 | sr_dbg("Forcing trigger at stage 0."); | |
629 | if ((ret = set_trigger(sdi, 0)) != SR_OK) | |
630 | return ret; | |
631 | delaycount = readcount; | |
632 | } | |
633 | ||
634 | /* Samplerate. */ | |
635 | sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)", | |
636 | devc->cur_samplerate, devc->cur_samplerate_divider); | |
637 | arg[0] = devc->cur_samplerate_divider & 0xff; | |
638 | arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8; | |
639 | arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16; | |
640 | arg[3] = 0x00; | |
641 | if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK) | |
642 | return SR_ERR; | |
643 | ||
644 | /* Send extended sample limit and pre/post-trigger capture ratio. */ | |
645 | arg[0] = ((readcount - 1) & 0xff); | |
646 | arg[1] = ((readcount - 1) & 0xff00) >> 8; | |
647 | arg[2] = ((readcount - 1) & 0xff0000) >> 16; | |
648 | arg[3] = ((readcount - 1) & 0xff000000) >> 24; | |
649 | if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK) | |
650 | return SR_ERR; | |
651 | arg[0] = ((delaycount - 1) & 0xff); | |
652 | arg[1] = ((delaycount - 1) & 0xff00) >> 8; | |
653 | arg[2] = ((delaycount - 1) & 0xff0000) >> 16; | |
654 | arg[3] = ((delaycount - 1) & 0xff000000) >> 24; | |
655 | if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK) | |
656 | return SR_ERR; | |
657 | ||
658 | /* Flag register. */ | |
659 | sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s", | |
660 | devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off", | |
661 | devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off", | |
662 | devc->flag_reg & FLAG_RLE ? "on" : "off", | |
663 | devc->flag_reg & FLAG_FILTER ? "on": "off", | |
664 | devc->flag_reg & FLAG_DEMUX ? "on" : "off"); | |
665 | ||
666 | /* | |
667 | * Enable/disable OLS channel groups in the flag register according | |
668 | * to the channel mask. 1 means "disable channel". | |
669 | */ | |
670 | devc->flag_reg &= ~0x3c; | |
671 | devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c; | |
672 | sr_dbg("flag_reg = %x", devc->flag_reg); | |
673 | ||
674 | /* | |
675 | * In demux mode the OLS is processing two 8-bit or 16-bit samples | |
676 | * in parallel and for this to work the lower two bits of the four | |
677 | * "channel_disable" bits must be replicated to the upper two bits. | |
678 | */ | |
679 | flag_tmp = devc->flag_reg; | |
680 | if (devc->flag_reg & FLAG_DEMUX) { | |
681 | flag_tmp &= ~0x30; | |
682 | flag_tmp |= ~(pols_changrp_mask << 4) & 0x30; | |
683 | } | |
684 | arg[0] = flag_tmp & 0xff; | |
685 | arg[1] = flag_tmp >> 8; | |
686 | arg[2] = arg[3] = 0x00; | |
687 | if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK) | |
688 | return SR_ERR; | |
689 | ||
690 | /* Start acquisition on the device. */ | |
691 | if (write_shortcommand(devc, CMD_RUN) != SR_OK) | |
692 | return SR_ERR; | |
693 | ||
694 | /* Reset all operational states. */ | |
695 | devc->rle_count = devc->num_transfers = 0; | |
696 | devc->num_samples = devc->num_bytes = 0; | |
697 | devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0; | |
698 | memset(devc->sample, 0, 4); | |
699 | ||
700 | /* Send header packet to the session bus. */ | |
701 | std_session_send_df_header(cb_data, LOG_PREFIX); | |
702 | ||
703 | /* Hook up a dummy handler to receive data from the device. */ | |
704 | sr_session_source_add(sdi->session, 0, G_IO_IN, 10, p_ols_receive_data, | |
705 | cb_data); | |
706 | ||
707 | return SR_OK; | |
708 | } | |
709 | ||
710 | ||
711 | ||
712 | static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) | |
713 | { | |
714 | struct dev_context *devc; | |
715 | struct sr_datafeed_packet packet; | |
716 | ||
717 | devc = sdi->priv; | |
718 | ||
719 | sr_dbg("Stopping acquisition."); | |
720 | write_shortcommand(devc, CMD_RESET); | |
721 | write_shortcommand(devc, CMD_RESET); | |
722 | write_shortcommand(devc, CMD_RESET); | |
723 | write_shortcommand(devc, CMD_RESET); | |
724 | write_shortcommand(devc, CMD_RESET); | |
725 | ||
726 | sr_session_source_remove(sdi->session, 0); | |
727 | ||
728 | /* Send end packet to the session bus. */ | |
729 | sr_dbg("Sending SR_DF_END."); | |
730 | packet.type = SR_DF_END; | |
731 | sr_session_send(cb_data, &packet); | |
732 | ||
733 | return SR_OK; | |
734 | } | |
735 | ||
736 | SR_PRIV struct sr_dev_driver p_ols_driver_info = { | |
737 | .name = "p-ols", | |
738 | .longname = "Pipistrello OLS", | |
739 | .api_version = 1, | |
740 | .init = init, | |
741 | .cleanup = cleanup, | |
742 | .scan = scan, | |
743 | .dev_list = dev_list, | |
744 | .dev_clear = dev_clear, | |
745 | .config_get = config_get, | |
746 | .config_set = config_set, | |
747 | .config_list = config_list, | |
748 | .dev_open = dev_open, | |
749 | .dev_close = dev_close, | |
750 | .dev_acquisition_start = dev_acquisition_start, | |
751 | .dev_acquisition_stop = dev_acquisition_stop, | |
752 | .priv = NULL, | |
753 | }; |