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Consistently don't check sdi->priv in dev_acquisition_start().
[libsigrok.git] / src / hardware / pipistrello-ols / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <config.h>
21#include "protocol.h"
22
23static const uint32_t devopts[] = {
24 SR_CONF_LOGIC_ANALYZER,
25 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
27 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
28 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
29 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
30 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
31 SR_CONF_SWAP | SR_CONF_SET,
32 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
33};
34
35static const int32_t trigger_matches[] = {
36 SR_TRIGGER_ZERO,
37 SR_TRIGGER_ONE,
38 SR_TRIGGER_RISING,
39 SR_TRIGGER_FALLING,
40};
41
42#define STR_PATTERN_NONE "None"
43#define STR_PATTERN_EXTERNAL "External"
44#define STR_PATTERN_INTERNAL "Internal"
45
46/* Supported methods of test pattern outputs */
47enum {
48 /**
49 * Capture pins 31:16 (unbuffered wing) output a test pattern
50 * that can captured on pins 0:15.
51 */
52 PATTERN_EXTERNAL,
53
54 /** Route test pattern internally to capture buffer. */
55 PATTERN_INTERNAL,
56};
57
58static const char *patterns[] = {
59 STR_PATTERN_NONE,
60 STR_PATTERN_EXTERNAL,
61 STR_PATTERN_INTERNAL,
62};
63
64/* Channels are numbered 0-31 (on the PCB silkscreen). */
65SR_PRIV const char *p_ols_channel_names[] = {
66 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
67 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
68 "24", "25", "26", "27", "28", "29", "30", "31",
69};
70
71/* Default supported samplerates, can be overridden by device metadata. */
72static const uint64_t samplerates[] = {
73 SR_HZ(10),
74 SR_MHZ(200),
75 SR_HZ(1),
76};
77
78SR_PRIV struct sr_dev_driver p_ols_driver_info;
79
80static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
81{
82 return std_init(sr_ctx, di, LOG_PREFIX);
83}
84
85static GSList *scan(struct sr_dev_driver *di, GSList *options)
86{
87 struct sr_dev_inst *sdi;
88 struct drv_context *drvc;
89 struct dev_context *devc;
90 GSList *devices;
91 int ret, i;
92 char buf[70];
93 int bytes_read;
94
95 (void)options;
96
97 drvc = di->context;
98
99 devices = NULL;
100
101 /* Allocate memory for our private device context. */
102 devc = g_malloc0(sizeof(struct dev_context));
103
104 /* Device-specific settings */
105 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
106
107 /* Acquisition settings */
108 devc->limit_samples = devc->capture_ratio = 0;
109 devc->trigger_at = -1;
110 devc->channel_mask = 0xffffffff;
111 devc->flag_reg = 0;
112
113 /* Allocate memory for the incoming ftdi data. */
114 devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
115
116 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
117 if (!(devc->ftdic = ftdi_new())) {
118 sr_err("Failed to initialize libftdi.");
119 goto err_free_ftdi_buf;;
120 }
121
122 /* Try to open the FTDI device */
123 if (p_ols_open(devc) != SR_OK) {
124 goto err_free_ftdic;
125 }
126
127 /* The discovery procedure is like this: first send the Reset
128 * command (0x00) 5 times, since the device could be anywhere
129 * in a 5-byte command. Then send the ID command (0x02).
130 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
131 * have a match.
132 */
133
134 ret = SR_OK;
135 for (i = 0; i < 5; i++) {
136 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
137 break;
138 }
139 }
140 if (ret != SR_OK) {
141 sr_err("Could not reset device. Quitting.");
142 goto err_close_ftdic;
143 }
144 write_shortcommand(devc, CMD_ID);
145
146 /* Read the response data. */
147 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
148 if (bytes_read < 0) {
149 sr_err("Failed to read FTDI data (%d): %s.",
150 bytes_read, ftdi_get_error_string(devc->ftdic));
151 goto err_close_ftdic;
152 }
153 if (bytes_read == 0) {
154 goto err_close_ftdic;
155 }
156
157 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
158 goto err_close_ftdic;
159
160 /* Definitely using the OLS protocol, check if it supports
161 * the metadata command.
162 */
163 write_shortcommand(devc, CMD_METADATA);
164
165 /* Read the metadata. */
166 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
167 if (bytes_read < 0) {
168 sr_err("Failed to read FTDI data (%d): %s.",
169 bytes_read, ftdi_get_error_string(devc->ftdic));
170 goto err_close_ftdic;
171 }
172 if (bytes_read == 0) {
173 goto err_close_ftdic;
174 }
175
176 /* Close device. We'll reopen it again when we need it. */
177 p_ols_close(devc);
178
179 /* Parse the metadata. */
180 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
181
182 /* Configure samplerate and divider. */
183 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
184 sr_dbg("Failed to set default samplerate (%"PRIu64").",
185 DEFAULT_SAMPLERATE);
186
187 drvc->instances = g_slist_append(drvc->instances, sdi);
188 devices = g_slist_append(devices, sdi);
189
190 return devices;
191
192err_close_ftdic:
193 p_ols_close(devc);
194err_free_ftdic:
195 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
196err_free_ftdi_buf:
197 g_free(devc->ftdi_buf);
198 g_free(devc);
199
200 return NULL;
201}
202
203static GSList *dev_list(const struct sr_dev_driver *di)
204{
205 return ((struct drv_context *)(di->context))->instances;
206}
207
208static void clear_helper(void *priv)
209{
210 struct dev_context *devc;
211
212 devc = priv;
213
214 ftdi_free(devc->ftdic);
215 g_free(devc->ftdi_buf);
216}
217
218static int dev_clear(const struct sr_dev_driver *di)
219{
220 return std_dev_clear(di, clear_helper);
221}
222
223static int cleanup(const struct sr_dev_driver *di)
224{
225 return dev_clear(di);
226}
227
228static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
229 const struct sr_channel_group *cg)
230{
231 struct dev_context *devc;
232
233 (void)cg;
234
235 if (!sdi)
236 return SR_ERR_ARG;
237
238 devc = sdi->priv;
239 switch (key) {
240 case SR_CONF_SAMPLERATE:
241 *data = g_variant_new_uint64(devc->cur_samplerate);
242 break;
243 case SR_CONF_CAPTURE_RATIO:
244 *data = g_variant_new_uint64(devc->capture_ratio);
245 break;
246 case SR_CONF_LIMIT_SAMPLES:
247 *data = g_variant_new_uint64(devc->limit_samples);
248 break;
249 case SR_CONF_PATTERN_MODE:
250 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
251 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
252 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
253 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
254 else
255 *data = g_variant_new_string(STR_PATTERN_NONE);
256 break;
257 case SR_CONF_RLE:
258 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
259 break;
260 case SR_CONF_EXTERNAL_CLOCK:
261 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
262 break;
263 default:
264 return SR_ERR_NA;
265 }
266
267 return SR_OK;
268}
269
270static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
271 const struct sr_channel_group *cg)
272{
273 struct dev_context *devc;
274 uint16_t flag;
275 uint64_t tmp_u64;
276 int ret;
277 const char *stropt;
278
279 (void)cg;
280
281 if (sdi->status != SR_ST_ACTIVE)
282 return SR_ERR_DEV_CLOSED;
283
284 devc = sdi->priv;
285
286 switch (key) {
287 case SR_CONF_SAMPLERATE:
288 tmp_u64 = g_variant_get_uint64(data);
289 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
290 return SR_ERR_SAMPLERATE;
291 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
292 break;
293 case SR_CONF_LIMIT_SAMPLES:
294 tmp_u64 = g_variant_get_uint64(data);
295 if (tmp_u64 < MIN_NUM_SAMPLES)
296 return SR_ERR;
297 devc->limit_samples = tmp_u64;
298 ret = SR_OK;
299 break;
300 case SR_CONF_CAPTURE_RATIO:
301 devc->capture_ratio = g_variant_get_uint64(data);
302 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
303 ret = SR_ERR;
304 else
305 ret = SR_OK;
306 break;
307 case SR_CONF_EXTERNAL_CLOCK:
308 if (g_variant_get_boolean(data)) {
309 sr_info("Enabling external clock.");
310 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
311 } else {
312 sr_info("Disabled external clock.");
313 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
314 }
315 ret = SR_OK;
316 break;
317 case SR_CONF_PATTERN_MODE:
318 stropt = g_variant_get_string(data, NULL);
319 ret = SR_OK;
320 flag = 0xffff;
321 if (!strcmp(stropt, STR_PATTERN_NONE)) {
322 sr_info("Disabling test modes.");
323 flag = 0x0000;
324 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
325 sr_info("Enabling internal test mode.");
326 flag = FLAG_INTERNAL_TEST_MODE;
327 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
328 sr_info("Enabling external test mode.");
329 flag = FLAG_EXTERNAL_TEST_MODE;
330 } else {
331 ret = SR_ERR;
332 }
333 if (flag != 0xffff) {
334 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
335 devc->flag_reg |= flag;
336 }
337 break;
338 case SR_CONF_SWAP:
339 if (g_variant_get_boolean(data)) {
340 sr_info("Enabling channel swapping.");
341 devc->flag_reg |= FLAG_SWAP_CHANNELS;
342 } else {
343 sr_info("Disabling channel swapping.");
344 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
345 }
346 ret = SR_OK;
347 break;
348
349 case SR_CONF_RLE:
350 if (g_variant_get_boolean(data)) {
351 sr_info("Enabling RLE.");
352 devc->flag_reg |= FLAG_RLE;
353 } else {
354 sr_info("Disabling RLE.");
355 devc->flag_reg &= ~FLAG_RLE;
356 }
357 ret = SR_OK;
358 break;
359 default:
360 ret = SR_ERR_NA;
361 }
362
363 return ret;
364}
365
366static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
367 const struct sr_channel_group *cg)
368{
369 struct dev_context *devc;
370 GVariant *gvar, *grange[2];
371 GVariantBuilder gvb;
372 int num_pols_changrp, i;
373
374 (void)cg;
375
376 switch (key) {
377 case SR_CONF_DEVICE_OPTIONS:
378 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
379 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
380 break;
381 case SR_CONF_SAMPLERATE:
382 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
383 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
384 ARRAY_SIZE(samplerates), sizeof(uint64_t));
385 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
386 *data = g_variant_builder_end(&gvb);
387 break;
388 case SR_CONF_TRIGGER_MATCH:
389 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
390 trigger_matches, ARRAY_SIZE(trigger_matches),
391 sizeof(int32_t));
392 break;
393 case SR_CONF_PATTERN_MODE:
394 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
395 break;
396 case SR_CONF_LIMIT_SAMPLES:
397 if (!sdi)
398 return SR_ERR_ARG;
399 devc = sdi->priv;
400 if (devc->flag_reg & FLAG_RLE)
401 return SR_ERR_NA;
402 if (devc->max_samplebytes == 0)
403 /* Device didn't specify sample memory size in metadata. */
404 return SR_ERR_NA;
405 /*
406 * Channel groups are turned off if no channels in that group are
407 * enabled, making more room for samples for the enabled group.
408 */
409 pols_channel_mask(sdi);
410 num_pols_changrp = 0;
411 for (i = 0; i < 4; i++) {
412 if (devc->channel_mask & (0xff << (i * 8)))
413 num_pols_changrp++;
414 }
415 /* 3 channel groups takes as many bytes as 4 channel groups */
416 if (num_pols_changrp == 3)
417 num_pols_changrp = 4;
418 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
419 if (num_pols_changrp)
420 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
421 else
422 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
423 *data = g_variant_new_tuple(grange, 2);
424 break;
425 default:
426 return SR_ERR_NA;
427 }
428
429 return SR_OK;
430}
431
432static int dev_open(struct sr_dev_inst *sdi)
433{
434 struct dev_context *devc;
435
436 devc = sdi->priv;
437
438 if (p_ols_open(devc) != SR_OK) {
439 return SR_ERR;
440 } else {
441 sdi->status = SR_ST_ACTIVE;
442 return SR_OK;
443 }
444}
445
446static int dev_close(struct sr_dev_inst *sdi)
447{
448 int ret;
449 struct dev_context *devc;
450
451 ret = SR_OK;
452 devc = sdi->priv;
453
454 if (sdi->status == SR_ST_ACTIVE) {
455 sr_dbg("Status ACTIVE, closing device.");
456 ret = p_ols_close(devc);
457 } else {
458 sr_spew("Status not ACTIVE, nothing to do.");
459 }
460
461 sdi->status = SR_ST_INACTIVE;
462
463 return ret;
464}
465
466static int set_trigger(const struct sr_dev_inst *sdi, int stage)
467{
468 struct dev_context *devc;
469 uint8_t cmd, arg[4];
470
471 devc = sdi->priv;
472
473 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
474 arg[0] = devc->trigger_mask[stage] & 0xff;
475 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
476 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
477 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
478 if (write_longcommand(devc, cmd, arg) != SR_OK)
479 return SR_ERR;
480
481 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
482 arg[0] = devc->trigger_value[stage] & 0xff;
483 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
484 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
485 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
486 if (write_longcommand(devc, cmd, arg) != SR_OK)
487 return SR_ERR;
488
489 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
490 arg[0] = arg[1] = arg[3] = 0x00;
491 arg[2] = stage;
492 if (stage == devc->num_stages)
493 /* Last stage, fire when this one matches. */
494 arg[3] |= TRIGGER_START;
495 if (write_longcommand(devc, cmd, arg) != SR_OK)
496 return SR_ERR;
497
498 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
499 arg[0] = devc->trigger_edge[stage] & 0xff;
500 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
501 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
502 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
503 if (write_longcommand(devc, cmd, arg) != SR_OK)
504 return SR_ERR;
505
506 return SR_OK;
507}
508
509static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
510{
511 struct dev_context *devc;
512 uint8_t cmd, arg[4];
513
514 devc = sdi->priv;
515
516 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
517 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
518 if (write_longcommand(devc, cmd, arg) != SR_OK)
519 return SR_ERR;
520
521 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
522 if (write_longcommand(devc, cmd, arg) != SR_OK)
523 return SR_ERR;
524
525 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
526 arg[2] = 0x03;
527 if (write_longcommand(devc, cmd, arg) != SR_OK)
528 return SR_ERR;
529
530 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
531 arg[2] = 0x00;
532 if (write_longcommand(devc, cmd, arg) != SR_OK)
533 return SR_ERR;
534
535 return SR_OK;
536}
537
538static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
539{
540 struct dev_context *devc;
541 uint32_t samplecount, readcount, delaycount;
542 uint8_t pols_changrp_mask, arg[4];
543 uint16_t flag_tmp;
544 int num_pols_changrp, samplespercount;
545 int ret, i;
546
547 if (sdi->status != SR_ST_ACTIVE)
548 return SR_ERR_DEV_CLOSED;
549
550 devc = sdi->priv;
551
552 pols_channel_mask(sdi);
553
554 /*
555 * Enable/disable channel groups in the flag register according to the
556 * channel mask. Calculate this here, because num_pols_changrp is
557 * needed to limit readcount.
558 */
559 pols_changrp_mask = 0;
560 num_pols_changrp = 0;
561 for (i = 0; i < 4; i++) {
562 if (devc->channel_mask & (0xff << (i * 8))) {
563 pols_changrp_mask |= (1 << i);
564 num_pols_changrp++;
565 }
566 }
567 /* 3 channel groups takes as many bytes as 4 channel groups */
568 if (num_pols_changrp == 3)
569 num_pols_changrp = 4;
570 /* maximum number of samples (or RLE counts) the buffer memory can hold */
571 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
572
573 /*
574 * Limit readcount to prevent reading past the end of the hardware
575 * buffer.
576 */
577 sr_dbg("max_samples = %d", devc->max_samples);
578 sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
579 samplecount = MIN(devc->max_samples, devc->limit_samples);
580 sr_dbg("Samplecount = %d", samplecount);
581
582 /* In demux mode the OLS is processing two samples per clock */
583 if (devc->flag_reg & FLAG_DEMUX) {
584 samplespercount = 8;
585 }
586 else {
587 samplespercount = 4;
588 }
589
590 readcount = samplecount / samplespercount;
591
592 /* Rather read too many samples than too few. */
593 if (samplecount % samplespercount != 0)
594 readcount++;
595
596 /* Basic triggers. */
597 if (pols_convert_trigger(sdi) != SR_OK) {
598 sr_err("Failed to configure channels.");
599 return SR_ERR;
600 }
601
602 if (devc->num_stages > 0) {
603 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
604 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
605 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
606 if (i <= devc->num_stages) {
607 sr_dbg("Setting p-ols stage %d trigger.", i);
608 if ((ret = set_trigger(sdi, i)) != SR_OK)
609 return ret;
610 }
611 else {
612 sr_dbg("Disabling p-ols stage %d trigger.", i);
613 if ((ret = disable_trigger(sdi, i)) != SR_OK)
614 return ret;
615 }
616 }
617 } else {
618 /* No triggers configured, force trigger on first stage. */
619 sr_dbg("Forcing trigger at stage 0.");
620 if ((ret = set_trigger(sdi, 0)) != SR_OK)
621 return ret;
622 delaycount = readcount;
623 }
624
625 /* Samplerate. */
626 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
627 devc->cur_samplerate, devc->cur_samplerate_divider);
628 arg[0] = devc->cur_samplerate_divider & 0xff;
629 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
630 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
631 arg[3] = 0x00;
632 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
633 return SR_ERR;
634
635 /* Send extended sample limit and pre/post-trigger capture ratio. */
636 arg[0] = ((readcount - 1) & 0xff);
637 arg[1] = ((readcount - 1) & 0xff00) >> 8;
638 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
639 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
640 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
641 return SR_ERR;
642 arg[0] = ((delaycount - 1) & 0xff);
643 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
644 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
645 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
646 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
647 return SR_ERR;
648
649 /* Flag register. */
650 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
651 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
652 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
653 devc->flag_reg & FLAG_RLE ? "on" : "off",
654 devc->flag_reg & FLAG_FILTER ? "on": "off",
655 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
656
657 /*
658 * Enable/disable OLS channel groups in the flag register according
659 * to the channel mask. 1 means "disable channel".
660 */
661 devc->flag_reg &= ~0x3c;
662 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
663 sr_dbg("flag_reg = %x", devc->flag_reg);
664
665 /*
666 * In demux mode the OLS is processing two 8-bit or 16-bit samples
667 * in parallel and for this to work the lower two bits of the four
668 * "channel_disable" bits must be replicated to the upper two bits.
669 */
670 flag_tmp = devc->flag_reg;
671 if (devc->flag_reg & FLAG_DEMUX) {
672 flag_tmp &= ~0x30;
673 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
674 }
675 arg[0] = flag_tmp & 0xff;
676 arg[1] = flag_tmp >> 8;
677 arg[2] = arg[3] = 0x00;
678 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
679 return SR_ERR;
680
681 /* Start acquisition on the device. */
682 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
683 return SR_ERR;
684
685 /* Reset all operational states. */
686 devc->rle_count = devc->num_transfers = 0;
687 devc->num_samples = devc->num_bytes = 0;
688 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
689 memset(devc->sample, 0, 4);
690
691 std_session_send_df_header(cb_data, LOG_PREFIX);
692
693 /* Hook up a dummy handler to receive data from the device. */
694 sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
695 cb_data);
696
697 return SR_OK;
698}
699
700static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
701{
702 struct dev_context *devc;
703
704 devc = sdi->priv;
705
706 sr_dbg("Stopping acquisition.");
707 write_shortcommand(devc, CMD_RESET);
708 write_shortcommand(devc, CMD_RESET);
709 write_shortcommand(devc, CMD_RESET);
710 write_shortcommand(devc, CMD_RESET);
711 write_shortcommand(devc, CMD_RESET);
712
713 sr_session_source_remove(sdi->session, -1);
714
715 std_session_send_df_end(cb_data, LOG_PREFIX);
716
717 return SR_OK;
718}
719
720SR_PRIV struct sr_dev_driver p_ols_driver_info = {
721 .name = "p-ols",
722 .longname = "Pipistrello OLS",
723 .api_version = 1,
724 .init = init,
725 .cleanup = cleanup,
726 .scan = scan,
727 .dev_list = dev_list,
728 .dev_clear = dev_clear,
729 .config_get = config_get,
730 .config_set = config_set,
731 .config_list = config_list,
732 .dev_open = dev_open,
733 .dev_close = dev_close,
734 .dev_acquisition_start = dev_acquisition_start,
735 .dev_acquisition_stop = dev_acquisition_stop,
736 .context = NULL,
737};
Hardware access and backend lib