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pce-322a: Pass driver dev_close callback std_serial_dev_acquisition_stop()
[libsigrok.git] / src / hardware / openbench-logic-sniffer / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <config.h>
21#include "protocol.h"
22
23#define SERIALCOMM "115200/8n1"
24
25static const uint32_t drvopts[] = {
26 SR_CONF_LOGIC_ANALYZER,
27};
28
29static const uint32_t scanopts[] = {
30 SR_CONF_CONN,
31 SR_CONF_SERIALCOMM,
32};
33
34static const uint32_t devopts[] = {
35 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
36 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
37 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
38 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_EXTERNAL_CLOCK | SR_CONF_SET,
40 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_SWAP | SR_CONF_SET,
42 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
43};
44
45static const int32_t trigger_matches[] = {
46 SR_TRIGGER_ZERO,
47 SR_TRIGGER_ONE,
48};
49
50#define STR_PATTERN_NONE "None"
51#define STR_PATTERN_EXTERNAL "External"
52#define STR_PATTERN_INTERNAL "Internal"
53
54/* Supported methods of test pattern outputs */
55enum {
56 /**
57 * Capture pins 31:16 (unbuffered wing) output a test pattern
58 * that can captured on pins 0:15.
59 */
60 PATTERN_EXTERNAL,
61
62 /** Route test pattern internally to capture buffer. */
63 PATTERN_INTERNAL,
64};
65
66static const char *patterns[] = {
67 STR_PATTERN_NONE,
68 STR_PATTERN_EXTERNAL,
69 STR_PATTERN_INTERNAL,
70};
71
72/* Channels are numbered 0-31 (on the PCB silkscreen). */
73SR_PRIV const char *ols_channel_names[] = {
74 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
75 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
76 "24", "25", "26", "27", "28", "29", "30", "31",
77};
78
79/* Default supported samplerates, can be overridden by device metadata. */
80static const uint64_t samplerates[] = {
81 SR_HZ(10),
82 SR_MHZ(200),
83 SR_HZ(1),
84};
85
86#define RESPONSE_DELAY_US (10 * 1000)
87
88static GSList *scan(struct sr_dev_driver *di, GSList *options)
89{
90 struct sr_config *src;
91 struct sr_dev_inst *sdi;
92 struct sr_serial_dev_inst *serial;
93 GSList *l;
94 int ret;
95 unsigned int i;
96 const char *conn, *serialcomm;
97 char buf[8];
98
99 conn = serialcomm = NULL;
100 for (l = options; l; l = l->next) {
101 src = l->data;
102 switch (src->key) {
103 case SR_CONF_CONN:
104 conn = g_variant_get_string(src->data, NULL);
105 break;
106 case SR_CONF_SERIALCOMM:
107 serialcomm = g_variant_get_string(src->data, NULL);
108 break;
109 }
110 }
111 if (!conn)
112 return NULL;
113
114 if (!serialcomm)
115 serialcomm = SERIALCOMM;
116
117 serial = sr_serial_dev_inst_new(conn, serialcomm);
118
119 /* The discovery procedure is like this: first send the Reset
120 * command (0x00) 5 times, since the device could be anywhere
121 * in a 5-byte command. Then send the ID command (0x02).
122 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
123 * have a match.
124 */
125 sr_info("Probing %s.", conn);
126 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
127 return NULL;
128
129 ret = SR_OK;
130 for (i = 0; i < 5; i++) {
131 if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
132 sr_err("Port %s is not writable.", conn);
133 break;
134 }
135 }
136 if (ret != SR_OK) {
137 serial_close(serial);
138 sr_err("Could not use port %s. Quitting.", conn);
139 return NULL;
140 }
141 send_shortcommand(serial, CMD_ID);
142
143 g_usleep(RESPONSE_DELAY_US);
144
145 if (sp_input_waiting(serial->data) == 0) {
146 sr_dbg("Didn't get any reply.");
147 return NULL;
148 }
149
150 ret = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4));
151 if (ret != 4) {
152 sr_err("Invalid reply (expected 4 bytes, got %d).", ret);
153 return NULL;
154 }
155
156 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) {
157 sr_err("Invalid reply (expected '1SLO' or '1ALS', got "
158 "'%c%c%c%c').", buf[0], buf[1], buf[2], buf[3]);
159 return NULL;
160 }
161
162 /* Definitely using the OLS protocol, check if it supports
163 * the metadata command.
164 */
165 send_shortcommand(serial, CMD_METADATA);
166
167 g_usleep(RESPONSE_DELAY_US);
168
169 if (sp_input_waiting(serial->data) != 0) {
170 /* Got metadata. */
171 sdi = get_metadata(serial);
172 } else {
173 /* Not an OLS -- some other board that uses the sump protocol. */
174 sr_info("Device does not support metadata.");
175 sdi = g_malloc0(sizeof(struct sr_dev_inst));
176 sdi->status = SR_ST_INACTIVE;
177 sdi->vendor = g_strdup("Sump");
178 sdi->model = g_strdup("Logic Analyzer");
179 sdi->version = g_strdup("v1.0");
180 for (i = 0; i < ARRAY_SIZE(ols_channel_names); i++)
181 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE,
182 ols_channel_names[i]);
183 sdi->priv = ols_dev_new();
184 }
185 /* Configure samplerate and divider. */
186 if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
187 sr_dbg("Failed to set default samplerate (%"PRIu64").",
188 DEFAULT_SAMPLERATE);
189 sdi->inst_type = SR_INST_SERIAL;
190 sdi->conn = serial;
191
192 serial_close(serial);
193
194 return std_scan_complete(di, g_slist_append(NULL, sdi));
195}
196
197static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
198 const struct sr_channel_group *cg)
199{
200 struct dev_context *devc;
201
202 (void)cg;
203
204 if (!sdi)
205 return SR_ERR_ARG;
206
207 devc = sdi->priv;
208 switch (key) {
209 case SR_CONF_SAMPLERATE:
210 *data = g_variant_new_uint64(devc->cur_samplerate);
211 break;
212 case SR_CONF_CAPTURE_RATIO:
213 *data = g_variant_new_uint64(devc->capture_ratio);
214 break;
215 case SR_CONF_LIMIT_SAMPLES:
216 *data = g_variant_new_uint64(devc->limit_samples);
217 break;
218 case SR_CONF_PATTERN_MODE:
219 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
220 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
221 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
222 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
223 else
224 *data = g_variant_new_string(STR_PATTERN_NONE);
225 break;
226 case SR_CONF_RLE:
227 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
228 break;
229 default:
230 return SR_ERR_NA;
231 }
232
233 return SR_OK;
234}
235
236static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
237 const struct sr_channel_group *cg)
238{
239 struct dev_context *devc;
240 uint16_t flag;
241 uint64_t tmp_u64;
242 int ret;
243 const char *stropt;
244
245 (void)cg;
246
247 if (sdi->status != SR_ST_ACTIVE)
248 return SR_ERR_DEV_CLOSED;
249
250 devc = sdi->priv;
251
252 switch (key) {
253 case SR_CONF_SAMPLERATE:
254 tmp_u64 = g_variant_get_uint64(data);
255 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
256 return SR_ERR_SAMPLERATE;
257 ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
258 break;
259 case SR_CONF_LIMIT_SAMPLES:
260 tmp_u64 = g_variant_get_uint64(data);
261 if (tmp_u64 < MIN_NUM_SAMPLES)
262 return SR_ERR;
263 devc->limit_samples = tmp_u64;
264 ret = SR_OK;
265 break;
266 case SR_CONF_CAPTURE_RATIO:
267 devc->capture_ratio = g_variant_get_uint64(data);
268 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
269 ret = SR_ERR;
270 else
271 ret = SR_OK;
272 break;
273 case SR_CONF_EXTERNAL_CLOCK:
274 if (g_variant_get_boolean(data)) {
275 sr_info("Enabling external clock.");
276 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
277 } else {
278 sr_info("Disabled external clock.");
279 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
280 }
281 ret = SR_OK;
282 break;
283 case SR_CONF_PATTERN_MODE:
284 stropt = g_variant_get_string(data, NULL);
285 ret = SR_OK;
286 flag = 0xffff;
287 if (!strcmp(stropt, STR_PATTERN_NONE)) {
288 sr_info("Disabling test modes.");
289 flag = 0x0000;
290 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
291 sr_info("Enabling internal test mode.");
292 flag = FLAG_INTERNAL_TEST_MODE;
293 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
294 sr_info("Enabling external test mode.");
295 flag = FLAG_EXTERNAL_TEST_MODE;
296 } else {
297 ret = SR_ERR;
298 }
299 if (flag != 0xffff) {
300 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
301 devc->flag_reg |= flag;
302 }
303 break;
304 case SR_CONF_SWAP:
305 if (g_variant_get_boolean(data)) {
306 sr_info("Enabling channel swapping.");
307 devc->flag_reg |= FLAG_SWAP_CHANNELS;
308 } else {
309 sr_info("Disabling channel swapping.");
310 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
311 }
312 ret = SR_OK;
313 break;
314
315 case SR_CONF_RLE:
316 if (g_variant_get_boolean(data)) {
317 sr_info("Enabling RLE.");
318 devc->flag_reg |= FLAG_RLE;
319 } else {
320 sr_info("Disabling RLE.");
321 devc->flag_reg &= ~FLAG_RLE;
322 }
323 ret = SR_OK;
324 break;
325 default:
326 ret = SR_ERR_NA;
327 }
328
329 return ret;
330}
331
332static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
333 const struct sr_channel_group *cg)
334{
335 struct dev_context *devc;
336 GVariant *gvar, *grange[2];
337 GVariantBuilder gvb;
338 int num_ols_changrp, i;
339
340 (void)cg;
341
342 switch (key) {
343 case SR_CONF_SCAN_OPTIONS:
344 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
345 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
346 break;
347 case SR_CONF_DEVICE_OPTIONS:
348 if (!sdi)
349 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
350 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
351 else
352 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
353 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
354 break;
355 case SR_CONF_SAMPLERATE:
356 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
357 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
358 ARRAY_SIZE(samplerates), sizeof(uint64_t));
359 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
360 *data = g_variant_builder_end(&gvb);
361 break;
362 case SR_CONF_TRIGGER_MATCH:
363 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
364 trigger_matches, ARRAY_SIZE(trigger_matches),
365 sizeof(int32_t));
366 break;
367 case SR_CONF_PATTERN_MODE:
368 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
369 break;
370 case SR_CONF_LIMIT_SAMPLES:
371 if (!sdi)
372 return SR_ERR_ARG;
373 devc = sdi->priv;
374 if (devc->flag_reg & FLAG_RLE)
375 return SR_ERR_NA;
376 if (devc->max_samples == 0)
377 /* Device didn't specify sample memory size in metadata. */
378 return SR_ERR_NA;
379 /*
380 * Channel groups are turned off if no channels in that group are
381 * enabled, making more room for samples for the enabled group.
382 */
383 ols_channel_mask(sdi);
384 num_ols_changrp = 0;
385 for (i = 0; i < 4; i++) {
386 if (devc->channel_mask & (0xff << (i * 8)))
387 num_ols_changrp++;
388 }
389 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
390 if (num_ols_changrp)
391 grange[1] = g_variant_new_uint64(devc->max_samples / num_ols_changrp);
392 else
393 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
394 *data = g_variant_new_tuple(grange, 2);
395 break;
396 default:
397 return SR_ERR_NA;
398 }
399
400 return SR_OK;
401}
402
403static int set_trigger(const struct sr_dev_inst *sdi, int stage)
404{
405 struct dev_context *devc;
406 struct sr_serial_dev_inst *serial;
407 uint8_t cmd, arg[4];
408
409 devc = sdi->priv;
410 serial = sdi->conn;
411
412 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
413 arg[0] = devc->trigger_mask[stage] & 0xff;
414 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
415 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
416 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
417 if (send_longcommand(serial, cmd, arg) != SR_OK)
418 return SR_ERR;
419
420 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
421 arg[0] = devc->trigger_value[stage] & 0xff;
422 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
423 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
424 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
425 if (send_longcommand(serial, cmd, arg) != SR_OK)
426 return SR_ERR;
427
428 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
429 arg[0] = arg[1] = arg[3] = 0x00;
430 arg[2] = stage;
431 if (stage == devc->num_stages)
432 /* Last stage, fire when this one matches. */
433 arg[3] |= TRIGGER_START;
434 if (send_longcommand(serial, cmd, arg) != SR_OK)
435 return SR_ERR;
436
437 return SR_OK;
438}
439
440static int dev_acquisition_start(const struct sr_dev_inst *sdi)
441{
442 struct dev_context *devc;
443 struct sr_serial_dev_inst *serial;
444 uint16_t samplecount, readcount, delaycount;
445 uint8_t ols_changrp_mask, arg[4];
446 int num_ols_changrp;
447 int ret, i;
448
449 if (sdi->status != SR_ST_ACTIVE)
450 return SR_ERR_DEV_CLOSED;
451
452 devc = sdi->priv;
453 serial = sdi->conn;
454
455 ols_channel_mask(sdi);
456
457 num_ols_changrp = 0;
458 ols_changrp_mask = 0;
459 for (i = 0; i < 4; i++) {
460 if (devc->channel_mask & (0xff << (i * 8))) {
461 ols_changrp_mask |= (1 << i);
462 num_ols_changrp++;
463 }
464 }
465
466 /*
467 * Limit readcount to prevent reading past the end of the hardware
468 * buffer.
469 */
470 samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
471 readcount = samplecount / 4;
472
473 /* Rather read too many samples than too few. */
474 if (samplecount % 4 != 0)
475 readcount++;
476
477 /* Basic triggers. */
478 if (ols_convert_trigger(sdi) != SR_OK) {
479 sr_err("Failed to configure channels.");
480 return SR_ERR;
481 }
482 if (devc->num_stages > 0) {
483 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
484 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
485 for (i = 0; i <= devc->num_stages; i++) {
486 sr_dbg("Setting OLS stage %d trigger.", i);
487 if ((ret = set_trigger(sdi, i)) != SR_OK)
488 return ret;
489 }
490 } else {
491 /* No triggers configured, force trigger on first stage. */
492 sr_dbg("Forcing trigger at stage 0.");
493 if ((ret = set_trigger(sdi, 0)) != SR_OK)
494 return ret;
495 delaycount = readcount;
496 }
497
498 /* Samplerate. */
499 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
500 devc->cur_samplerate, devc->cur_samplerate_divider);
501 arg[0] = devc->cur_samplerate_divider & 0xff;
502 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
503 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
504 arg[3] = 0x00;
505 if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
506 return SR_ERR;
507
508 /* Send sample limit and pre/post-trigger capture ratio. */
509 sr_dbg("Setting sample limit %d, trigger point at %d",
510 (readcount - 1) * 4, (delaycount - 1) * 4);
511 arg[0] = ((readcount - 1) & 0xff);
512 arg[1] = ((readcount - 1) & 0xff00) >> 8;
513 arg[2] = ((delaycount - 1) & 0xff);
514 arg[3] = ((delaycount - 1) & 0xff00) >> 8;
515 if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
516 return SR_ERR;
517
518 /* Flag register. */
519 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
520 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
521 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
522 devc->flag_reg & FLAG_RLE ? "on" : "off",
523 devc->flag_reg & FLAG_FILTER ? "on": "off",
524 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
525 /*
526 * Enable/disable OLS channel groups in the flag register according
527 * to the channel mask. 1 means "disable channel".
528 */
529 devc->flag_reg |= ~(ols_changrp_mask << 2) & 0x3c;
530 arg[0] = devc->flag_reg & 0xff;
531 arg[1] = devc->flag_reg >> 8;
532 arg[2] = arg[3] = 0x00;
533 if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
534 return SR_ERR;
535
536 /* Start acquisition on the device. */
537 if (send_shortcommand(serial, CMD_RUN) != SR_OK)
538 return SR_ERR;
539
540 /* Reset all operational states. */
541 devc->rle_count = devc->num_transfers = 0;
542 devc->num_samples = devc->num_bytes = 0;
543 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
544 memset(devc->sample, 0, 4);
545
546 std_session_send_df_header(sdi, LOG_PREFIX);
547
548 /* If the device stops sending for longer than it takes to send a byte,
549 * that means it's finished. But wait at least 100 ms to be safe.
550 */
551 serial_source_add(sdi->session, serial, G_IO_IN, 100,
552 ols_receive_data, (struct sr_dev_inst *)sdi);
553
554 return SR_OK;
555}
556
557static int dev_acquisition_stop(struct sr_dev_inst *sdi)
558{
559 abort_acquisition(sdi);
560
561 return SR_OK;
562}
563
564static struct sr_dev_driver ols_driver_info = {
565 .name = "ols",
566 .longname = "Openbench Logic Sniffer",
567 .api_version = 1,
568 .init = std_init,
569 .cleanup = std_cleanup,
570 .scan = scan,
571 .dev_list = std_dev_list,
572 .dev_clear = NULL,
573 .config_get = config_get,
574 .config_set = config_set,
575 .config_list = config_list,
576 .dev_open = std_serial_dev_open,
577 .dev_close = std_serial_dev_close,
578 .dev_acquisition_start = dev_acquisition_start,
579 .dev_acquisition_stop = dev_acquisition_stop,
580 .context = NULL,
581};
582SR_REGISTER_DEV_DRIVER(ols_driver_info);