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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <config.h>
21#include "protocol.h"
22
23#define SERIALCOMM "115200/8n1"
24
25static const uint32_t drvopts[] = {
26 SR_CONF_LOGIC_ANALYZER,
27};
28
29static const uint32_t scanopts[] = {
30 SR_CONF_CONN,
31 SR_CONF_SERIALCOMM,
32};
33
34static const uint32_t devopts[] = {
35 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
36 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
37 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
38 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_EXTERNAL_CLOCK | SR_CONF_SET,
40 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_SWAP | SR_CONF_SET,
42 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
43};
44
45static const int32_t trigger_matches[] = {
46 SR_TRIGGER_ZERO,
47 SR_TRIGGER_ONE,
48};
49
50#define STR_PATTERN_NONE "None"
51#define STR_PATTERN_EXTERNAL "External"
52#define STR_PATTERN_INTERNAL "Internal"
53
54/* Supported methods of test pattern outputs */
55enum {
56 /**
57 * Capture pins 31:16 (unbuffered wing) output a test pattern
58 * that can captured on pins 0:15.
59 */
60 PATTERN_EXTERNAL,
61
62 /** Route test pattern internally to capture buffer. */
63 PATTERN_INTERNAL,
64};
65
66static const char *patterns[] = {
67 STR_PATTERN_NONE,
68 STR_PATTERN_EXTERNAL,
69 STR_PATTERN_INTERNAL,
70};
71
72/* Channels are numbered 0-31 (on the PCB silkscreen). */
73SR_PRIV const char *ols_channel_names[] = {
74 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
75 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
76 "24", "25", "26", "27", "28", "29", "30", "31",
77};
78
79/* Default supported samplerates, can be overridden by device metadata. */
80static const uint64_t samplerates[] = {
81 SR_HZ(10),
82 SR_MHZ(200),
83 SR_HZ(1),
84};
85
86#define RESPONSE_DELAY_US (10 * 1000)
87
88static GSList *scan(struct sr_dev_driver *di, GSList *options)
89{
90 struct sr_config *src;
91 struct sr_dev_inst *sdi;
92 struct sr_serial_dev_inst *serial;
93 GSList *l;
94 int ret;
95 unsigned int i;
96 const char *conn, *serialcomm;
97 char buf[8];
98
99 conn = serialcomm = NULL;
100 for (l = options; l; l = l->next) {
101 src = l->data;
102 switch (src->key) {
103 case SR_CONF_CONN:
104 conn = g_variant_get_string(src->data, NULL);
105 break;
106 case SR_CONF_SERIALCOMM:
107 serialcomm = g_variant_get_string(src->data, NULL);
108 break;
109 }
110 }
111 if (!conn)
112 return NULL;
113
114 if (!serialcomm)
115 serialcomm = SERIALCOMM;
116
117 serial = sr_serial_dev_inst_new(conn, serialcomm);
118
119 /* The discovery procedure is like this: first send the Reset
120 * command (0x00) 5 times, since the device could be anywhere
121 * in a 5-byte command. Then send the ID command (0x02).
122 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
123 * have a match.
124 */
125 sr_info("Probing %s.", conn);
126 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
127 return NULL;
128
129 if (ols_send_reset(serial) != SR_OK) {
130 serial_close(serial);
131 sr_err("Could not use port %s. Quitting.", conn);
132 return NULL;
133 }
134 send_shortcommand(serial, CMD_ID);
135
136 g_usleep(RESPONSE_DELAY_US);
137
138 if (sp_input_waiting(serial->data) == 0) {
139 sr_dbg("Didn't get any reply.");
140 return NULL;
141 }
142
143 ret = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4));
144 if (ret != 4) {
145 sr_err("Invalid reply (expected 4 bytes, got %d).", ret);
146 return NULL;
147 }
148
149 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) {
150 sr_err("Invalid reply (expected '1SLO' or '1ALS', got "
151 "'%c%c%c%c').", buf[0], buf[1], buf[2], buf[3]);
152 return NULL;
153 }
154
155 /* Definitely using the OLS protocol, check if it supports
156 * the metadata command.
157 */
158 send_shortcommand(serial, CMD_METADATA);
159
160 g_usleep(RESPONSE_DELAY_US);
161
162 if (sp_input_waiting(serial->data) != 0) {
163 /* Got metadata. */
164 sdi = get_metadata(serial);
165 } else {
166 /* Not an OLS -- some other board that uses the sump protocol. */
167 sr_info("Device does not support metadata.");
168 sdi = g_malloc0(sizeof(struct sr_dev_inst));
169 sdi->status = SR_ST_INACTIVE;
170 sdi->vendor = g_strdup("Sump");
171 sdi->model = g_strdup("Logic Analyzer");
172 sdi->version = g_strdup("v1.0");
173 for (i = 0; i < ARRAY_SIZE(ols_channel_names); i++)
174 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE,
175 ols_channel_names[i]);
176 sdi->priv = ols_dev_new();
177 }
178 /* Configure samplerate and divider. */
179 if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
180 sr_dbg("Failed to set default samplerate (%"PRIu64").",
181 DEFAULT_SAMPLERATE);
182 sdi->inst_type = SR_INST_SERIAL;
183 sdi->conn = serial;
184
185 serial_close(serial);
186
187 return std_scan_complete(di, g_slist_append(NULL, sdi));
188}
189
190static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
191 const struct sr_channel_group *cg)
192{
193 struct dev_context *devc;
194
195 (void)cg;
196
197 if (!sdi)
198 return SR_ERR_ARG;
199
200 devc = sdi->priv;
201 switch (key) {
202 case SR_CONF_SAMPLERATE:
203 *data = g_variant_new_uint64(devc->cur_samplerate);
204 break;
205 case SR_CONF_CAPTURE_RATIO:
206 *data = g_variant_new_uint64(devc->capture_ratio);
207 break;
208 case SR_CONF_LIMIT_SAMPLES:
209 *data = g_variant_new_uint64(devc->limit_samples);
210 break;
211 case SR_CONF_PATTERN_MODE:
212 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
213 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
214 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
215 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
216 else
217 *data = g_variant_new_string(STR_PATTERN_NONE);
218 break;
219 case SR_CONF_RLE:
220 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
221 break;
222 default:
223 return SR_ERR_NA;
224 }
225
226 return SR_OK;
227}
228
229static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
230 const struct sr_channel_group *cg)
231{
232 struct dev_context *devc;
233 uint16_t flag;
234 uint64_t tmp_u64;
235 int ret;
236 const char *stropt;
237
238 (void)cg;
239
240 devc = sdi->priv;
241
242 switch (key) {
243 case SR_CONF_SAMPLERATE:
244 tmp_u64 = g_variant_get_uint64(data);
245 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
246 return SR_ERR_SAMPLERATE;
247 ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
248 break;
249 case SR_CONF_LIMIT_SAMPLES:
250 tmp_u64 = g_variant_get_uint64(data);
251 if (tmp_u64 < MIN_NUM_SAMPLES)
252 return SR_ERR;
253 devc->limit_samples = tmp_u64;
254 ret = SR_OK;
255 break;
256 case SR_CONF_CAPTURE_RATIO:
257 devc->capture_ratio = g_variant_get_uint64(data);
258 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
259 ret = SR_ERR;
260 else
261 ret = SR_OK;
262 break;
263 case SR_CONF_EXTERNAL_CLOCK:
264 if (g_variant_get_boolean(data)) {
265 sr_info("Enabling external clock.");
266 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
267 } else {
268 sr_info("Disabled external clock.");
269 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
270 }
271 ret = SR_OK;
272 break;
273 case SR_CONF_PATTERN_MODE:
274 stropt = g_variant_get_string(data, NULL);
275 ret = SR_OK;
276 flag = 0xffff;
277 if (!strcmp(stropt, STR_PATTERN_NONE)) {
278 sr_info("Disabling test modes.");
279 flag = 0x0000;
280 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
281 sr_info("Enabling internal test mode.");
282 flag = FLAG_INTERNAL_TEST_MODE;
283 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
284 sr_info("Enabling external test mode.");
285 flag = FLAG_EXTERNAL_TEST_MODE;
286 } else {
287 ret = SR_ERR;
288 }
289 if (flag != 0xffff) {
290 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
291 devc->flag_reg |= flag;
292 }
293 break;
294 case SR_CONF_SWAP:
295 if (g_variant_get_boolean(data)) {
296 sr_info("Enabling channel swapping.");
297 devc->flag_reg |= FLAG_SWAP_CHANNELS;
298 } else {
299 sr_info("Disabling channel swapping.");
300 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
301 }
302 ret = SR_OK;
303 break;
304
305 case SR_CONF_RLE:
306 if (g_variant_get_boolean(data)) {
307 sr_info("Enabling RLE.");
308 devc->flag_reg |= FLAG_RLE;
309 } else {
310 sr_info("Disabling RLE.");
311 devc->flag_reg &= ~FLAG_RLE;
312 }
313 ret = SR_OK;
314 break;
315 default:
316 ret = SR_ERR_NA;
317 }
318
319 return ret;
320}
321
322static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
323 const struct sr_channel_group *cg)
324{
325 struct dev_context *devc;
326 GVariant *gvar, *grange[2];
327 GVariantBuilder gvb;
328 int num_ols_changrp, i;
329
330 switch (key) {
331 case SR_CONF_SCAN_OPTIONS:
332 case SR_CONF_DEVICE_OPTIONS:
333 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
334 case SR_CONF_SAMPLERATE:
335 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
336 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
337 ARRAY_SIZE(samplerates), sizeof(uint64_t));
338 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
339 *data = g_variant_builder_end(&gvb);
340 break;
341 case SR_CONF_TRIGGER_MATCH:
342 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
343 trigger_matches, ARRAY_SIZE(trigger_matches),
344 sizeof(int32_t));
345 break;
346 case SR_CONF_PATTERN_MODE:
347 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
348 break;
349 case SR_CONF_LIMIT_SAMPLES:
350 if (!sdi)
351 return SR_ERR_ARG;
352 devc = sdi->priv;
353 if (devc->flag_reg & FLAG_RLE)
354 return SR_ERR_NA;
355 if (devc->max_samples == 0)
356 /* Device didn't specify sample memory size in metadata. */
357 return SR_ERR_NA;
358 /*
359 * Channel groups are turned off if no channels in that group are
360 * enabled, making more room for samples for the enabled group.
361 */
362 ols_channel_mask(sdi);
363 num_ols_changrp = 0;
364 for (i = 0; i < 4; i++) {
365 if (devc->channel_mask & (0xff << (i * 8)))
366 num_ols_changrp++;
367 }
368 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
369 if (num_ols_changrp)
370 grange[1] = g_variant_new_uint64(devc->max_samples / num_ols_changrp);
371 else
372 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
373 *data = g_variant_new_tuple(grange, 2);
374 break;
375 default:
376 return SR_ERR_NA;
377 }
378
379 return SR_OK;
380}
381
382static int set_trigger(const struct sr_dev_inst *sdi, int stage)
383{
384 struct dev_context *devc;
385 struct sr_serial_dev_inst *serial;
386 uint8_t cmd, arg[4];
387
388 devc = sdi->priv;
389 serial = sdi->conn;
390
391 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
392 arg[0] = devc->trigger_mask[stage] & 0xff;
393 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
394 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
395 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
396 if (send_longcommand(serial, cmd, arg) != SR_OK)
397 return SR_ERR;
398
399 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
400 arg[0] = devc->trigger_value[stage] & 0xff;
401 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
402 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
403 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
404 if (send_longcommand(serial, cmd, arg) != SR_OK)
405 return SR_ERR;
406
407 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
408 arg[0] = arg[1] = arg[3] = 0x00;
409 arg[2] = stage;
410 if (stage == devc->num_stages)
411 /* Last stage, fire when this one matches. */
412 arg[3] |= TRIGGER_START;
413 if (send_longcommand(serial, cmd, arg) != SR_OK)
414 return SR_ERR;
415
416 return SR_OK;
417}
418
419static int dev_acquisition_start(const struct sr_dev_inst *sdi)
420{
421 struct dev_context *devc;
422 struct sr_serial_dev_inst *serial;
423 uint16_t samplecount, readcount, delaycount;
424 uint8_t ols_changrp_mask, arg[4];
425 int num_ols_changrp;
426 int ret, i;
427
428 devc = sdi->priv;
429 serial = sdi->conn;
430
431 ols_channel_mask(sdi);
432
433 num_ols_changrp = 0;
434 ols_changrp_mask = 0;
435 for (i = 0; i < 4; i++) {
436 if (devc->channel_mask & (0xff << (i * 8))) {
437 ols_changrp_mask |= (1 << i);
438 num_ols_changrp++;
439 }
440 }
441
442 /*
443 * Limit readcount to prevent reading past the end of the hardware
444 * buffer.
445 */
446 samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
447 readcount = samplecount / 4;
448
449 /* Rather read too many samples than too few. */
450 if (samplecount % 4 != 0)
451 readcount++;
452
453 /* Basic triggers. */
454 if (ols_convert_trigger(sdi) != SR_OK) {
455 sr_err("Failed to configure channels.");
456 return SR_ERR;
457 }
458 if (devc->num_stages > 0) {
459 /*
460 * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf
461 * reset command must be send prior each arm command
462 */
463 sr_dbg("Send reset command before trigger configure");
464 if (ols_send_reset(serial) != SR_OK)
465 return SR_ERR;
466
467 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
468 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
469 for (i = 0; i <= devc->num_stages; i++) {
470 sr_dbg("Setting OLS stage %d trigger.", i);
471 if ((ret = set_trigger(sdi, i)) != SR_OK)
472 return ret;
473 }
474 } else {
475 /* No triggers configured, force trigger on first stage. */
476 sr_dbg("Forcing trigger at stage 0.");
477 if ((ret = set_trigger(sdi, 0)) != SR_OK)
478 return ret;
479 delaycount = readcount;
480 }
481
482 /* Samplerate. */
483 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
484 devc->cur_samplerate, devc->cur_samplerate_divider);
485 arg[0] = devc->cur_samplerate_divider & 0xff;
486 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
487 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
488 arg[3] = 0x00;
489 if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
490 return SR_ERR;
491
492 /* Send sample limit and pre/post-trigger capture ratio. */
493 sr_dbg("Setting sample limit %d, trigger point at %d",
494 (readcount - 1) * 4, (delaycount - 1) * 4);
495 arg[0] = ((readcount - 1) & 0xff);
496 arg[1] = ((readcount - 1) & 0xff00) >> 8;
497 arg[2] = ((delaycount - 1) & 0xff);
498 arg[3] = ((delaycount - 1) & 0xff00) >> 8;
499 if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
500 return SR_ERR;
501
502 /* Flag register. */
503 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
504 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
505 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
506 devc->flag_reg & FLAG_RLE ? "on" : "off",
507 devc->flag_reg & FLAG_FILTER ? "on": "off",
508 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
509 /*
510 * Enable/disable OLS channel groups in the flag register according
511 * to the channel mask. 1 means "disable channel".
512 */
513 devc->flag_reg |= ~(ols_changrp_mask << 2) & 0x3c;
514 arg[0] = devc->flag_reg & 0xff;
515 arg[1] = devc->flag_reg >> 8;
516 arg[2] = arg[3] = 0x00;
517 if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
518 return SR_ERR;
519
520 /* Start acquisition on the device. */
521 if (send_shortcommand(serial, CMD_RUN) != SR_OK)
522 return SR_ERR;
523
524 /* Reset all operational states. */
525 devc->rle_count = devc->num_transfers = 0;
526 devc->num_samples = devc->num_bytes = 0;
527 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
528 memset(devc->sample, 0, 4);
529
530 std_session_send_df_header(sdi);
531
532 /* If the device stops sending for longer than it takes to send a byte,
533 * that means it's finished. But wait at least 100 ms to be safe.
534 */
535 serial_source_add(sdi->session, serial, G_IO_IN, 100,
536 ols_receive_data, (struct sr_dev_inst *)sdi);
537
538 return SR_OK;
539}
540
541static int dev_acquisition_stop(struct sr_dev_inst *sdi)
542{
543 abort_acquisition(sdi);
544
545 return SR_OK;
546}
547
548static struct sr_dev_driver ols_driver_info = {
549 .name = "ols",
550 .longname = "Openbench Logic Sniffer",
551 .api_version = 1,
552 .init = std_init,
553 .cleanup = std_cleanup,
554 .scan = scan,
555 .dev_list = std_dev_list,
556 .dev_clear = std_dev_clear,
557 .config_get = config_get,
558 .config_set = config_set,
559 .config_list = config_list,
560 .dev_open = std_serial_dev_open,
561 .dev_close = std_serial_dev_close,
562 .dev_acquisition_start = dev_acquisition_start,
563 .dev_acquisition_stop = dev_acquisition_stop,
564 .context = NULL,
565};
566SR_REGISTER_DEV_DRIVER(ols_driver_info);