[libsigrok.git] / src / hardware / hantek-4032l / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
 * Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
 * Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H
#define LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H

#include <stdint.h>
#include <glib.h>
#include <string.h>
#include <libsigrok/libsigrok.h>
#include "libsigrok-internal.h"

#define LOG_PREFIX "hantek-4032l"

#define H4032L_USB_VENDOR 0x04b5
#define H4032L_USB_PRODUCT 0x4032

#define H4032L_DATA_BUFFER_SIZE (2 * 1024)
#define H4032L_DATA_TRANSFER_MAX_NUM 32

#define H4043L_NUM_SAMPLES_MIN (2 * 1024)
#define H4032L_NUM_SAMPLES_MAX (64 * 1024 * 1024)

#define H4032L_CMD_PKT_MAGIC 0x017f
#define H4032L_STATUS_PACKET_MAGIC 0x2B1A037F
#define H4032L_START_PACKET_MAGIC 0x2B1A027F
#define H4032L_END_PACKET_MAGIC 0x4D3C037F

enum h4032l_trigger_edge_type {
	H4032L_TRIGGER_EDGE_TYPE_RISE,
	H4032L_TRIGGER_EDGE_TYPE_FALL,
	H4032L_TRIGGER_EDGE_TYPE_TOGGLE,
	H4032L_TRIGGER_EDGE_TYPE_DISABLED
};

enum h4032l_trigger_data_range_type {
	H4032L_TRIGGER_DATA_RANGE_TYPE_MAX,
	H4032L_TRIGGER_DATA_RANGE_TYPE_MIN_OR_MAX,
	H4032L_TRIGGER_DATA_RANGE_TYPE_OUT_OF_RANGE,
	H4032L_TRIGGER_DATA_RANGE_TYPE_WITHIN_RANGE
};

enum h4032l_trigger_time_range_type {
	H4032L_TRIGGER_TIME_RANGE_TYPE_MAX,
	H4032L_TRIGGER_TIME_RANGE_TYPE_MIN_OR_MAX,
	H4032L_TRIGGER_TIME_RANGE_TYPE_OUT_OF_RANGE,
	H4032L_TRIGGER_TIME_RANGE_TYPE_WITHIN_RANGE
};

enum h4032l_trigger_data_selection {
	H4032L_TRIGGER_DATA_SELECTION_NEXT,
	H4032L_TRIGGER_DATA_SELECTION_CURRENT,
	H4032L_TRIGGER_DATA_SELECTION_PREV
};

enum h4032l_status {
	H4032L_STATUS_IDLE,
	H4032L_STATUS_CMD_CONFIGURE,
	H4032L_STATUS_CMD_STATUS,
	H4032L_STATUS_RESPONSE_STATUS,
	H4032L_STATUS_RESPONSE_STATUS_RETRY,
	H4032L_STATUS_RESPONSE_STATUS_CONTINUE,
	H4032L_STATUS_CMD_GET,
	H4032L_STATUS_FIRST_TRANSFER,
	H4032L_STATUS_TRANSFER
};

#pragma pack(push,2)
struct h4032l_trigger {
	struct {
		uint32_t edge_signal:5;
		uint32_t edge_type:2;
		uint32_t :1;
		uint32_t data_range_type:2;
		uint32_t time_range_type:2;
		uint32_t data_range_enabled:1;
		uint32_t time_range_enabled:1;
		uint32_t :2;
		uint32_t data_sel:2;
		uint32_t combined_enabled:1;
	} flags;
	uint32_t data_range_min;
	uint32_t data_range_max;
	uint32_t time_range_min;
	uint32_t time_range_max;
	uint32_t data_range_mask;
	uint32_t combine_mask;
	uint32_t combine_data;
};

struct h4032l_cmd_pkt {
	uint16_t magic; /* 0x017f */
	uint8_t sample_rate;
	struct {
		uint8_t enable_trigger1:1;
		uint8_t enable_trigger2:1;
		uint8_t trigger_and_logic:1;
	} trig_flags;
	uint16_t pwm_a;
	uint16_t pwm_b;
	uint16_t reserved;
	uint32_t sample_size; /* Sample depth in bits per channel, 2k-64M, must be multiple of 512. */
	uint32_t pre_trigger_size; /* Pretrigger buffer depth in bits, must be < sample_size. */
	struct h4032l_trigger trigger[2];
	uint16_t cmd;
};
#pragma pack(pop)

struct dev_context {
	enum h4032l_status status;
	unsigned int sent_samples;
	int submitted_transfers;
	uint32_t remaining_samples;
	gboolean acq_aborted;
	struct h4032l_cmd_pkt cmd_pkt;
	unsigned int num_transfers;
	struct libusb_transfer **transfers;
	uint8_t buffer[512];
	uint64_t capture_ratio;
	uint32_t trigger_pos;
	double cur_threshold[2];
	uint32_t fpga_version;
};

SR_PRIV int h4032l_receive_data(int fd, int revents, void *cb_data);
SR_PRIV uint16_t h4032l_voltage2pwm(double voltage);
SR_PRIV void LIBUSB_CALL h4032l_usb_callback(struct libusb_transfer *transfer);
SR_PRIV void LIBUSB_CALL h4032l_data_transfer_callback(struct libusb_transfer *transfer);
SR_PRIV int h4032l_start_data_transfers(const struct sr_dev_inst *sdi);
SR_PRIV int h4032l_start(const struct sr_dev_inst *sdi);
SR_PRIV int h4032l_stop(struct sr_dev_inst *sdi);
SR_PRIV int h4032l_dev_open(struct sr_dev_inst *sdi);
SR_PRIV int h4032l_get_fpga_version(const struct sr_dev_inst *sdi);

#endif
Commit	Line	Data
	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
	5	* Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
	6	* Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	#ifndef LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H
	23	#define LIBSIGROK_HARDWARE_HANTEK_4032L_PROTOCOL_H
	24
	25	#include <stdint.h>
	26	#include <glib.h>
	27	#include <string.h>
	28	#include <libsigrok/libsigrok.h>
	29	#include "libsigrok-internal.h"
	30
	31	#define LOG_PREFIX "hantek-4032l"
	32
	33	#define H4032L_USB_VENDOR 0x04b5
	34	#define H4032L_USB_PRODUCT 0x4032
	35
	36	#define H4032L_DATA_BUFFER_SIZE (2 * 1024)
	37	#define H4032L_DATA_TRANSFER_MAX_NUM 32
	38
	39	#define H4043L_NUM_SAMPLES_MIN (2 * 1024)
	40	#define H4032L_NUM_SAMPLES_MAX (64 * 1024 * 1024)
	41
	42	#define H4032L_CMD_PKT_MAGIC 0x017f
	43	#define H4032L_STATUS_PACKET_MAGIC 0x2B1A037F
	44	#define H4032L_START_PACKET_MAGIC 0x2B1A027F
	45	#define H4032L_END_PACKET_MAGIC 0x4D3C037F
	46
	47	enum h4032l_trigger_edge_type {
	48	H4032L_TRIGGER_EDGE_TYPE_RISE,
	49	H4032L_TRIGGER_EDGE_TYPE_FALL,
	50	H4032L_TRIGGER_EDGE_TYPE_TOGGLE,
	51	H4032L_TRIGGER_EDGE_TYPE_DISABLED
	52	};
	53
	54	enum h4032l_trigger_data_range_type {
	55	H4032L_TRIGGER_DATA_RANGE_TYPE_MAX,
	56	H4032L_TRIGGER_DATA_RANGE_TYPE_MIN_OR_MAX,
	57	H4032L_TRIGGER_DATA_RANGE_TYPE_OUT_OF_RANGE,
	58	H4032L_TRIGGER_DATA_RANGE_TYPE_WITHIN_RANGE
	59	};
	60
	61	enum h4032l_trigger_time_range_type {
	62	H4032L_TRIGGER_TIME_RANGE_TYPE_MAX,
	63	H4032L_TRIGGER_TIME_RANGE_TYPE_MIN_OR_MAX,
	64	H4032L_TRIGGER_TIME_RANGE_TYPE_OUT_OF_RANGE,
	65	H4032L_TRIGGER_TIME_RANGE_TYPE_WITHIN_RANGE
	66	};
	67
	68	enum h4032l_trigger_data_selection {
	69	H4032L_TRIGGER_DATA_SELECTION_NEXT,
	70	H4032L_TRIGGER_DATA_SELECTION_CURRENT,
	71	H4032L_TRIGGER_DATA_SELECTION_PREV
	72	};
	73
	74	enum h4032l_status {
	75	H4032L_STATUS_IDLE,
	76	H4032L_STATUS_CMD_CONFIGURE,
	77	H4032L_STATUS_CMD_STATUS,
	78	H4032L_STATUS_RESPONSE_STATUS,
	79	H4032L_STATUS_RESPONSE_STATUS_RETRY,
	80	H4032L_STATUS_RESPONSE_STATUS_CONTINUE,
	81	H4032L_STATUS_CMD_GET,
	82	H4032L_STATUS_FIRST_TRANSFER,
	83	H4032L_STATUS_TRANSFER
	84	};
	85
	86	#pragma pack(push,2)
	87	struct h4032l_trigger {
	88	struct {
	89	uint32_t edge_signal:5;
	90	uint32_t edge_type:2;
	91	uint32_t :1;
	92	uint32_t data_range_type:2;
	93	uint32_t time_range_type:2;
	94	uint32_t data_range_enabled:1;
	95	uint32_t time_range_enabled:1;
	96	uint32_t :2;
	97	uint32_t data_sel:2;
	98	uint32_t combined_enabled:1;
	99	} flags;
	100	uint32_t data_range_min;
	101	uint32_t data_range_max;
	102	uint32_t time_range_min;
	103	uint32_t time_range_max;
	104	uint32_t data_range_mask;
	105	uint32_t combine_mask;
	106	uint32_t combine_data;
	107	};
	108
	109	struct h4032l_cmd_pkt {
	110	uint16_t magic; /* 0x017f */
	111	uint8_t sample_rate;
	112	struct {
	113	uint8_t enable_trigger1:1;
	114	uint8_t enable_trigger2:1;
	115	uint8_t trigger_and_logic:1;
	116	} trig_flags;
	117	uint16_t pwm_a;
	118	uint16_t pwm_b;
	119	uint16_t reserved;
	120	uint32_t sample_size; /* Sample depth in bits per channel, 2k-64M, must be multiple of 512. */
	121	uint32_t pre_trigger_size; /* Pretrigger buffer depth in bits, must be < sample_size. */
	122	struct h4032l_trigger trigger[2];
	123	uint16_t cmd;
	124	};
	125	#pragma pack(pop)
	126
	127	struct dev_context {
	128	enum h4032l_status status;
	129	unsigned int sent_samples;
	130	int submitted_transfers;
	131	uint32_t remaining_samples;
	132	gboolean acq_aborted;
	133	struct h4032l_cmd_pkt cmd_pkt;
	134	unsigned int num_transfers;
	135	struct libusb_transfer **transfers;
	136	uint8_t buffer[512];
	137	uint64_t capture_ratio;
	138	uint32_t trigger_pos;
	139	double cur_threshold[2];
	140	uint32_t fpga_version;
	141	};
	142
	143	SR_PRIV int h4032l_receive_data(int fd, int revents, void *cb_data);
	144	SR_PRIV uint16_t h4032l_voltage2pwm(double voltage);
	145	SR_PRIV void LIBUSB_CALL h4032l_usb_callback(struct libusb_transfer *transfer);
	146	SR_PRIV void LIBUSB_CALL h4032l_data_transfer_callback(struct libusb_transfer *transfer);
	147	SR_PRIV int h4032l_start_data_transfers(const struct sr_dev_inst *sdi);
	148	SR_PRIV int h4032l_start(const struct sr_dev_inst *sdi);
	149	SR_PRIV int h4032l_stop(struct sr_dev_inst *sdi);
	150	SR_PRIV int h4032l_dev_open(struct sr_dev_inst *sdi);
	151	SR_PRIV int h4032l_get_fpga_version(const struct sr_dev_inst *sdi);
	152
	153	#endif