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rigol-ds1xx2: properly send frame begin/end packets
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <fcntl.h>
21#include <unistd.h>
22#include <stdlib.h>
23#include <string.h>
24#include <glib.h>
25#include "libsigrok.h"
26#include "libsigrok-internal.h"
27#include "protocol.h"
28
29#define NUM_TIMEBASE 12
30#define NUM_VDIV 8
31
32static const int32_t hwcaps[] = {
33 SR_CONF_OSCILLOSCOPE,
34 SR_CONF_LIMIT_SAMPLES,
35 SR_CONF_TIMEBASE,
36 SR_CONF_TRIGGER_SOURCE,
37 SR_CONF_TRIGGER_SLOPE,
38 SR_CONF_HORIZ_TRIGGERPOS,
39 SR_CONF_VDIV,
40 SR_CONF_COUPLING,
41 SR_CONF_NUM_TIMEBASE,
42 SR_CONF_NUM_VDIV,
43};
44
45static const uint64_t timebases[][2] = {
46 /* nanoseconds */
47 { 2, 1000000000 },
48 { 5, 1000000000 },
49 { 10, 1000000000 },
50 { 20, 1000000000 },
51 { 50, 1000000000 },
52 { 100, 1000000000 },
53 { 500, 1000000000 },
54 /* microseconds */
55 { 1, 1000000 },
56 { 2, 1000000 },
57 { 5, 1000000 },
58 { 10, 1000000 },
59 { 20, 1000000 },
60 { 50, 1000000 },
61 { 100, 1000000 },
62 { 200, 1000000 },
63 { 500, 1000000 },
64 /* milliseconds */
65 { 1, 1000 },
66 { 2, 1000 },
67 { 5, 1000 },
68 { 10, 1000 },
69 { 20, 1000 },
70 { 50, 1000 },
71 { 100, 1000 },
72 { 200, 1000 },
73 { 500, 1000 },
74 /* seconds */
75 { 1, 1 },
76 { 2, 1 },
77 { 5, 1 },
78 { 10, 1 },
79 { 20, 1 },
80 { 50, 1 },
81};
82
83static const uint64_t vdivs[][2] = {
84 /* millivolts */
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* volts */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98};
99
100static const char *trigger_sources[] = {
101 "CH1",
102 "CH2",
103 "EXT",
104 "AC Line",
105};
106
107static const char *coupling[] = {
108 "AC",
109 "DC",
110 "GND",
111};
112
113static const char *supported_models[] = {
114 "DS1052E",
115 "DS1102E",
116 "DS1052D",
117 "DS1102D",
118};
119
120SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info;
121static struct sr_dev_driver *di = &rigol_ds1xx2_driver_info;
122
123/* Properly close and free all devices. */
124static int clear_instances(void)
125{
126 struct sr_dev_inst *sdi;
127 struct drv_context *drvc;
128 struct dev_context *devc;
129 GSList *l;
130
131 if (!(drvc = di->priv))
132 return SR_OK;
133
134 for (l = drvc->instances; l; l = l->next) {
135 if (!(sdi = l->data))
136 continue;
137 if (!(devc = sdi->priv))
138 continue;
139
140 g_free(devc->device);
141 g_slist_free(devc->enabled_probes);
142 close(devc->fd);
143
144 sr_dev_inst_free(sdi);
145 }
146
147 g_slist_free(drvc->instances);
148 drvc->instances = NULL;
149
150 return SR_OK;
151}
152
153static int hw_init(struct sr_context *sr_ctx)
154{
155 return std_hw_init(sr_ctx, di, DRIVER_LOG_DOMAIN);
156}
157
158static GSList *hw_scan(GSList *options)
159{
160 struct drv_context *drvc;
161 struct sr_dev_inst *sdi;
162 struct dev_context *devc;
163 struct sr_probe *probe;
164 GSList *devices;
165 GDir *dir;
166 const gchar *dev_name;
167 const gchar *dev_dir = "/dev/";
168 const gchar *prefix = "usbtmc";
169 gchar *device;
170 const gchar *idn_query = "*IDN?";
171 unsigned int i;
172 int len, num_tokens, fd;
173 const gchar *delimiter = ",";
174 gchar **tokens;
175 const char *manufacturer, *model, *version;
176 gboolean matched = FALSE;
177 char buf[256];
178
179 (void)options;
180
181 drvc = di->priv;
182 drvc->instances = NULL;
183
184 devices = NULL;
185
186 dir = g_dir_open("/sys/class/usb/", 0, NULL);
187
188 if (dir == NULL)
189 return NULL;
190
191 while ((dev_name = g_dir_read_name(dir)) != NULL) {
192 if (strncmp(dev_name, prefix, strlen(prefix)))
193 continue;
194
195 device = g_strconcat(dev_dir, dev_name, NULL);
196
197 fd = open(device, O_RDWR);
198 len = write(fd, idn_query, strlen(idn_query));
199 len = read(fd, buf, sizeof(buf));
200 close(fd);
201 if (len == 0) {
202 g_free(device);
203 return NULL;
204 }
205
206 buf[len] = 0;
207 tokens = g_strsplit(buf, delimiter, 0);
208 close(fd);
209 sr_dbg("response: %s %d [%s]", device, len, buf);
210
211 for (num_tokens = 0; tokens[num_tokens] != NULL; num_tokens++);
212
213 if (num_tokens < 4) {
214 g_strfreev(tokens);
215 g_free(device);
216 return NULL;
217 }
218
219 manufacturer = tokens[0];
220 model = tokens[1];
221 version = tokens[3];
222
223 if (strcmp(manufacturer, "Rigol Technologies")) {
224 g_strfreev(tokens);
225 g_free(device);
226 return NULL;
227 }
228
229 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
230 if (!strcmp(model, supported_models[i])) {
231 matched = 1;
232 break;
233 }
234 }
235
236 if (!matched || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
237 manufacturer, model, version))) {
238 g_strfreev(tokens);
239 g_free(device);
240 return NULL;
241 }
242
243 g_strfreev(tokens);
244
245 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
246 sr_err("Device context malloc failed.");
247 g_free(device);
248 return NULL;
249 }
250
251 devc->device = device;
252
253 sdi->priv = devc;
254 sdi->driver = di;
255
256 for (i = 0; i < 2; i++) {
257 if (!(probe = sr_probe_new(0, SR_PROBE_ANALOG, TRUE,
258 i == 0 ? "CH1" : "CH2")))
259 return NULL;
260 sdi->probes = g_slist_append(sdi->probes, probe);
261 }
262
263 drvc->instances = g_slist_append(drvc->instances, sdi);
264 devices = g_slist_append(devices, sdi);
265 }
266
267 g_dir_close(dir);
268
269 return devices;
270}
271
272static GSList *hw_dev_list(void)
273{
274 return ((struct drv_context *)(di->priv))->instances;
275}
276
277static int hw_dev_open(struct sr_dev_inst *sdi)
278{
279 struct dev_context *devc;
280 int fd;
281
282 devc = sdi->priv;
283
284 if ((fd = open(devc->device, O_RDWR)) == -1)
285 return SR_ERR;
286
287 devc->fd = fd;
288
289 devc->scale = 1;
290
291 return SR_OK;
292}
293
294static int hw_dev_close(struct sr_dev_inst *sdi)
295{
296 struct dev_context *devc;
297
298 devc = sdi->priv;
299
300 close(devc->fd);
301
302 return SR_OK;
303}
304
305static int hw_cleanup(void)
306{
307 clear_instances();
308
309 return SR_OK;
310}
311
312static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi)
313{
314
315 (void)sdi;
316
317 switch (id) {
318 case SR_CONF_NUM_TIMEBASE:
319 *data = g_variant_new_int32(NUM_TIMEBASE);
320 break;
321 case SR_CONF_NUM_VDIV:
322 *data = g_variant_new_int32(NUM_VDIV);
323 break;
324 default:
325 return SR_ERR_ARG;
326 }
327
328 return SR_OK;
329}
330
331static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
332{
333 struct dev_context *devc;
334 uint64_t tmp_u64, p, q;
335 double tmp_double;
336 unsigned int i;
337 int tmp_int, ret;
338 const char *tmp_str, *channel;
339
340 devc = sdi->priv;
341
342 if (sdi->status != SR_ST_ACTIVE) {
343 sr_err("Device inactive, can't set config options.");
344 return SR_ERR;
345 }
346
347 ret = SR_OK;
348 switch (id) {
349 case SR_CONF_LIMIT_FRAMES:
350 devc->limit_frames = g_variant_get_uint64(data);
351 break;
352 case SR_CONF_TRIGGER_SLOPE:
353 tmp_u64 = g_variant_get_uint64(data);
354 rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SLOP %s\n",
355 tmp_u64 ? "POS" : "NEG");
356 break;
357 case SR_CONF_HORIZ_TRIGGERPOS:
358 tmp_double = g_variant_get_double(data);
359 rigol_ds1xx2_send_data(devc->fd, ":TIM:OFFS %.9f\n", tmp_double);
360 break;
361 case SR_CONF_TIMEBASE:
362 g_variant_get(data, "(tt)", &p, &q);
363 tmp_int = -1;
364 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
365 if (timebases[i][0] == p && timebases[i][1] == q) {
366 tmp_int = i;
367 break;
368 }
369 }
370 if (tmp_int >= 0)
371 rigol_ds1xx2_send_data(devc->fd, ":TIM:SCAL %.9f\n",
372 (float)timebases[i][0] / timebases[i][1]);
373 break;
374 case SR_CONF_TRIGGER_SOURCE:
375 tmp_str = g_variant_get_string(data, NULL);
376 if (!strcmp(tmp_str, "CH1"))
377 channel = "CHAN1";
378 else if (!strcmp(tmp_str, "CH2"))
379 channel = "CHAN2";
380 else if (!strcmp(tmp_str, "EXT"))
381 channel = "EXT";
382 else if (!strcmp(tmp_str, "AC Line"))
383 channel = "ACL";
384 else {
385 ret = SR_ERR_ARG;
386 break;
387 }
388 rigol_ds1xx2_send_data(devc->fd, ":TRIG:EDGE:SOUR %s\n", channel);
389 break;
390 case SR_CONF_VDIV:
391 g_variant_get(data, "(tt)", &p, &q);
392 tmp_int = -1;
393 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
394 if (vdivs[i][0] != p || vdivs[i][1] != q)
395 continue;
396 devc->scale = (float)vdivs[i][0] / vdivs[i][1];
397 rigol_ds1xx2_send_data(devc->fd, ":CHAN0:SCAL %.3f\n",
398 devc->scale);
399 rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL %.3f\n",
400 devc->scale);
401 break;
402 }
403 if (i == ARRAY_SIZE(vdivs))
404 ret = SR_ERR_ARG;
405 break;
406 case SR_CONF_COUPLING:
407 /* TODO: Not supporting coupling per channel yet. */
408 tmp_str = g_variant_get_string(data, NULL);
409 for (i = 0; i < ARRAY_SIZE(coupling); i++) {
410 if (!strcmp(tmp_str, coupling[i])) {
411 rigol_ds1xx2_send_data(devc->fd, ":CHAN0:COUP %s\n",
412 coupling[i]);
413 rigol_ds1xx2_send_data(devc->fd, ":CHAN1:COUP %s\n",
414 coupling[i]);
415 break;
416 }
417 }
418 if (i == ARRAY_SIZE(coupling))
419 ret = SR_ERR_ARG;
420 break;
421 default:
422 sr_err("Unknown hardware capability: %d.", id);
423 ret = SR_ERR_ARG;
424 break;
425 }
426
427 return ret;
428}
429
430static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
431{
432 GVariant *tuple, *rational[2];
433 GVariantBuilder gvb;
434 unsigned int i;
435
436 (void)sdi;
437
438 switch (key) {
439 case SR_CONF_DEVICE_OPTIONS:
440 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
441 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
442 break;
443 case SR_CONF_COUPLING:
444 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
445 break;
446 case SR_CONF_VDIV:
447 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
448 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
449 rational[0] = g_variant_new_uint64(vdivs[i][0]);
450 rational[1] = g_variant_new_uint64(vdivs[i][1]);
451 tuple = g_variant_new_tuple(rational, 2);
452 g_variant_builder_add_value(&gvb, tuple);
453 }
454 *data = g_variant_builder_end(&gvb);
455 break;
456 case SR_CONF_TIMEBASE:
457 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
458 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
459 rational[0] = g_variant_new_uint64(timebases[i][0]);
460 rational[1] = g_variant_new_uint64(timebases[i][1]);
461 tuple = g_variant_new_tuple(rational, 2);
462 g_variant_builder_add_value(&gvb, tuple);
463 }
464 *data = g_variant_builder_end(&gvb);
465 break;
466 case SR_CONF_TRIGGER_SOURCE:
467 *data = g_variant_new_strv(trigger_sources,
468 ARRAY_SIZE(trigger_sources));
469 break;
470 default:
471 return SR_ERR_ARG;
472 }
473
474 return SR_OK;
475}
476
477static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
478 void *cb_data)
479{
480 struct dev_context *devc;
481 char buf[256];
482 int len;
483
484 (void)cb_data;
485
486 devc = sdi->priv;
487
488 devc->num_frames = devc->num_frame_samples = 0;
489
490 sr_source_add(devc->fd, G_IO_IN, 50, rigol_ds1xx2_receive_data, (void *)sdi);
491
492 /* Send header packet to the session bus. */
493 std_session_send_df_header(cb_data, DRIVER_LOG_DOMAIN);
494
495 /* Hardcoded to CH1 only. */
496 devc->enabled_probes = g_slist_append(NULL, sdi->probes->data);
497 rigol_ds1xx2_send_data(devc->fd, ":CHAN1:SCAL?\n");
498 len = read(devc->fd, buf, sizeof(buf));
499 buf[len] = 0;
500 devc->scale = atof(buf);
501 sr_dbg("Scale is %.3f.", devc->scale);
502 rigol_ds1xx2_send_data(devc->fd, ":CHAN1:OFFS?\n");
503 len = read(devc->fd, buf, sizeof(buf));
504 buf[len] = 0;
505 devc->offset = atof(buf);
506 sr_dbg("Offset is %.6f.", devc->offset);
507 rigol_ds1xx2_send_data(devc->fd, ":WAV:DATA?\n");
508
509 return SR_OK;
510}
511
512static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
513{
514 struct dev_context *devc;
515
516 (void)cb_data;
517
518 devc = sdi->priv;
519
520 if (sdi->status != SR_ST_ACTIVE) {
521 sr_err("Device inactive, can't stop acquisition.");
522 return SR_ERR;
523 }
524
525 sr_source_remove(devc->fd);
526
527 return SR_OK;
528}
529
530SR_PRIV struct sr_dev_driver rigol_ds1xx2_driver_info = {
531 .name = "rigol-ds1xx2",
532 .longname = "Rigol DS1xx2",
533 .api_version = 1,
534 .init = hw_init,
535 .cleanup = hw_cleanup,
536 .scan = hw_scan,
537 .dev_list = hw_dev_list,
538 .dev_clear = clear_instances,
539 .config_get = config_get,
540 .config_set = config_set,
541 .config_list = config_list,
542 .dev_open = hw_dev_open,
543 .dev_close = hw_dev_close,
544 .dev_acquisition_start = hw_dev_acquisition_start,
545 .dev_acquisition_stop = hw_dev_acquisition_stop,
546 .priv = NULL,
547};