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appa-55ii: driver implementation with Live and Memory data source support
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <stdlib.h>
23#include <stdarg.h>
24#include <unistd.h>
25#include <errno.h>
26#include <string.h>
27#include <math.h>
28#include <ctype.h>
29#include <time.h>
30#include <glib.h>
31#include "libsigrok.h"
32#include "libsigrok-internal.h"
33#include "protocol.h"
34
35/*
36 * This is a unified protocol driver for the DS1000 and DS2000 series.
37 *
38 * DS1000 support tested with a Rigol DS1102D.
39 *
40 * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
41 *
42 * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
43 * standard. If you want to read it - it costs real money...
44 *
45 * Every response from the scope has a linefeed appended because the
46 * standard says so. In principle this could be ignored because sending the
47 * next command clears the output queue of the scope. This driver tries to
48 * avoid doing that because it may cause an error being generated inside the
49 * scope and who knows what bugs the firmware has WRT this.
50 *
51 * Waveform data is transferred in a format called "arbitrary block program
52 * data" specified in IEEE 488.2. See Agilents programming manuals for their
53 * 2000/3000 series scopes for a nice description.
54 *
55 * Each data block from the scope has a header, e.g. "#900000001400".
56 * The '#' marks the start of a block.
57 * Next is one ASCII decimal digit between 1 and 9, this gives the number of
58 * ASCII decimal digits following.
59 * Last are the ASCII decimal digits giving the number of bytes (not
60 * samples!) in the block.
61 *
62 * After this header as many data bytes as indicated follow.
63 *
64 * Each data block has a trailing linefeed too.
65 */
66
67static int get_cfg(const struct sr_dev_inst *sdi, char *cmd, char *reply, size_t maxlen);
68static int get_cfg_int(const struct sr_dev_inst *sdi, char *cmd, int *i);
69
70static int parse_int(const char *str, int *ret)
71{
72 char *e;
73 long tmp;
74
75 errno = 0;
76 tmp = strtol(str, &e, 10);
77 if (e == str || *e != '\0') {
78 sr_dbg("Failed to parse integer: '%s'", str);
79 return SR_ERR;
80 }
81 if (errno) {
82 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
83 return SR_ERR;
84 }
85 if (tmp > INT_MAX || tmp < INT_MIN) {
86 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
87 return SR_ERR;
88 }
89
90 *ret = (int)tmp;
91 return SR_OK;
92}
93
94/* Set the next event to wait for in rigol_ds_receive */
95static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
96{
97 if (event == WAIT_STOP)
98 devc->wait_status = 2;
99 else
100 devc->wait_status = 1;
101 devc->wait_event = event;
102}
103
104/*
105 * Waiting for a event will return a timeout after 2 to 3 seconds in order
106 * to not block the application.
107 */
108static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
109{
110 char buf[20];
111 struct dev_context *devc;
112 time_t start;
113
114 if (!(devc = sdi->priv))
115 return SR_ERR;
116
117 start = time(NULL);
118
119 /*
120 * Trigger status may return:
121 * "TD" or "T'D" - triggered
122 * "AUTO" - autotriggered
123 * "RUN" - running
124 * "WAIT" - waiting for trigger
125 * "STOP" - stopped
126 */
127
128 if (devc->wait_status == 1) {
129 do {
130 if (time(NULL) - start >= 3) {
131 sr_dbg("Timeout waiting for trigger");
132 return SR_ERR_TIMEOUT;
133 }
134
135 if (get_cfg(sdi, ":TRIG:STAT?", buf, sizeof(buf)) != SR_OK)
136 return SR_ERR;
137 } while (buf[0] == status1 || buf[0] == status2);
138
139 devc->wait_status = 2;
140 }
141 if (devc->wait_status == 2) {
142 do {
143 if (time(NULL) - start >= 3) {
144 sr_dbg("Timeout waiting for trigger");
145 return SR_ERR_TIMEOUT;
146 }
147
148 if (get_cfg(sdi, ":TRIG:STAT?", buf, sizeof(buf)) != SR_OK)
149 return SR_ERR;
150 } while (buf[0] != status1 && buf[0] != status2);
151
152 rigol_ds_set_wait_event(devc, WAIT_NONE);
153 }
154
155 return SR_OK;
156}
157
158/*
159 * For live capture we need to wait for a new trigger event to ensure that
160 * sample data is not returned twice.
161 *
162 * Unfortunately this will never really work because for sufficiently fast
163 * timebases and trigger rates it just can't catch the status changes.
164 *
165 * What would be needed is a trigger event register with autoreset like the
166 * Agilents have. The Rigols don't seem to have anything like this.
167 *
168 * The workaround is to only wait for the trigger when the timebase is slow
169 * enough. Of course this means that for faster timebases sample data can be
170 * returned multiple times, this effect is mitigated somewhat by sleeping
171 * for about one sweep time in that case.
172 */
173static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
174{
175 struct dev_context *devc;
176 long s;
177
178 if (!(devc = sdi->priv))
179 return SR_ERR;
180
181 /*
182 * If timebase < 50 msecs/DIV just sleep about one sweep time except
183 * for really fast sweeps.
184 */
185 if (devc->timebase < 0.0499)
186 {
187 if (devc->timebase > 0.99e-6) {
188 /*
189 * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
190 * -> 85 percent of sweep time
191 */
192 s = (devc->timebase * devc->model->num_horizontal_divs
193 * 85e6) / 100L;
194 sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
195 g_usleep(s);
196 }
197 rigol_ds_set_wait_event(devc, WAIT_NONE);
198 return SR_OK;
199 } else {
200 return rigol_ds_event_wait(sdi, 'T', 'A');
201 }
202}
203
204/* Wait for scope to got to "Stop" in single shot mode */
205static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
206{
207 return rigol_ds_event_wait(sdi, 'S', 'S');
208}
209
210/* Check that a single shot acquisition actually succeeded on the DS2000 */
211static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
212{
213 struct dev_context *devc;
214 int tmp;
215
216 if (!(devc = sdi->priv))
217 return SR_ERR;
218
219 if (sr_scpi_send(sdi->conn, ":WAV:SOUR CHAN%d",
220 devc->channel_frame->index + 1) != SR_OK)
221 return SR_ERR;
222 /* Check that the number of samples will be accepted */
223 if (sr_scpi_send(sdi->conn, ":WAV:POIN %d;*OPC", devc->analog_frame_size) != SR_OK)
224 return SR_ERR;
225 if (get_cfg_int(sdi, "*ESR?", &tmp) != SR_OK)
226 return SR_ERR;
227 /*
228 * If we get an "Execution error" the scope went from "Single" to
229 * "Stop" without actually triggering. There is no waveform
230 * displayed and trying to download one will fail - the scope thinks
231 * it has 1400 samples (like display memory) and the driver thinks
232 * it has a different number of samples.
233 *
234 * In that case just try to capture something again. Might still
235 * fail in interesting ways.
236 *
237 * Ain't firmware fun?
238 */
239 if (tmp & 0x10) {
240 sr_warn("Single shot acquisition failed, retrying...");
241 /* Sleep a bit, otherwise the single shot will often fail */
242 g_usleep(500000);
243 sr_scpi_send(sdi->conn, ":SING");
244 rigol_ds_set_wait_event(devc, WAIT_STOP);
245 return SR_ERR;
246 }
247
248 return SR_OK;
249}
250
251/* Wait for enough data becoming available in scope output buffer */
252static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
253{
254 char buf[30];
255 struct dev_context *devc;
256 time_t start;
257 int len;
258
259 if (!(devc = sdi->priv))
260 return SR_ERR;
261
262 start = time(NULL);
263
264 do {
265 if (time(NULL) - start >= 3) {
266 sr_dbg("Timeout waiting for data block");
267 return SR_ERR_TIMEOUT;
268 }
269
270 /*
271 * The scope copies data really slowly from sample
272 * memory to its output buffer, so try not to bother
273 * it too much with SCPI requests but don't wait too
274 * long for short sample frame sizes.
275 */
276 g_usleep(devc->analog_frame_size < 15000 ? 100000 : 1000000);
277
278 /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
279 if (get_cfg(sdi, ":WAV:STAT?", buf, sizeof(buf)) != SR_OK)
280 return SR_ERR;
281
282 if (parse_int(buf + 5, &len) != SR_OK)
283 return SR_ERR;
284 } while (buf[0] == 'R' && len < 1000000);
285
286 rigol_ds_set_wait_event(devc, WAIT_NONE);
287
288 return SR_OK;
289}
290
291/* Start capturing a new frameset */
292SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
293{
294 struct dev_context *devc;
295
296 if (!(devc = sdi->priv))
297 return SR_ERR;
298
299 sr_dbg("Starting data capture for frameset %lu of %lu",
300 devc->num_frames + 1, devc->limit_frames);
301
302 if (sr_scpi_send(sdi->conn, ":WAV:FORM BYTE") != SR_OK)
303 return SR_ERR;
304 if (devc->data_source == DATA_SOURCE_LIVE) {
305 if (sr_scpi_send(sdi->conn, ":WAV:MODE NORM") != SR_OK)
306 return SR_ERR;
307 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
308 } else {
309 if (sr_scpi_send(sdi->conn, ":WAV:MODE RAW") != SR_OK)
310 return SR_ERR;
311 if (sr_scpi_send(sdi->conn, ":SING", devc->analog_frame_size) != SR_OK)
312 return SR_ERR;
313 rigol_ds_set_wait_event(devc, WAIT_STOP);
314 }
315
316 return SR_OK;
317}
318
319/* Start reading data from the current channel */
320SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
321{
322 struct dev_context *devc;
323
324 if (!(devc = sdi->priv))
325 return SR_ERR;
326
327 sr_dbg("Starting reading data from channel %d",
328 devc->channel_frame->index + 1);
329
330 if (sr_scpi_send(sdi->conn, ":WAV:SOUR CHAN%d",
331 devc->channel_frame->index + 1) != SR_OK)
332 return SR_ERR;
333 if (devc->data_source != DATA_SOURCE_LIVE) {
334 if (sr_scpi_send(sdi->conn, ":WAV:RES") != SR_OK)
335 return SR_ERR;
336 if (sr_scpi_send(sdi->conn, ":WAV:BEG") != SR_OK)
337 return SR_ERR;
338 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
339 } else
340 rigol_ds_set_wait_event(devc, WAIT_NONE);
341
342 devc->num_frame_bytes = 0;
343 devc->num_block_bytes = 0;
344
345 return SR_OK;
346}
347
348/* Read the header of a data block */
349static int rigol_ds_read_header(struct sr_scpi_dev_inst *scpi)
350{
351 char start[3], length[10];
352 int len, tmp;
353
354 /* Read the hashsign and length digit. */
355 tmp = sr_scpi_read(scpi, start, 2);
356 start[2] = '\0';
357 if (tmp != 2)
358 {
359 sr_err("Failed to read first two bytes of data block header.");
360 return -1;
361 }
362 if (start[0] != '#' || !isdigit(start[1]) || start[1] == '0')
363 {
364 sr_err("Received invalid data block header start '%s'.", start);
365 return -1;
366 }
367 len = atoi(start + 1);
368
369 /* Read the data length. */
370 tmp = sr_scpi_read(scpi, length, len);
371 length[len] = '\0';
372 if (tmp != len)
373 {
374 sr_err("Failed to read %d bytes of data block length.", len);
375 return -1;
376 }
377 if (parse_int(length, &len) != SR_OK)
378 {
379 sr_err("Received invalid data block length '%s'.", length);
380 return -1;
381 }
382
383 sr_dbg("Received data block header: %s%s -> block length %d", start, length, len);
384
385 return len;
386}
387
388SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
389{
390 struct sr_dev_inst *sdi;
391 struct sr_scpi_dev_inst *scpi;
392 struct dev_context *devc;
393 struct sr_datafeed_packet packet;
394 struct sr_datafeed_analog analog;
395 struct sr_datafeed_logic logic;
396 double vdiv, offset;
397 int len, i, waveform_size, vref;
398 struct sr_probe *probe;
399
400 (void)fd;
401
402 if (!(sdi = cb_data))
403 return TRUE;
404
405 if (!(devc = sdi->priv))
406 return TRUE;
407
408 scpi = sdi->conn;
409
410 if (revents == G_IO_IN) {
411 if (devc->model->protocol == PROTOCOL_IEEE488_2) {
412 switch(devc->wait_event) {
413 case WAIT_NONE:
414 break;
415
416 case WAIT_TRIGGER:
417 if (rigol_ds_trigger_wait(sdi) != SR_OK)
418 return TRUE;
419 if (rigol_ds_channel_start(sdi) != SR_OK)
420 return TRUE;
421 break;
422
423 case WAIT_BLOCK:
424 if (rigol_ds_block_wait(sdi) != SR_OK)
425 return TRUE;
426 break;
427
428 case WAIT_STOP:
429 if (rigol_ds_stop_wait(sdi) != SR_OK)
430 return TRUE;
431 if (rigol_ds_check_stop(sdi) != SR_OK)
432 return TRUE;
433 if (rigol_ds_channel_start(sdi) != SR_OK)
434 return TRUE;
435 return TRUE;
436
437 default:
438 sr_err("BUG: Unknown event target encountered");
439 }
440
441 if (devc->num_block_bytes == 0) {
442 sr_dbg("New block header expected");
443 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
444 return TRUE;
445 len = rigol_ds_read_header(scpi);
446 if (len == -1)
447 return TRUE;
448 /* At slow timebases in live capture the DS2072
449 * sometimes returns "short" data blocks, with
450 * apparently no way to get the rest of the data.
451 * Discard these, the complete data block will
452 * appear eventually.
453 */
454 if (devc->data_source == DATA_SOURCE_LIVE
455 && (unsigned)len < devc->num_frame_bytes) {
456 sr_dbg("Discarding short data block");
457 sr_scpi_read(scpi, (char *)devc->buffer, len + 1);
458 return TRUE;
459 }
460 devc->num_block_bytes = len;
461 devc->num_block_read = 0;
462 }
463 }
464
465 probe = devc->channel_frame;
466 if (devc->model->protocol == PROTOCOL_IEEE488_2) {
467 len = devc->num_block_bytes - devc->num_block_read;
468 len = sr_scpi_read(scpi, (char *)devc->buffer,
469 len < ACQ_BUFFER_SIZE ? len : ACQ_BUFFER_SIZE);
470 } else {
471 waveform_size = probe->type == SR_PROBE_ANALOG ?
472 (devc->model->series == RIGOL_VS5000 ?
473 VS5000_ANALOG_LIVE_WAVEFORM_SIZE :
474 DS1000_ANALOG_LIVE_WAVEFORM_SIZE) :
475 DIGITAL_WAVEFORM_SIZE;
476 len = sr_scpi_read(scpi, (char *)devc->buffer,
477 waveform_size - devc->num_frame_bytes);
478 }
479 sr_dbg("Received %d bytes.", len);
480 if (len == -1)
481 return TRUE;
482
483 if (devc->num_frame_bytes == 0) {
484 /* Start of a new frame. */
485 packet.type = SR_DF_FRAME_BEGIN;
486 sr_session_send(sdi, &packet);
487 }
488
489 if (probe->type == SR_PROBE_ANALOG) {
490 if (devc->model->protocol == PROTOCOL_IEEE488_2)
491 devc->num_block_read += len;
492 vref = devc->vert_reference[probe->index];
493 vdiv = devc->vdiv[probe->index] / 25.6;
494 offset = devc->vert_offset[probe->index];
495 if (devc->model->protocol == PROTOCOL_IEEE488_2)
496 for (i = 0; i < len; i++)
497 devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
498 else
499 for (i = 0; i < len; i++)
500 devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
501 analog.probes = g_slist_append(NULL, probe);
502 analog.num_samples = len;
503 analog.data = devc->data;
504 analog.mq = SR_MQ_VOLTAGE;
505 analog.unit = SR_UNIT_VOLT;
506 analog.mqflags = 0;
507 packet.type = SR_DF_ANALOG;
508 packet.payload = &analog;
509 sr_session_send(cb_data, &packet);
510 g_slist_free(analog.probes);
511
512 if (devc->model->protocol == PROTOCOL_IEEE488_2) {
513 if (devc->num_block_read == devc->num_block_bytes) {
514 sr_dbg("Block has been completed");
515 /* Discard the terminating linefeed and prepare for
516 possible next block */
517 sr_scpi_read(scpi, (char *)devc->buffer, 1);
518 devc->num_block_bytes = 0;
519 if (devc->data_source != DATA_SOURCE_LIVE)
520 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
521 } else
522 sr_dbg("%d of %d block bytes read", devc->num_block_read, devc->num_block_bytes);
523 }
524
525 devc->num_frame_bytes += len;
526
527 if (devc->num_frame_bytes < devc->analog_frame_size)
528 /* Don't have the whole frame yet. */
529 return TRUE;
530
531 sr_dbg("Frame completed, %d samples", devc->num_frame_bytes);
532 } else {
533 logic.length = len - 10;
534 logic.unitsize = 2;
535 logic.data = devc->buffer + 10;
536 packet.type = SR_DF_LOGIC;
537 packet.payload = &logic;
538 sr_session_send(cb_data, &packet);
539
540 if (len != DIGITAL_WAVEFORM_SIZE)
541 /* Don't have the whole frame yet. */
542 return TRUE;
543 }
544
545 /* End of the frame. */
546 packet.type = SR_DF_FRAME_END;
547 sr_session_send(sdi, &packet);
548 if (devc->model->protocol == PROTOCOL_LEGACY)
549 devc->num_frame_bytes = 0;
550 else {
551 /* Signal end of data download to scope */
552 if (devc->data_source != DATA_SOURCE_LIVE)
553 /*
554 * This causes a query error, without it switching
555 * to the next channel causes an error. Fun with
556 * firmware...
557 */
558 sr_scpi_send(sdi->conn, ":WAV:END");
559 }
560
561 if (devc->enabled_analog_probes
562 && devc->channel_frame == devc->enabled_analog_probes->data
563 && devc->enabled_analog_probes->next != NULL) {
564 /* We got the frame for the first analog channel, but
565 * there's a second analog channel. */
566 devc->channel_frame = devc->enabled_analog_probes->next->data;
567 if (devc->model->protocol == PROTOCOL_IEEE488_2) {
568 rigol_ds_channel_start(sdi);
569 } else {
570 sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%c",
571 devc->channel_frame->name[2]);
572 }
573 } else {
574 /* Done with both analog channels in this frame. */
575 if (devc->enabled_digital_probes
576 && devc->channel_frame != devc->enabled_digital_probes->data) {
577 /* Now we need to get the digital data. */
578 devc->channel_frame = devc->enabled_digital_probes->data;
579 sr_scpi_send(sdi->conn, ":WAV:DATA? DIG");
580 } else if (++devc->num_frames == devc->limit_frames) {
581 /* End of last frame. */
582 packet.type = SR_DF_END;
583 sr_session_send(sdi, &packet);
584 sdi->driver->dev_acquisition_stop(sdi, cb_data);
585 } else {
586 /* Get the next frame, starting with the first analog channel. */
587 if (devc->model->protocol == PROTOCOL_IEEE488_2) {
588 if (devc->enabled_analog_probes) {
589 devc->channel_frame = devc->enabled_analog_probes->data;
590 rigol_ds_capture_start(sdi);
591 }
592 } else {
593 if (devc->enabled_analog_probes) {
594 devc->channel_frame = devc->enabled_analog_probes->data;
595 sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%c",
596 devc->channel_frame->name[2]);
597 } else {
598 devc->channel_frame = devc->enabled_digital_probes->data;
599 sr_scpi_send(sdi->conn, ":WAV:DATA? DIG");
600 }
601 }
602 }
603 }
604 }
605
606 return TRUE;
607}
608
609static int get_cfg(const struct sr_dev_inst *sdi, char *cmd, char *reply, size_t maxlen)
610{
611 int len;
612 struct dev_context *devc = sdi->priv;
613 struct sr_scpi_dev_inst *scpi = sdi->conn;
614 char *response;
615
616 if (sr_scpi_send(scpi, cmd) != SR_OK)
617 return SR_ERR;
618
619 if (sr_scpi_receive(scpi, &response) != SR_OK)
620 return SR_ERR;
621
622 g_strlcpy(reply, response, maxlen);
623 g_free(response);
624 len = strlen(reply);
625
626 if (devc->model->protocol == PROTOCOL_IEEE488_2) {
627 /* get rid of trailing linefeed */
628 if (len >= 1 && reply[len-1] == '\n')
629 reply[len-1] = '\0';
630 }
631
632 sr_spew("Received '%s'.", reply);
633
634 return SR_OK;
635}
636
637static int get_cfg_int(const struct sr_dev_inst *sdi, char *cmd, int *i)
638{
639 char buf[32];
640
641 if (get_cfg(sdi, cmd, buf, sizeof(buf)) != SR_OK)
642 return SR_ERR;
643
644 if (parse_int(buf, i) != SR_OK)
645 return SR_ERR;
646
647 return SR_OK;
648}
649
650static int get_cfg_float(const struct sr_dev_inst *sdi, char *cmd, float *f)
651{
652 char buf[32], *e;
653
654 if (get_cfg(sdi, cmd, buf, sizeof(buf)) != SR_OK)
655 return SR_ERR;
656 *f = strtof(buf, &e);
657 if (e == buf || (fpclassify(*f) & (FP_ZERO | FP_NORMAL)) == 0) {
658 sr_dbg("failed to parse response to '%s': '%s'", cmd, buf);
659 return SR_ERR;
660 }
661
662 return SR_OK;
663}
664
665static int get_cfg_string(const struct sr_dev_inst *sdi, char *cmd, char **buf)
666{
667 if (!(*buf = g_try_malloc0(256)))
668 return SR_ERR_MALLOC;
669
670 if (get_cfg(sdi, cmd, *buf, 256) != SR_OK)
671 return SR_ERR;
672
673 return SR_OK;
674}
675
676SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
677{
678 struct dev_context *devc;
679 char *t_s, *cmd;
680 int i, res;
681
682 devc = sdi->priv;
683
684 /* Analog channel state. */
685 if (get_cfg_string(sdi, ":CHAN1:DISP?", &t_s) != SR_OK)
686 return SR_ERR;
687 devc->analog_channels[0] = !strcmp(t_s, "ON") || !strcmp(t_s, "1");
688 g_free(t_s);
689 if (get_cfg_string(sdi, ":CHAN2:DISP?", &t_s) != SR_OK)
690 return SR_ERR;
691 devc->analog_channels[1] = !strcmp(t_s, "ON") || !strcmp(t_s, "1");
692 g_free(t_s);
693 sr_dbg("Current analog channel state CH1 %s CH2 %s",
694 devc->analog_channels[0] ? "on" : "off",
695 devc->analog_channels[1] ? "on" : "off");
696
697 /* Digital channel state. */
698 if (devc->model->has_digital) {
699 sr_dbg("Current digital channel state:");
700 for (i = 0; i < 16; i++) {
701 cmd = g_strdup_printf(":DIG%d:TURN?", i);
702 res = get_cfg_string(sdi, cmd, &t_s);
703 g_free(cmd);
704 if (res != SR_OK)
705 return SR_ERR;
706 devc->digital_channels[i] = !strcmp(t_s, "ON") ? TRUE : FALSE;
707 g_free(t_s);
708 sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
709 }
710 }
711
712 /* Timebase. */
713 if (get_cfg_float(sdi, ":TIM:SCAL?", &devc->timebase) != SR_OK)
714 return SR_ERR;
715 sr_dbg("Current timebase %g", devc->timebase);
716
717 /* Vertical gain. */
718 if (get_cfg_float(sdi, ":CHAN1:SCAL?", &devc->vdiv[0]) != SR_OK)
719 return SR_ERR;
720 if (get_cfg_float(sdi, ":CHAN2:SCAL?", &devc->vdiv[1]) != SR_OK)
721 return SR_ERR;
722 sr_dbg("Current vertical gain CH1 %g CH2 %g", devc->vdiv[0], devc->vdiv[1]);
723
724 if (devc->model->protocol == PROTOCOL_IEEE488_2) {
725 /* Vertical reference - not certain if this is the place to read it. */
726 if (sr_scpi_send(sdi->conn, ":WAV:SOUR CHAN1") != SR_OK)
727 return SR_ERR;
728 if (get_cfg_int(sdi, ":WAV:YREF?", &devc->vert_reference[0]) != SR_OK)
729 return SR_ERR;
730 if (sr_scpi_send(sdi->conn, ":WAV:SOUR CHAN2") != SR_OK)
731 return SR_ERR;
732 if (get_cfg_int(sdi, ":WAV:YREF?", &devc->vert_reference[1]) != SR_OK)
733 return SR_ERR;
734 sr_dbg("Current vertical reference CH1 %d CH2 %d",
735 devc->vert_reference[0], devc->vert_reference[1]);
736 }
737
738 /* Vertical offset. */
739 if (get_cfg_float(sdi, ":CHAN1:OFFS?", &devc->vert_offset[0]) != SR_OK)
740 return SR_ERR;
741 if (get_cfg_float(sdi, ":CHAN2:OFFS?", &devc->vert_offset[1]) != SR_OK)
742 return SR_ERR;
743 sr_dbg("Current vertical offset CH1 %g CH2 %g", devc->vert_offset[0],
744 devc->vert_offset[1]);
745
746 /* Coupling. */
747 if (get_cfg_string(sdi, ":CHAN1:COUP?", &devc->coupling[0]) != SR_OK)
748 return SR_ERR;
749 if (get_cfg_string(sdi, ":CHAN2:COUP?", &devc->coupling[1]) != SR_OK)
750 return SR_ERR;
751 sr_dbg("Current coupling CH1 %s CH2 %s", devc->coupling[0],
752 devc->coupling[1]);
753
754 /* Trigger source. */
755 if (get_cfg_string(sdi, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
756 return SR_ERR;
757 sr_dbg("Current trigger source %s", devc->trigger_source);
758
759 /* Horizontal trigger position. */
760 if (get_cfg_float(sdi, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
761 return SR_ERR;
762 sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
763
764 /* Trigger slope. */
765 if (get_cfg_string(sdi, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
766 return SR_ERR;
767 sr_dbg("Current trigger slope %s", devc->trigger_slope);
768
769 return SR_OK;
770}