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Remove SR_CONF_MAX_UNCOMPRESSED_SAMPLES again.
[libsigrok.git] / hardware / rigol-ds / api.c
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CommitLineData
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
26#include <glib.h>
27#include "libsigrok.h"
28#include "libsigrok-internal.h"
29#include "protocol.h"
30
31static const int32_t hwopts[] = {
32 SR_CONF_CONN,
33 SR_CONF_SERIALCOMM
34};
35
36static const int32_t hwcaps[] = {
37 SR_CONF_OSCILLOSCOPE,
38 SR_CONF_TIMEBASE,
39 SR_CONF_TRIGGER_SOURCE,
40 SR_CONF_TRIGGER_SLOPE,
41 SR_CONF_HORIZ_TRIGGERPOS,
42 SR_CONF_NUM_TIMEBASE,
43 SR_CONF_LIMIT_FRAMES,
44 SR_CONF_SAMPLERATE,
45};
46
47static const int32_t analog_hwcaps[] = {
48 SR_CONF_NUM_VDIV,
49 SR_CONF_VDIV,
50 SR_CONF_COUPLING,
51 SR_CONF_DATA_SOURCE,
52};
53
54static const uint64_t timebases[][2] = {
55 /* nanoseconds */
56 { 2, 1000000000 },
57 { 5, 1000000000 },
58 { 10, 1000000000 },
59 { 20, 1000000000 },
60 { 50, 1000000000 },
61 { 100, 1000000000 },
62 { 500, 1000000000 },
63 /* microseconds */
64 { 1, 1000000 },
65 { 2, 1000000 },
66 { 5, 1000000 },
67 { 10, 1000000 },
68 { 20, 1000000 },
69 { 50, 1000000 },
70 { 100, 1000000 },
71 { 200, 1000000 },
72 { 500, 1000000 },
73 /* milliseconds */
74 { 1, 1000 },
75 { 2, 1000 },
76 { 5, 1000 },
77 { 10, 1000 },
78 { 20, 1000 },
79 { 50, 1000 },
80 { 100, 1000 },
81 { 200, 1000 },
82 { 500, 1000 },
83 /* seconds */
84 { 1, 1 },
85 { 2, 1 },
86 { 5, 1 },
87 { 10, 1 },
88 { 20, 1 },
89 { 50, 1 },
90 { 100, 1 },
91 { 200, 1 },
92 { 500, 1 },
93 /* { 1000, 1 }, Confuses other code? */
94};
95
96static const uint64_t vdivs[][2] = {
97 /* microvolts */
98 { 500, 1000000 },
99 /* millivolts */
100 { 1, 1000 },
101 { 2, 1000 },
102 { 5, 1000 },
103 { 10, 1000 },
104 { 20, 1000 },
105 { 50, 1000 },
106 { 100, 1000 },
107 { 200, 1000 },
108 { 500, 1000 },
109 /* volts */
110 { 1, 1 },
111 { 2, 1 },
112 { 5, 1 },
113 { 10, 1 },
114};
115
116#define NUM_TIMEBASE ARRAY_SIZE(timebases)
117#define NUM_VDIV ARRAY_SIZE(vdivs)
118
119static const char *trigger_sources[] = {
120 "CH1",
121 "CH2",
122 "CH3",
123 "CH4",
124 "EXT",
125 "AC Line",
126 "D0",
127 "D1",
128 "D2",
129 "D3",
130 "D4",
131 "D5",
132 "D6",
133 "D7",
134 "D8",
135 "D9",
136 "D10",
137 "D11",
138 "D12",
139 "D13",
140 "D14",
141 "D15",
142};
143
144static const char *coupling[] = {
145 "AC",
146 "DC",
147 "GND",
148};
149
150/* Do not change the order of entries */
151static const char *data_sources[] = {
152 "Live",
153 "Memory",
154 "Segmented",
155};
156
157/*
158 * name, series, protocol flavor, min timebase, max timebase, min vdiv,
159 * digital channels, number of horizontal divs
160 */
161
162#define RIGOL "Rigol Technologies"
163#define AGILENT "Agilent Technologies"
164
165static const struct rigol_ds_model supported_models[] = {
166 {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
167 {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
168 {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
169 {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
170 {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
171 {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
172 {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
173 {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
174 {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
175 {RIGOL, "DS2302", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
176 {RIGOL, "DS2072A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
177 {RIGOL, "DS2102A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
178 {RIGOL, "DS2202A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
179 {RIGOL, "DS2302A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
180 {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
181 {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
182 {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
183 {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
184 {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
185 {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
186 {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
187 {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
188 {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
189 {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
190 {AGILENT, "DSO1002A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
191 {AGILENT, "DSO1004A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
192 {AGILENT, "DSO1012A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
193 {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
194 {AGILENT, "DSO1022A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
195 {AGILENT, "DSO1024A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
196};
197
198SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
199static struct sr_dev_driver *di = &rigol_ds_driver_info;
200
201static void clear_helper(void *priv)
202{
203 struct dev_context *devc;
204
205 devc = priv;
206 g_free(devc->data);
207 g_free(devc->buffer);
208 g_free(devc->coupling[0]);
209 g_free(devc->coupling[1]);
210 g_free(devc->trigger_source);
211 g_free(devc->trigger_slope);
212 g_slist_free(devc->analog_groups[0].probes);
213 g_slist_free(devc->analog_groups[1].probes);
214 g_slist_free(devc->digital_group.probes);
215}
216
217static int dev_clear(void)
218{
219 return std_dev_clear(di, clear_helper);
220}
221
222static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...)
223{
224 va_list args;
225 int ret;
226
227 va_start(args, format);
228 ret = sr_scpi_send_variadic(sdi->conn, format, args);
229 va_end(args);
230
231 if (ret != SR_OK)
232 return SR_ERR;
233
234 /* When setting a bunch of parameters in a row, the DS1052E scrambles
235 * some of them unless there is at least 100ms delay in between. */
236 sr_spew("delay %dms", 100);
237 g_usleep(100000);
238
239 return SR_OK;
240}
241
242static int init(struct sr_context *sr_ctx)
243{
244 return std_init(sr_ctx, di, LOG_PREFIX);
245}
246
247static int probe_port(const char *resource, const char *serialcomm, GSList **devices)
248{
249 struct dev_context *devc;
250 struct sr_dev_inst *sdi;
251 struct sr_scpi_dev_inst *scpi;
252 struct sr_scpi_hw_info *hw_info;
253 struct sr_probe *probe;
254 unsigned int i;
255 const struct rigol_ds_model *model = NULL;
256 gchar *channel_name;
257
258 *devices = NULL;
259
260 if (!(scpi = scpi_dev_inst_new(resource, serialcomm)))
261 return SR_ERR;
262
263 if (sr_scpi_open(scpi) != SR_OK) {
264 sr_info("Couldn't open SCPI device.");
265 sr_scpi_free(scpi);
266 return SR_ERR;
267 };
268
269 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
270 sr_info("Couldn't get IDN response.");
271 sr_scpi_close(scpi);
272 sr_scpi_free(scpi);
273 return SR_ERR;
274 }
275
276 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
277 if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) &&
278 !strcmp(hw_info->model, supported_models[i].name)) {
279 model = &supported_models[i];
280 break;
281 }
282 }
283
284 if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
285 hw_info->manufacturer, hw_info->model,
286 hw_info->firmware_version))) {
287 sr_scpi_hw_info_free(hw_info);
288 sr_scpi_close(scpi);
289 sr_scpi_free(scpi);
290 return SR_ERR_NA;
291 }
292
293 sr_scpi_hw_info_free(hw_info);
294 sr_scpi_close(scpi);
295
296 sdi->conn = scpi;
297
298 sdi->driver = di;
299 sdi->inst_type = SR_INST_SCPI;
300
301 if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
302 return SR_ERR_MALLOC;
303
304 devc->limit_frames = 0;
305 devc->model = model;
306
307 for (i = 0; i < model->analog_channels; i++) {
308 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
309 return SR_ERR_MALLOC;
310 probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name);
311 sdi->probes = g_slist_append(sdi->probes, probe);
312 devc->analog_groups[i].name = channel_name;
313 devc->analog_groups[i].probes = g_slist_append(NULL, probe);
314 sdi->probe_groups = g_slist_append(sdi->probe_groups,
315 &devc->analog_groups[i]);
316 }
317
318 if (devc->model->has_digital) {
319 for (i = 0; i < 16; i++) {
320 if (!(channel_name = g_strdup_printf("D%d", i)))
321 return SR_ERR_MALLOC;
322 probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE, channel_name);
323 g_free(channel_name);
324 if (!probe)
325 return SR_ERR_MALLOC;
326 sdi->probes = g_slist_append(sdi->probes, probe);
327 devc->digital_group.probes = g_slist_append(
328 devc->digital_group.probes, probe);
329 }
330 devc->digital_group.name = "LA";
331 sdi->probe_groups = g_slist_append(sdi->probe_groups,
332 &devc->digital_group);
333 }
334
335 for (i = 0; i < NUM_TIMEBASE; i++) {
336 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
337 devc->timebases = &timebases[i];
338 if (!memcmp(&devc->model->max_timebase, &timebases[i], sizeof(uint64_t[2])))
339 devc->num_timebases = &timebases[i] - devc->timebases + 1;
340 }
341
342 for (i = 0; i < NUM_VDIV; i++)
343 if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
344 devc->vdivs = &vdivs[i];
345
346 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
347 return SR_ERR_MALLOC;
348 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
349 return SR_ERR_MALLOC;
350
351 devc->data_source = DATA_SOURCE_LIVE;
352
353 sdi->priv = devc;
354
355 *devices = g_slist_append(NULL, sdi);
356
357 return SR_OK;
358}
359
360static GSList *scan(GSList *options)
361{
362 struct drv_context *drvc;
363 struct sr_config *src;
364 GSList *l, *devices;
365 GDir *dir;
366 int ret;
367 const gchar *dev_name;
368 gchar *port = NULL;
369 gchar *serialcomm = NULL;
370
371 drvc = di->priv;
372
373 for (l = options; l; l = l->next) {
374 src = l->data;
375 switch (src->key) {
376 case SR_CONF_CONN:
377 port = (char *)g_variant_get_string(src->data, NULL);
378 break;
379 case SR_CONF_SERIALCOMM:
380 serialcomm = (char *)g_variant_get_string(src->data, NULL);
381 break;
382 }
383 }
384
385 devices = NULL;
386 if (port) {
387 if (probe_port(port, serialcomm, &devices) == SR_ERR_MALLOC) {
388 g_free(port);
389 if (serialcomm)
390 g_free(serialcomm);
391 return NULL;
392 }
393 } else {
394 if (!(dir = g_dir_open("/sys/class/usbmisc/", 0, NULL)))
395 if (!(dir = g_dir_open("/sys/class/usb/", 0, NULL)))
396 return NULL;
397 while ((dev_name = g_dir_read_name(dir))) {
398 if (strncmp(dev_name, "usbtmc", 6))
399 continue;
400 port = g_strconcat("/dev/", dev_name, NULL);
401 ret = probe_port(port, serialcomm, &devices);
402 g_free(port);
403 if (serialcomm)
404 g_free(serialcomm);
405 if (ret == SR_ERR_MALLOC) {
406 g_dir_close(dir);
407 return NULL;
408 }
409 }
410 g_dir_close(dir);
411 }
412
413 /* Tack a copy of the newly found devices onto the driver list. */
414 l = g_slist_copy(devices);
415 drvc->instances = g_slist_concat(drvc->instances, l);
416
417 return devices;
418}
419
420static GSList *dev_list(void)
421{
422 return ((struct drv_context *)(di->priv))->instances;
423}
424
425static int dev_open(struct sr_dev_inst *sdi)
426{
427 struct sr_scpi_dev_inst *scpi = sdi->conn;
428
429 if (sr_scpi_open(scpi) < 0)
430 return SR_ERR;
431
432 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
433 return SR_ERR;
434
435 sdi->status = SR_ST_ACTIVE;
436
437 return SR_OK;
438}
439
440static int dev_close(struct sr_dev_inst *sdi)
441{
442 struct sr_scpi_dev_inst *scpi;
443
444 scpi = sdi->conn;
445
446 if (scpi) {
447 if (sr_scpi_close(scpi) < 0)
448 return SR_ERR;
449 sdi->status = SR_ST_INACTIVE;
450 }
451
452 return SR_OK;
453}
454
455static int cleanup(void)
456{
457 return dev_clear();
458}
459
460static int analog_frame_size(const struct sr_dev_inst *sdi)
461{
462 struct dev_context *devc = sdi->priv;
463 struct sr_probe *probe;
464 int analog_probes = 0;
465 GSList *l;
466
467 if (devc->model->protocol == PROTOCOL_LEGACY) {
468 if (devc->model->series == RIGOL_VS5000)
469 return VS5000_ANALOG_LIVE_WAVEFORM_SIZE;
470 else
471 return DS1000_ANALOG_LIVE_WAVEFORM_SIZE;
472 } else {
473 for (l = sdi->probes; l; l = l->next) {
474 probe = l->data;
475 if (probe->type == SR_PROBE_ANALOG && probe->enabled)
476 analog_probes++;
477 }
478 if (devc->data_source == DATA_SOURCE_MEMORY) {
479 if (analog_probes == 1)
480 return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C;
481 else
482 return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C;
483 } else {
484 if (devc->model->series == AGILENT_DSO1000)
485 return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE;
486 else
487 return DS2000_ANALOG_LIVE_WAVEFORM_SIZE;
488 }
489 }
490}
491
492static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
493 const struct sr_probe_group *probe_group)
494{
495 struct dev_context *devc;
496 uint64_t samplerate;
497
498 if (!sdi || !(devc = sdi->priv))
499 return SR_ERR_ARG;
500
501 /* If a probe group is specified, it must be a valid one. */
502 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
503 sr_err("Invalid probe group specified.");
504 return SR_ERR;
505 }
506
507 switch (id) {
508 case SR_CONF_NUM_TIMEBASE:
509 *data = g_variant_new_int32(devc->model->num_horizontal_divs);
510 break;
511 case SR_CONF_NUM_VDIV:
512 *data = g_variant_new_int32(8);
513 case SR_CONF_DATA_SOURCE:
514 if (devc->data_source == DATA_SOURCE_LIVE)
515 *data = g_variant_new_string("Live");
516 else if (devc->data_source == DATA_SOURCE_MEMORY)
517 *data = g_variant_new_string("Memory");
518 else
519 *data = g_variant_new_string("Segmented");
520 break;
521 case SR_CONF_SAMPLERATE:
522 if (devc->data_source == DATA_SOURCE_LIVE) {
523 samplerate = analog_frame_size(sdi) /
524 (devc->timebase * devc->model->num_horizontal_divs);
525 *data = g_variant_new_uint64(samplerate);
526 } else {
527 return SR_ERR_NA;
528 }
529 break;
530 default:
531 return SR_ERR_NA;
532 }
533
534 return SR_OK;
535}
536
537static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
538 const struct sr_probe_group *probe_group)
539{
540 struct dev_context *devc;
541 uint64_t tmp_u64, p, q;
542 double t_dbl;
543 unsigned int i, j;
544 int ret;
545 const char *tmp_str;
546
547 if (!(devc = sdi->priv))
548 return SR_ERR_ARG;
549
550 if (sdi->status != SR_ST_ACTIVE)
551 return SR_ERR_DEV_CLOSED;
552
553 /* If a probe group is specified, it must be a valid one. */
554 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
555 sr_err("Invalid probe group specified.");
556 return SR_ERR;
557 }
558
559 ret = SR_OK;
560 switch (id) {
561 case SR_CONF_LIMIT_FRAMES:
562 devc->limit_frames = g_variant_get_uint64(data);
563 break;
564 case SR_CONF_TRIGGER_SLOPE:
565 tmp_u64 = g_variant_get_uint64(data);
566 if (tmp_u64 != 0 && tmp_u64 != 1)
567 return SR_ERR;
568 g_free(devc->trigger_slope);
569 devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
570 ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
571 break;
572 case SR_CONF_HORIZ_TRIGGERPOS:
573 t_dbl = g_variant_get_double(data);
574 if (t_dbl < 0.0 || t_dbl > 1.0)
575 return SR_ERR;
576 devc->horiz_triggerpos = t_dbl;
577 /* We have the trigger offset as a percentage of the frame, but
578 * need to express this in seconds. */
579 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
580 ret = set_cfg(sdi, ":TIM:OFFS %.6f", t_dbl);
581 break;
582 case SR_CONF_TIMEBASE:
583 g_variant_get(data, "(tt)", &p, &q);
584 for (i = 0; i < devc->num_timebases; i++) {
585 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
586 devc->timebase = (float)p / q;
587 ret = set_cfg(sdi, ":TIM:SCAL %.9f", devc->timebase);
588 break;
589 }
590 }
591 if (i == devc->num_timebases)
592 ret = SR_ERR_ARG;
593 break;
594 case SR_CONF_TRIGGER_SOURCE:
595 tmp_str = g_variant_get_string(data, NULL);
596 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
597 if (!strcmp(trigger_sources[i], tmp_str)) {
598 g_free(devc->trigger_source);
599 devc->trigger_source = g_strdup(trigger_sources[i]);
600 if (!strcmp(devc->trigger_source, "AC Line"))
601 tmp_str = "ACL";
602 else if (!strcmp(devc->trigger_source, "CH1"))
603 tmp_str = "CHAN1";
604 else if (!strcmp(devc->trigger_source, "CH2"))
605 tmp_str = "CHAN2";
606 else if (!strcmp(devc->trigger_source, "CH3"))
607 tmp_str = "CHAN3";
608 else if (!strcmp(devc->trigger_source, "CH4"))
609 tmp_str = "CHAN4";
610 else
611 tmp_str = (char *)devc->trigger_source;
612 ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
613 break;
614 }
615 }
616 if (i == ARRAY_SIZE(trigger_sources))
617 ret = SR_ERR_ARG;
618 break;
619 case SR_CONF_VDIV:
620 if (!probe_group) {
621 sr_err("No probe group specified.");
622 return SR_ERR_PROBE_GROUP;
623 }
624 g_variant_get(data, "(tt)", &p, &q);
625 for (i = 0; i < 2; i++) {
626 if (probe_group == &devc->analog_groups[i]) {
627 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
628 if (vdivs[j][0] != p || vdivs[j][1] != q)
629 continue;
630 devc->vdiv[i] = (float)p / q;
631 return set_cfg(sdi, ":CHAN%d:SCAL %.3f", i + 1,
632 devc->vdiv[i]);
633 }
634 return SR_ERR_ARG;
635 }
636 }
637 return SR_ERR_NA;
638 case SR_CONF_COUPLING:
639 if (!probe_group) {
640 sr_err("No probe group specified.");
641 return SR_ERR_PROBE_GROUP;
642 }
643 tmp_str = g_variant_get_string(data, NULL);
644 for (i = 0; i < 2; i++) {
645 if (probe_group == &devc->analog_groups[i]) {
646 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
647 if (!strcmp(tmp_str, coupling[j])) {
648 g_free(devc->coupling[i]);
649 devc->coupling[i] = g_strdup(coupling[j]);
650 return set_cfg(sdi, ":CHAN%d:COUP %s", i + 1,
651 devc->coupling[i]);
652 }
653 }
654 return SR_ERR_ARG;
655 }
656 }
657 return SR_ERR_NA;
658 case SR_CONF_DATA_SOURCE:
659 tmp_str = g_variant_get_string(data, NULL);
660 if (!strcmp(tmp_str, "Live"))
661 devc->data_source = DATA_SOURCE_LIVE;
662 else if (!strcmp(tmp_str, "Memory"))
663 devc->data_source = DATA_SOURCE_MEMORY;
664 else if (devc->model->protocol == PROTOCOL_IEEE488_2
665 && !strcmp(tmp_str, "Segmented"))
666 devc->data_source = DATA_SOURCE_SEGMENTED;
667 else
668 return SR_ERR;
669 break;
670 default:
671 ret = SR_ERR_NA;
672 break;
673 }
674
675 return ret;
676}
677
678static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
679 const struct sr_probe_group *probe_group)
680{
681 GVariant *tuple, *rational[2];
682 GVariantBuilder gvb;
683 unsigned int i;
684 struct dev_context *devc = NULL;
685
686 if (sdi)
687 devc = sdi->priv;
688
689 if (key == SR_CONF_SCAN_OPTIONS) {
690 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
691 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
692 return SR_OK;
693 } else if (key == SR_CONF_DEVICE_OPTIONS && probe_group == NULL) {
694 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
695 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
696 return SR_OK;
697 }
698
699 /* Every other option requires a valid device instance. */
700 if (!sdi || !(devc = sdi->priv))
701 return SR_ERR_ARG;
702
703 /* If a probe group is specified, it must be a valid one. */
704 if (probe_group) {
705 if (probe_group != &devc->analog_groups[0]
706 && probe_group != &devc->analog_groups[1]) {
707 sr_err("Invalid probe group specified.");
708 return SR_ERR;
709 }
710 }
711
712 switch (key) {
713 case SR_CONF_DEVICE_OPTIONS:
714 if (!probe_group) {
715 sr_err("No probe group specified.");
716 return SR_ERR_PROBE_GROUP;
717 }
718 if (probe_group == &devc->digital_group) {
719 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
720 NULL, 0, sizeof(int32_t));
721 return SR_OK;
722 } else {
723 for (i = 0; i < 2; i++) {
724 if (probe_group == &devc->analog_groups[i]) {
725 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
726 analog_hwcaps, ARRAY_SIZE(analog_hwcaps), sizeof(int32_t));
727 return SR_OK;
728 }
729 }
730 return SR_ERR_NA;
731 }
732 break;
733 case SR_CONF_COUPLING:
734 if (!probe_group) {
735 sr_err("No probe group specified.");
736 return SR_ERR_PROBE_GROUP;
737 }
738 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
739 break;
740 case SR_CONF_VDIV:
741 if (!devc)
742 /* Can't know this until we have the exact model. */
743 return SR_ERR_ARG;
744 if (!probe_group) {
745 sr_err("No probe group specified.");
746 return SR_ERR_PROBE_GROUP;
747 }
748 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
749 for (i = 0; i < NUM_VDIV; i++) {
750 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
751 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
752 tuple = g_variant_new_tuple(rational, 2);
753 g_variant_builder_add_value(&gvb, tuple);
754 }
755 *data = g_variant_builder_end(&gvb);
756 break;
757 case SR_CONF_TIMEBASE:
758 if (!devc)
759 /* Can't know this until we have the exact model. */
760 return SR_ERR_ARG;
761 if (devc->num_timebases <= 0)
762 return SR_ERR_NA;
763 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
764 for (i = 0; i < devc->num_timebases; i++) {
765 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
766 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
767 tuple = g_variant_new_tuple(rational, 2);
768 g_variant_builder_add_value(&gvb, tuple);
769 }
770 *data = g_variant_builder_end(&gvb);
771 break;
772 case SR_CONF_TRIGGER_SOURCE:
773 if (!devc)
774 /* Can't know this until we have the exact model. */
775 return SR_ERR_ARG;
776 *data = g_variant_new_strv(trigger_sources,
777 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
778 break;
779 case SR_CONF_DATA_SOURCE:
780 if (!devc)
781 /* Can't know this until we have the exact model. */
782 return SR_ERR_ARG;
783 /* This needs tweaking by series/model! */
784 if (devc->model->series == RIGOL_DS2000)
785 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
786 else
787 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
788 break;
789 default:
790 return SR_ERR_NA;
791 }
792
793 return SR_OK;
794}
795
796static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
797{
798 struct sr_scpi_dev_inst *scpi;
799 struct dev_context *devc;
800 struct sr_probe *probe;
801 GSList *l;
802
803 if (sdi->status != SR_ST_ACTIVE)
804 return SR_ERR_DEV_CLOSED;
805
806 scpi = sdi->conn;
807 devc = sdi->priv;
808
809 devc->num_frames = 0;
810
811 for (l = sdi->probes; l; l = l->next) {
812 probe = l->data;
813 sr_dbg("handling probe %s", probe->name);
814 if (probe->type == SR_PROBE_ANALOG) {
815 if (probe->enabled)
816 devc->enabled_analog_probes = g_slist_append(
817 devc->enabled_analog_probes, probe);
818 if (probe->enabled != devc->analog_channels[probe->index]) {
819 /* Enabled channel is currently disabled, or vice versa. */
820 if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1,
821 probe->enabled ? "ON" : "OFF") != SR_OK)
822 return SR_ERR;
823 }
824 } else if (probe->type == SR_PROBE_LOGIC) {
825 if (probe->enabled) {
826 devc->enabled_digital_probes = g_slist_append(
827 devc->enabled_digital_probes, probe);
828 /* Turn on LA module if currently off. */
829 if (!devc->la_enabled) {
830 if (set_cfg(sdi, ":LA:DISP ON") != SR_OK)
831 return SR_ERR;
832 devc->la_enabled = TRUE;
833 }
834 }
835 if (probe->enabled != devc->digital_channels[probe->index]) {
836 /* Enabled channel is currently disabled, or vice versa. */
837 if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index,
838 probe->enabled ? "ON" : "OFF") != SR_OK)
839 return SR_ERR;
840 }
841 }
842 }
843
844 if (!devc->enabled_analog_probes && !devc->enabled_digital_probes)
845 return SR_ERR;
846
847 /* Turn off LA module if on and no digital probes selected. */
848 if (devc->la_enabled && !devc->enabled_digital_probes)
849 if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK)
850 return SR_ERR;
851
852 if (devc->data_source == DATA_SOURCE_LIVE) {
853 if (set_cfg(sdi, ":RUN") != SR_OK)
854 return SR_ERR;
855 } else if (devc->data_source == DATA_SOURCE_MEMORY) {
856 if (devc->model->series != RIGOL_DS2000) {
857 sr_err("Data source 'Memory' not supported for this device");
858 return SR_ERR;
859 }
860 } else if (devc->data_source == DATA_SOURCE_SEGMENTED) {
861 sr_err("Data source 'Segmented' not yet supported");
862 return SR_ERR;
863 }
864
865 sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi);
866
867 /* Send header packet to the session bus. */
868 std_session_send_df_header(cb_data, LOG_PREFIX);
869
870 if (devc->enabled_analog_probes)
871 devc->channel_entry = devc->enabled_analog_probes;
872 else
873 devc->channel_entry = devc->enabled_digital_probes;
874
875 devc->analog_frame_size = analog_frame_size(sdi);
876
877 if (devc->model->protocol == PROTOCOL_LEGACY) {
878 /* Fetch the first frame. */
879 if (rigol_ds_channel_start(sdi) != SR_OK)
880 return SR_ERR;
881 } else {
882 if (devc->enabled_analog_probes) {
883 if (devc->data_source == DATA_SOURCE_MEMORY) {
884 /* Apparently for the DS2000 the memory
885 * depth can only be set in Running state -
886 * this matches the behaviour of the UI. */
887 if (set_cfg(sdi, ":RUN") != SR_OK)
888 return SR_ERR;
889 if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
890 return SR_ERR;
891 if (set_cfg(sdi, ":STOP") != SR_OK)
892 return SR_ERR;
893 }
894 if (rigol_ds_capture_start(sdi) != SR_OK)
895 return SR_ERR;
896 }
897 }
898
899 return SR_OK;
900}
901
902static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
903{
904 struct dev_context *devc;
905 struct sr_scpi_dev_inst *scpi;
906 struct sr_datafeed_packet packet;
907
908 (void)cb_data;
909
910 devc = sdi->priv;
911
912 if (sdi->status != SR_ST_ACTIVE) {
913 sr_err("Device inactive, can't stop acquisition.");
914 return SR_ERR;
915 }
916
917 /* End of last frame. */
918 packet.type = SR_DF_END;
919 sr_session_send(sdi, &packet);
920
921 g_slist_free(devc->enabled_analog_probes);
922 g_slist_free(devc->enabled_digital_probes);
923 devc->enabled_analog_probes = NULL;
924 devc->enabled_digital_probes = NULL;
925 scpi = sdi->conn;
926 sr_scpi_source_remove(scpi);
927
928 return SR_OK;
929}
930
931SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
932 .name = "rigol-ds",
933 .longname = "Rigol DS",
934 .api_version = 1,
935 .init = init,
936 .cleanup = cleanup,
937 .scan = scan,
938 .dev_list = dev_list,
939 .dev_clear = dev_clear,
940 .config_get = config_get,
941 .config_set = config_set,
942 .config_list = config_list,
943 .dev_open = dev_open,
944 .dev_close = dev_close,
945 .dev_acquisition_start = dev_acquisition_start,
946 .dev_acquisition_stop = dev_acquisition_stop,
947 .priv = NULL,
948};
Hardware access and backend lib