]> sigrok.org Git - libsigrok.git/blame_incremental - hardware/rigol-ds/api.c
rigol-ds: On DS1000 with firmware < 0.2.4, use legacy protocol.
[libsigrok.git] / hardware / rigol-ds / api.c
... / ...
CommitLineData
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
26#include <math.h>
27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
32static const int32_t hwopts[] = {
33 SR_CONF_CONN,
34 SR_CONF_SERIALCOMM
35};
36
37static const int32_t hwcaps[] = {
38 SR_CONF_OSCILLOSCOPE,
39 SR_CONF_TIMEBASE,
40 SR_CONF_TRIGGER_SOURCE,
41 SR_CONF_TRIGGER_SLOPE,
42 SR_CONF_HORIZ_TRIGGERPOS,
43 SR_CONF_NUM_TIMEBASE,
44 SR_CONF_LIMIT_FRAMES,
45 SR_CONF_SAMPLERATE,
46};
47
48static const int32_t analog_hwcaps[] = {
49 SR_CONF_NUM_VDIV,
50 SR_CONF_VDIV,
51 SR_CONF_COUPLING,
52 SR_CONF_DATA_SOURCE,
53};
54
55static const uint64_t timebases[][2] = {
56 /* nanoseconds */
57 { 1, 1000000000 },
58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
95 { 1000, 1 },
96};
97
98static const uint64_t vdivs[][2] = {
99 /* microvolts */
100 { 500, 1000000 },
101 /* millivolts */
102 { 1, 1000 },
103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
116};
117
118#define NUM_TIMEBASE ARRAY_SIZE(timebases)
119#define NUM_VDIV ARRAY_SIZE(vdivs)
120
121static const char *trigger_sources[] = {
122 "CH1",
123 "CH2",
124 "CH3",
125 "CH4",
126 "EXT",
127 "AC Line",
128 "D0",
129 "D1",
130 "D2",
131 "D3",
132 "D4",
133 "D5",
134 "D6",
135 "D7",
136 "D8",
137 "D9",
138 "D10",
139 "D11",
140 "D12",
141 "D13",
142 "D14",
143 "D15",
144};
145
146static const char *coupling[] = {
147 "AC",
148 "DC",
149 "GND",
150};
151
152/* Do not change the order of entries */
153static const char *data_sources[] = {
154 "Live",
155 "Memory",
156 "Segmented",
157};
158
159/*
160 * name, series, protocol flavor, min timebase, max timebase, min vdiv,
161 * digital channels, number of horizontal divs
162 */
163
164#define RIGOL "Rigol Technologies"
165#define AGILENT "Agilent Technologies"
166#define RIGOL_SHORT "Rigol"
167#define AGILENT_SHORT "Agilent"
168
169static const struct rigol_ds_model supported_models[] = {
170 {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
171 {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
172 {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
173 {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
174 {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
175 {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
176 {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
177 {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
178 {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
179 {RIGOL, "DS2302", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
180 {RIGOL, "DS2072A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
181 {RIGOL, "DS2102A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
182 {RIGOL, "DS2202A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
183 {RIGOL, "DS2302A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
184 {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
185 {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
186 {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
187 {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
188 {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
189 {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
190 {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
191 {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
192 {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
193 {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
194 {AGILENT, "DSO1002A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
195 {AGILENT, "DSO1004A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
196 {AGILENT, "DSO1012A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
197 {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
198 {AGILENT, "DSO1022A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
199 {AGILENT, "DSO1024A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
200};
201
202SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
203static struct sr_dev_driver *di = &rigol_ds_driver_info;
204
205static void clear_helper(void *priv)
206{
207 struct dev_context *devc;
208
209 devc = priv;
210 g_free(devc->data);
211 g_free(devc->buffer);
212 g_free(devc->coupling[0]);
213 g_free(devc->coupling[1]);
214 g_free(devc->trigger_source);
215 g_free(devc->trigger_slope);
216 g_slist_free(devc->analog_groups[0].probes);
217 g_slist_free(devc->analog_groups[1].probes);
218 g_slist_free(devc->digital_group.probes);
219}
220
221static int dev_clear(void)
222{
223 return std_dev_clear(di, clear_helper);
224}
225
226static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...)
227{
228 va_list args;
229 int ret;
230
231 va_start(args, format);
232 ret = sr_scpi_send_variadic(sdi->conn, format, args);
233 va_end(args);
234
235 if (ret != SR_OK)
236 return SR_ERR;
237
238 return sr_scpi_get_opc(sdi->conn);
239}
240
241static int init(struct sr_context *sr_ctx)
242{
243 return std_init(sr_ctx, di, LOG_PREFIX);
244}
245
246static int probe_port(const char *resource, const char *serialcomm, GSList **devices)
247{
248 struct dev_context *devc;
249 struct sr_dev_inst *sdi;
250 struct sr_scpi_dev_inst *scpi;
251 struct sr_scpi_hw_info *hw_info;
252 struct sr_probe *probe;
253 long n[3];
254 unsigned int i;
255 const struct rigol_ds_model *model = NULL;
256 gchar *channel_name, *vendor, **version;
257
258 *devices = NULL;
259
260 if (!(scpi = scpi_dev_inst_new(resource, serialcomm)))
261 return SR_ERR;
262
263 if (sr_scpi_open(scpi) != SR_OK) {
264 sr_info("Couldn't open SCPI device.");
265 sr_scpi_free(scpi);
266 return SR_ERR;
267 };
268
269 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
270 sr_info("Couldn't get IDN response.");
271 sr_scpi_close(scpi);
272 sr_scpi_free(scpi);
273 return SR_ERR;
274 }
275
276 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
277 if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) &&
278 !strcmp(hw_info->model, supported_models[i].name)) {
279 model = &supported_models[i];
280 break;
281 }
282 }
283
284 if (!strcmp(hw_info->manufacturer, RIGOL))
285 vendor = RIGOL_SHORT;
286 else if (!strcmp(hw_info->manufacturer, AGILENT))
287 vendor = AGILENT_SHORT;
288 else
289 vendor = hw_info->manufacturer;
290 if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
291 vendor, hw_info->model,
292 hw_info->firmware_version))) {
293 sr_scpi_hw_info_free(hw_info);
294 sr_scpi_close(scpi);
295 sr_scpi_free(scpi);
296 return SR_ERR_NA;
297 }
298
299 sr_scpi_close(scpi);
300
301 sdi->conn = scpi;
302
303 sdi->driver = di;
304 sdi->inst_type = SR_INST_SCPI;
305
306 if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
307 return SR_ERR_MALLOC;
308
309 devc->limit_frames = 0;
310 devc->model = model;
311 devc->protocol = model->protocol;
312
313 /* DS1000 models with firmware before 0.2.4 used the old
314 * legacy protocol. */
315 if (model->series == RIGOL_DS1000) {
316 version = g_strsplit(hw_info->firmware_version, ".", 0);
317 do {
318 if (!version[0] || !version[1] || !version[2])
319 break;
320 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
321 break;
322 for (i = 0; i < 3; i++) {
323 if (sr_atol(version[i], &n[i]) != SR_OK)
324 break;
325 }
326 if (i != 3)
327 break;
328 if (n[0] != 0 || n[1] > 2)
329 break;
330 if (n[1] == 2 && n[2] > 3)
331 break;
332 sr_dbg("Found DS1000 firmware < 0.2.4, using old protocol.");
333 devc->protocol = PROTOCOL_LEGACY;
334 } while(0);
335 g_strfreev(version);
336 }
337
338 sr_scpi_hw_info_free(hw_info);
339
340 for (i = 0; i < model->analog_channels; i++) {
341 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
342 return SR_ERR_MALLOC;
343 probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name);
344 sdi->probes = g_slist_append(sdi->probes, probe);
345 devc->analog_groups[i].name = channel_name;
346 devc->analog_groups[i].probes = g_slist_append(NULL, probe);
347 sdi->probe_groups = g_slist_append(sdi->probe_groups,
348 &devc->analog_groups[i]);
349 }
350
351 if (devc->model->has_digital) {
352 for (i = 0; i < 16; i++) {
353 if (!(channel_name = g_strdup_printf("D%d", i)))
354 return SR_ERR_MALLOC;
355 probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE, channel_name);
356 g_free(channel_name);
357 if (!probe)
358 return SR_ERR_MALLOC;
359 sdi->probes = g_slist_append(sdi->probes, probe);
360 devc->digital_group.probes = g_slist_append(
361 devc->digital_group.probes, probe);
362 }
363 devc->digital_group.name = "LA";
364 sdi->probe_groups = g_slist_append(sdi->probe_groups,
365 &devc->digital_group);
366 }
367
368 for (i = 0; i < NUM_TIMEBASE; i++) {
369 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
370 devc->timebases = &timebases[i];
371 if (!memcmp(&devc->model->max_timebase, &timebases[i], sizeof(uint64_t[2])))
372 devc->num_timebases = &timebases[i] - devc->timebases + 1;
373 }
374
375 for (i = 0; i < NUM_VDIV; i++)
376 if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
377 devc->vdivs = &vdivs[i];
378
379 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
380 return SR_ERR_MALLOC;
381 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
382 return SR_ERR_MALLOC;
383
384 devc->data_source = DATA_SOURCE_LIVE;
385
386 sdi->priv = devc;
387
388 *devices = g_slist_append(NULL, sdi);
389
390 return SR_OK;
391}
392
393static GSList *scan(GSList *options)
394{
395 struct drv_context *drvc;
396 struct sr_config *src;
397 GSList *l, *devices;
398 GDir *dir;
399 int ret;
400 const gchar *dev_name;
401 gchar *port = NULL;
402 gchar *serialcomm = NULL;
403
404 drvc = di->priv;
405
406 for (l = options; l; l = l->next) {
407 src = l->data;
408 switch (src->key) {
409 case SR_CONF_CONN:
410 port = (char *)g_variant_get_string(src->data, NULL);
411 break;
412 case SR_CONF_SERIALCOMM:
413 serialcomm = (char *)g_variant_get_string(src->data, NULL);
414 break;
415 }
416 }
417
418 devices = NULL;
419 if (port) {
420 if (probe_port(port, serialcomm, &devices) == SR_ERR_MALLOC) {
421 g_free(port);
422 if (serialcomm)
423 g_free(serialcomm);
424 return NULL;
425 }
426 } else {
427 if (!(dir = g_dir_open("/sys/class/usbmisc/", 0, NULL)))
428 if (!(dir = g_dir_open("/sys/class/usb/", 0, NULL)))
429 return NULL;
430 while ((dev_name = g_dir_read_name(dir))) {
431 if (strncmp(dev_name, "usbtmc", 6))
432 continue;
433 port = g_strconcat("/dev/", dev_name, NULL);
434 ret = probe_port(port, serialcomm, &devices);
435 g_free(port);
436 if (serialcomm)
437 g_free(serialcomm);
438 if (ret == SR_ERR_MALLOC) {
439 g_dir_close(dir);
440 return NULL;
441 }
442 }
443 g_dir_close(dir);
444 }
445
446 /* Tack a copy of the newly found devices onto the driver list. */
447 l = g_slist_copy(devices);
448 drvc->instances = g_slist_concat(drvc->instances, l);
449
450 return devices;
451}
452
453static GSList *dev_list(void)
454{
455 return ((struct drv_context *)(di->priv))->instances;
456}
457
458static int dev_open(struct sr_dev_inst *sdi)
459{
460 struct sr_scpi_dev_inst *scpi = sdi->conn;
461
462 if (sr_scpi_open(scpi) < 0)
463 return SR_ERR;
464
465 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
466 return SR_ERR;
467
468 sdi->status = SR_ST_ACTIVE;
469
470 return SR_OK;
471}
472
473static int dev_close(struct sr_dev_inst *sdi)
474{
475 struct sr_scpi_dev_inst *scpi;
476
477 scpi = sdi->conn;
478
479 if (scpi) {
480 if (sr_scpi_close(scpi) < 0)
481 return SR_ERR;
482 sdi->status = SR_ST_INACTIVE;
483 }
484
485 return SR_OK;
486}
487
488static int cleanup(void)
489{
490 return dev_clear();
491}
492
493static int analog_frame_size(const struct sr_dev_inst *sdi)
494{
495 struct dev_context *devc = sdi->priv;
496 struct sr_probe *probe;
497 int analog_probes = 0;
498 GSList *l;
499
500 switch (devc->model->series) {
501 case RIGOL_VS5000:
502 return VS5000_ANALOG_LIVE_WAVEFORM_SIZE;
503 case RIGOL_DS1000:
504 return DS1000_ANALOG_LIVE_WAVEFORM_SIZE;
505 default:
506 for (l = sdi->probes; l; l = l->next) {
507 probe = l->data;
508 if (probe->type == SR_PROBE_ANALOG && probe->enabled)
509 analog_probes++;
510 }
511 if (devc->data_source == DATA_SOURCE_MEMORY) {
512 if (analog_probes == 1)
513 return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C;
514 else
515 return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C;
516 } else {
517 if (devc->model->series == AGILENT_DSO1000)
518 return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE;
519 else
520 return DS2000_ANALOG_LIVE_WAVEFORM_SIZE;
521 }
522 }
523}
524
525static int digital_frame_size(const struct sr_dev_inst *sdi)
526{
527 struct dev_context *devc = sdi->priv;
528
529 switch (devc->model->series) {
530 case RIGOL_VS5000:
531 return VS5000_DIGITAL_WAVEFORM_SIZE;
532 case RIGOL_DS1000:
533 return DS1000_DIGITAL_WAVEFORM_SIZE;
534 default:
535 return 0;
536 }
537}
538
539static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
540 const struct sr_probe_group *probe_group)
541{
542 struct dev_context *devc;
543 struct sr_probe *probe;
544 const char *tmp_str;
545 uint64_t samplerate;
546 int analog_channel = -1;
547 float smallest_diff = 0.0000000001;
548 int idx = -1;
549 unsigned i;
550
551 if (!sdi || !(devc = sdi->priv))
552 return SR_ERR_ARG;
553
554 /* If a probe group is specified, it must be a valid one. */
555 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
556 sr_err("Invalid probe group specified.");
557 return SR_ERR;
558 }
559
560 if (probe_group) {
561 probe = g_slist_nth_data(probe_group->probes, 0);
562 if (!probe)
563 return SR_ERR;
564 if (probe->type == SR_PROBE_ANALOG) {
565 if (probe->name[2] < '1' || probe->name[2] > '4')
566 return SR_ERR;
567 analog_channel = probe->name[2] - '1';
568 }
569 }
570
571 switch (id) {
572 case SR_CONF_NUM_TIMEBASE:
573 *data = g_variant_new_int32(devc->model->num_horizontal_divs);
574 break;
575 case SR_CONF_NUM_VDIV:
576 *data = g_variant_new_int32(NUM_VDIV);
577 case SR_CONF_DATA_SOURCE:
578 if (devc->data_source == DATA_SOURCE_LIVE)
579 *data = g_variant_new_string("Live");
580 else if (devc->data_source == DATA_SOURCE_MEMORY)
581 *data = g_variant_new_string("Memory");
582 else
583 *data = g_variant_new_string("Segmented");
584 break;
585 case SR_CONF_SAMPLERATE:
586 if (devc->data_source == DATA_SOURCE_LIVE) {
587 samplerate = analog_frame_size(sdi) /
588 (devc->timebase * devc->model->num_horizontal_divs);
589 *data = g_variant_new_uint64(samplerate);
590 } else {
591 return SR_ERR_NA;
592 }
593 break;
594 case SR_CONF_TRIGGER_SOURCE:
595 if (!strcmp(devc->trigger_source, "ACL"))
596 tmp_str = "AC Line";
597 else if (!strcmp(devc->trigger_source, "CHAN1"))
598 tmp_str = "CH1";
599 else if (!strcmp(devc->trigger_source, "CHAN2"))
600 tmp_str = "CH2";
601 else if (!strcmp(devc->trigger_source, "CHAN3"))
602 tmp_str = "CH3";
603 else if (!strcmp(devc->trigger_source, "CHAN4"))
604 tmp_str = "CH4";
605 else
606 tmp_str = devc->trigger_source;
607 *data = g_variant_new_string(tmp_str);
608 break;
609 case SR_CONF_TIMEBASE:
610 for (i = 0; i < devc->num_timebases; i++) {
611 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
612 float diff = fabs(devc->timebase - tb);
613 if (diff < smallest_diff) {
614 smallest_diff = diff;
615 idx = i;
616 }
617 }
618 if (idx < 0)
619 return SR_ERR_NA;
620 *data = g_variant_new("(tt)", devc->timebases[idx][0],
621 devc->timebases[idx][1]);
622 break;
623 case SR_CONF_VDIV:
624 if (analog_channel < 0)
625 return SR_ERR_NA;
626 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
627 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
628 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
629 if (diff < smallest_diff) {
630 smallest_diff = diff;
631 idx = i;
632 }
633 }
634 if (idx < 0)
635 return SR_ERR_NA;
636 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
637 break;
638 case SR_CONF_COUPLING:
639 if (analog_channel < 0)
640 return SR_ERR_NA;
641 *data = g_variant_new_string(devc->coupling[analog_channel]);
642 break;
643 default:
644 return SR_ERR_NA;
645 }
646
647 return SR_OK;
648}
649
650static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
651 const struct sr_probe_group *probe_group)
652{
653 struct dev_context *devc;
654 uint64_t tmp_u64, p, q;
655 double t_dbl;
656 unsigned int i, j;
657 int ret;
658 const char *tmp_str;
659 char buffer[16];
660
661 if (!(devc = sdi->priv))
662 return SR_ERR_ARG;
663
664 if (sdi->status != SR_ST_ACTIVE)
665 return SR_ERR_DEV_CLOSED;
666
667 /* If a probe group is specified, it must be a valid one. */
668 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
669 sr_err("Invalid probe group specified.");
670 return SR_ERR;
671 }
672
673 ret = SR_OK;
674 switch (id) {
675 case SR_CONF_LIMIT_FRAMES:
676 devc->limit_frames = g_variant_get_uint64(data);
677 break;
678 case SR_CONF_TRIGGER_SLOPE:
679 tmp_u64 = g_variant_get_uint64(data);
680 if (tmp_u64 != 0 && tmp_u64 != 1)
681 return SR_ERR;
682 g_free(devc->trigger_slope);
683 devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
684 ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
685 break;
686 case SR_CONF_HORIZ_TRIGGERPOS:
687 t_dbl = g_variant_get_double(data);
688 if (t_dbl < 0.0 || t_dbl > 1.0)
689 return SR_ERR;
690 devc->horiz_triggerpos = t_dbl;
691 /* We have the trigger offset as a percentage of the frame, but
692 * need to express this in seconds. */
693 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
694 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
695 ret = set_cfg(sdi, ":TIM:OFFS %s", buffer);
696 break;
697 case SR_CONF_TIMEBASE:
698 g_variant_get(data, "(tt)", &p, &q);
699 for (i = 0; i < devc->num_timebases; i++) {
700 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
701 devc->timebase = (float)p / q;
702 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
703 devc->timebase);
704 ret = set_cfg(sdi, ":TIM:SCAL %s", buffer);
705 break;
706 }
707 }
708 if (i == devc->num_timebases)
709 ret = SR_ERR_ARG;
710 break;
711 case SR_CONF_TRIGGER_SOURCE:
712 tmp_str = g_variant_get_string(data, NULL);
713 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
714 if (!strcmp(trigger_sources[i], tmp_str)) {
715 g_free(devc->trigger_source);
716 devc->trigger_source = g_strdup(trigger_sources[i]);
717 if (!strcmp(devc->trigger_source, "AC Line"))
718 tmp_str = "ACL";
719 else if (!strcmp(devc->trigger_source, "CH1"))
720 tmp_str = "CHAN1";
721 else if (!strcmp(devc->trigger_source, "CH2"))
722 tmp_str = "CHAN2";
723 else if (!strcmp(devc->trigger_source, "CH3"))
724 tmp_str = "CHAN3";
725 else if (!strcmp(devc->trigger_source, "CH4"))
726 tmp_str = "CHAN4";
727 else
728 tmp_str = (char *)devc->trigger_source;
729 ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
730 break;
731 }
732 }
733 if (i == ARRAY_SIZE(trigger_sources))
734 ret = SR_ERR_ARG;
735 break;
736 case SR_CONF_VDIV:
737 if (!probe_group) {
738 sr_err("No probe group specified.");
739 return SR_ERR_PROBE_GROUP;
740 }
741 g_variant_get(data, "(tt)", &p, &q);
742 for (i = 0; i < 2; i++) {
743 if (probe_group == &devc->analog_groups[i]) {
744 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
745 if (vdivs[j][0] != p || vdivs[j][1] != q)
746 continue;
747 devc->vdiv[i] = (float)p / q;
748 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
749 devc->vdiv[i]);
750 return set_cfg(sdi, ":CHAN%d:SCAL %s", i + 1,
751 buffer);
752 }
753 return SR_ERR_ARG;
754 }
755 }
756 return SR_ERR_NA;
757 case SR_CONF_COUPLING:
758 if (!probe_group) {
759 sr_err("No probe group specified.");
760 return SR_ERR_PROBE_GROUP;
761 }
762 tmp_str = g_variant_get_string(data, NULL);
763 for (i = 0; i < 2; i++) {
764 if (probe_group == &devc->analog_groups[i]) {
765 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
766 if (!strcmp(tmp_str, coupling[j])) {
767 g_free(devc->coupling[i]);
768 devc->coupling[i] = g_strdup(coupling[j]);
769 return set_cfg(sdi, ":CHAN%d:COUP %s", i + 1,
770 devc->coupling[i]);
771 }
772 }
773 return SR_ERR_ARG;
774 }
775 }
776 return SR_ERR_NA;
777 case SR_CONF_DATA_SOURCE:
778 tmp_str = g_variant_get_string(data, NULL);
779 if (!strcmp(tmp_str, "Live"))
780 devc->data_source = DATA_SOURCE_LIVE;
781 else if (!strcmp(tmp_str, "Memory"))
782 devc->data_source = DATA_SOURCE_MEMORY;
783 else if (devc->model->series >= RIGOL_DS1000Z
784 && !strcmp(tmp_str, "Segmented"))
785 devc->data_source = DATA_SOURCE_SEGMENTED;
786 else
787 return SR_ERR;
788 break;
789 default:
790 ret = SR_ERR_NA;
791 break;
792 }
793
794 return ret;
795}
796
797static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
798 const struct sr_probe_group *probe_group)
799{
800 GVariant *tuple, *rational[2];
801 GVariantBuilder gvb;
802 unsigned int i;
803 struct dev_context *devc = NULL;
804
805 if (sdi)
806 devc = sdi->priv;
807
808 if (key == SR_CONF_SCAN_OPTIONS) {
809 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
810 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
811 return SR_OK;
812 } else if (key == SR_CONF_DEVICE_OPTIONS && probe_group == NULL) {
813 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
814 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
815 return SR_OK;
816 }
817
818 /* Every other option requires a valid device instance. */
819 if (!sdi || !(devc = sdi->priv))
820 return SR_ERR_ARG;
821
822 /* If a probe group is specified, it must be a valid one. */
823 if (probe_group) {
824 if (probe_group != &devc->analog_groups[0]
825 && probe_group != &devc->analog_groups[1]) {
826 sr_err("Invalid probe group specified.");
827 return SR_ERR;
828 }
829 }
830
831 switch (key) {
832 case SR_CONF_DEVICE_OPTIONS:
833 if (!probe_group) {
834 sr_err("No probe group specified.");
835 return SR_ERR_PROBE_GROUP;
836 }
837 if (probe_group == &devc->digital_group) {
838 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
839 NULL, 0, sizeof(int32_t));
840 return SR_OK;
841 } else {
842 for (i = 0; i < 2; i++) {
843 if (probe_group == &devc->analog_groups[i]) {
844 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
845 analog_hwcaps, ARRAY_SIZE(analog_hwcaps), sizeof(int32_t));
846 return SR_OK;
847 }
848 }
849 return SR_ERR_NA;
850 }
851 break;
852 case SR_CONF_COUPLING:
853 if (!probe_group) {
854 sr_err("No probe group specified.");
855 return SR_ERR_PROBE_GROUP;
856 }
857 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
858 break;
859 case SR_CONF_VDIV:
860 if (!devc)
861 /* Can't know this until we have the exact model. */
862 return SR_ERR_ARG;
863 if (!probe_group) {
864 sr_err("No probe group specified.");
865 return SR_ERR_PROBE_GROUP;
866 }
867 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
868 for (i = 0; i < NUM_VDIV; i++) {
869 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
870 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
871 tuple = g_variant_new_tuple(rational, 2);
872 g_variant_builder_add_value(&gvb, tuple);
873 }
874 *data = g_variant_builder_end(&gvb);
875 break;
876 case SR_CONF_TIMEBASE:
877 if (!devc)
878 /* Can't know this until we have the exact model. */
879 return SR_ERR_ARG;
880 if (devc->num_timebases <= 0)
881 return SR_ERR_NA;
882 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
883 for (i = 0; i < devc->num_timebases; i++) {
884 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
885 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
886 tuple = g_variant_new_tuple(rational, 2);
887 g_variant_builder_add_value(&gvb, tuple);
888 }
889 *data = g_variant_builder_end(&gvb);
890 break;
891 case SR_CONF_TRIGGER_SOURCE:
892 if (!devc)
893 /* Can't know this until we have the exact model. */
894 return SR_ERR_ARG;
895 *data = g_variant_new_strv(trigger_sources,
896 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
897 break;
898 case SR_CONF_DATA_SOURCE:
899 if (!devc)
900 /* Can't know this until we have the exact model. */
901 return SR_ERR_ARG;
902 /* This needs tweaking by series/model! */
903 if (devc->model->series == RIGOL_DS2000)
904 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
905 else
906 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
907 break;
908 default:
909 return SR_ERR_NA;
910 }
911
912 return SR_OK;
913}
914
915static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
916{
917 struct sr_scpi_dev_inst *scpi;
918 struct dev_context *devc;
919 struct sr_probe *probe;
920 struct sr_datafeed_packet packet;
921 GSList *l;
922
923 if (sdi->status != SR_ST_ACTIVE)
924 return SR_ERR_DEV_CLOSED;
925
926 scpi = sdi->conn;
927 devc = sdi->priv;
928
929 devc->num_frames = 0;
930
931 for (l = sdi->probes; l; l = l->next) {
932 probe = l->data;
933 sr_dbg("handling probe %s", probe->name);
934 if (probe->type == SR_PROBE_ANALOG) {
935 if (probe->enabled)
936 devc->enabled_analog_probes = g_slist_append(
937 devc->enabled_analog_probes, probe);
938 if (probe->enabled != devc->analog_channels[probe->index]) {
939 /* Enabled channel is currently disabled, or vice versa. */
940 if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1,
941 probe->enabled ? "ON" : "OFF") != SR_OK)
942 return SR_ERR;
943 devc->analog_channels[probe->index] = probe->enabled;
944 }
945 } else if (probe->type == SR_PROBE_LOGIC) {
946 if (probe->enabled) {
947 devc->enabled_digital_probes = g_slist_append(
948 devc->enabled_digital_probes, probe);
949 /* Turn on LA module if currently off. */
950 if (!devc->la_enabled) {
951 if (set_cfg(sdi, ":LA:DISP ON") != SR_OK)
952 return SR_ERR;
953 devc->la_enabled = TRUE;
954 }
955 }
956 if (probe->enabled != devc->digital_channels[probe->index]) {
957 /* Enabled channel is currently disabled, or vice versa. */
958 if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index,
959 probe->enabled ? "ON" : "OFF") != SR_OK)
960 return SR_ERR;
961 devc->digital_channels[probe->index] = probe->enabled;
962 }
963 }
964 }
965
966 if (!devc->enabled_analog_probes && !devc->enabled_digital_probes)
967 return SR_ERR;
968
969 /* Turn off LA module if on and no digital probes selected. */
970 if (devc->la_enabled && !devc->enabled_digital_probes)
971 if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK)
972 return SR_ERR;
973
974 if (devc->data_source == DATA_SOURCE_LIVE) {
975 if (set_cfg(sdi, ":RUN") != SR_OK)
976 return SR_ERR;
977 } else if (devc->data_source == DATA_SOURCE_MEMORY) {
978 if (devc->model->series != RIGOL_DS2000) {
979 sr_err("Data source 'Memory' not supported for this device");
980 return SR_ERR;
981 }
982 } else if (devc->data_source == DATA_SOURCE_SEGMENTED) {
983 sr_err("Data source 'Segmented' not yet supported");
984 return SR_ERR;
985 }
986
987 sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi);
988
989 /* Send header packet to the session bus. */
990 std_session_send_df_header(cb_data, LOG_PREFIX);
991
992 if (devc->enabled_analog_probes)
993 devc->channel_entry = devc->enabled_analog_probes;
994 else
995 devc->channel_entry = devc->enabled_digital_probes;
996
997 devc->analog_frame_size = analog_frame_size(sdi);
998 devc->digital_frame_size = digital_frame_size(sdi);
999
1000 if (devc->model->series < RIGOL_DS1000Z) {
1001 /* Fetch the first frame. */
1002 if (rigol_ds_channel_start(sdi) != SR_OK)
1003 return SR_ERR;
1004 } else {
1005 if (devc->enabled_analog_probes) {
1006 if (devc->data_source == DATA_SOURCE_MEMORY) {
1007 /* Apparently for the DS2000 the memory
1008 * depth can only be set in Running state -
1009 * this matches the behaviour of the UI. */
1010 if (set_cfg(sdi, ":RUN") != SR_OK)
1011 return SR_ERR;
1012 if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
1013 return SR_ERR;
1014 if (set_cfg(sdi, ":STOP") != SR_OK)
1015 return SR_ERR;
1016 }
1017 if (rigol_ds_capture_start(sdi) != SR_OK)
1018 return SR_ERR;
1019 }
1020 }
1021
1022 /* Start of first frame. */
1023 packet.type = SR_DF_FRAME_BEGIN;
1024 sr_session_send(cb_data, &packet);
1025
1026 return SR_OK;
1027}
1028
1029static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1030{
1031 struct dev_context *devc;
1032 struct sr_scpi_dev_inst *scpi;
1033 struct sr_datafeed_packet packet;
1034
1035 (void)cb_data;
1036
1037 devc = sdi->priv;
1038
1039 if (sdi->status != SR_ST_ACTIVE) {
1040 sr_err("Device inactive, can't stop acquisition.");
1041 return SR_ERR;
1042 }
1043
1044 /* End of last frame. */
1045 packet.type = SR_DF_END;
1046 sr_session_send(sdi, &packet);
1047
1048 g_slist_free(devc->enabled_analog_probes);
1049 g_slist_free(devc->enabled_digital_probes);
1050 devc->enabled_analog_probes = NULL;
1051 devc->enabled_digital_probes = NULL;
1052 scpi = sdi->conn;
1053 sr_scpi_source_remove(scpi);
1054
1055 return SR_OK;
1056}
1057
1058SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1059 .name = "rigol-ds",
1060 .longname = "Rigol DS",
1061 .api_version = 1,
1062 .init = init,
1063 .cleanup = cleanup,
1064 .scan = scan,
1065 .dev_list = dev_list,
1066 .dev_clear = dev_clear,
1067 .config_get = config_get,
1068 .config_set = config_set,
1069 .config_list = config_list,
1070 .dev_open = dev_open,
1071 .dev_close = dev_close,
1072 .dev_acquisition_start = dev_acquisition_start,
1073 .dev_acquisition_stop = dev_acquisition_stop,
1074 .priv = NULL,
1075};