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sr: add new driver API call: scan()
[libsigrok.git] / hardware / openbench-logic-sniffer / ols.c
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1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#ifdef _WIN32
28#include <windows.h>
29#else
30#include <termios.h>
31#endif
32#include <string.h>
33#include <sys/time.h>
34#include <inttypes.h>
35#ifdef _WIN32
36/* TODO */
37#else
38#include <arpa/inet.h>
39#endif
40#include <glib.h>
41#include "libsigrok.h"
42#include "libsigrok-internal.h"
43#include "ols.h"
44
45#ifdef _WIN32
46#define O_NONBLOCK FIONBIO
47#endif
48
49static const int hwcaps[] = {
50 SR_HWCAP_LOGIC_ANALYZER,
51 SR_HWCAP_SAMPLERATE,
52 SR_HWCAP_CAPTURE_RATIO,
53 SR_HWCAP_LIMIT_SAMPLES,
54 SR_HWCAP_RLE,
55 0,
56};
57
58/* Probes are numbered 0-31 (on the PCB silkscreen). */
59static const char *probe_names[NUM_PROBES + 1] = {
60 "0",
61 "1",
62 "2",
63 "3",
64 "4",
65 "5",
66 "6",
67 "7",
68 "8",
69 "9",
70 "10",
71 "11",
72 "12",
73 "13",
74 "14",
75 "15",
76 "16",
77 "17",
78 "18",
79 "19",
80 "20",
81 "21",
82 "22",
83 "23",
84 "24",
85 "25",
86 "26",
87 "27",
88 "28",
89 "29",
90 "30",
91 "31",
92 NULL,
93};
94
95/* default supported samplerates, can be overridden by device metadata */
96static const struct sr_samplerates samplerates = {
97 SR_HZ(10),
98 SR_MHZ(200),
99 SR_HZ(1),
100 NULL,
101};
102
103/* List of struct sr_dev_inst. */
104static GSList *dev_insts = NULL;
105
106static int send_shortcommand(int fd, uint8_t command)
107{
108 char buf[1];
109
110 sr_dbg("ols: sending cmd 0x%.2x", command);
111 buf[0] = command;
112 if (serial_write(fd, buf, 1) != 1)
113 return SR_ERR;
114
115 return SR_OK;
116}
117
118static int send_longcommand(int fd, uint8_t command, uint32_t data)
119{
120 char buf[5];
121
122 sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
123 buf[0] = command;
124 buf[1] = (data & 0xff000000) >> 24;
125 buf[2] = (data & 0xff0000) >> 16;
126 buf[3] = (data & 0xff00) >> 8;
127 buf[4] = data & 0xff;
128 if (serial_write(fd, buf, 5) != 5)
129 return SR_ERR;
130
131 return SR_OK;
132}
133
134static int configure_probes(struct context *ctx, const GSList *probes)
135{
136 const struct sr_probe *probe;
137 const GSList *l;
138 int probe_bit, stage, i;
139 char *tc;
140
141 ctx->probe_mask = 0;
142 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
143 ctx->trigger_mask[i] = 0;
144 ctx->trigger_value[i] = 0;
145 }
146
147 ctx->num_stages = 0;
148 for (l = probes; l; l = l->next) {
149 probe = (const struct sr_probe *)l->data;
150 if (!probe->enabled)
151 continue;
152
153 /*
154 * Set up the probe mask for later configuration into the
155 * flag register.
156 */
157 probe_bit = 1 << (probe->index - 1);
158 ctx->probe_mask |= probe_bit;
159
160 if (!probe->trigger)
161 continue;
162
163 /* Configure trigger mask and value. */
164 stage = 0;
165 for (tc = probe->trigger; tc && *tc; tc++) {
166 ctx->trigger_mask[stage] |= probe_bit;
167 if (*tc == '1')
168 ctx->trigger_value[stage] |= probe_bit;
169 stage++;
170 if (stage > 3)
171 /*
172 * TODO: Only supporting parallel mode, with
173 * up to 4 stages.
174 */
175 return SR_ERR;
176 }
177 if (stage > ctx->num_stages)
178 ctx->num_stages = stage;
179 }
180
181 return SR_OK;
182}
183
184static uint32_t reverse16(uint32_t in)
185{
186 uint32_t out;
187
188 out = (in & 0xff) << 8;
189 out |= (in & 0xff00) >> 8;
190 out |= (in & 0xff0000) << 8;
191 out |= (in & 0xff000000) >> 8;
192
193 return out;
194}
195
196static uint32_t reverse32(uint32_t in)
197{
198 uint32_t out;
199
200 out = (in & 0xff) << 24;
201 out |= (in & 0xff00) << 8;
202 out |= (in & 0xff0000) >> 8;
203 out |= (in & 0xff000000) >> 24;
204
205 return out;
206}
207
208static struct context *ols_dev_new(void)
209{
210 struct context *ctx;
211
212 /* TODO: Is 'ctx' ever g_free()'d? */
213 if (!(ctx = g_try_malloc0(sizeof(struct context)))) {
214 sr_err("ols: %s: ctx malloc failed", __func__);
215 return NULL;
216 }
217
218 ctx->trigger_at = -1;
219 ctx->probe_mask = 0xffffffff;
220 ctx->cur_samplerate = SR_KHZ(200);
221 ctx->serial = NULL;
222
223 return ctx;
224}
225
226static struct sr_dev_inst *get_metadata(int fd)
227{
228 struct sr_dev_inst *sdi;
229 struct context *ctx;
230 uint32_t tmp_int;
231 uint8_t key, type, token;
232 GString *tmp_str, *devname, *version;
233 gchar tmp_c;
234
235 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL);
236 ctx = ols_dev_new();
237 sdi->priv = ctx;
238
239 devname = g_string_new("");
240 version = g_string_new("");
241
242 key = 0xff;
243 while (key) {
244 if (serial_read(fd, &key, 1) != 1 || key == 0x00)
245 break;
246 type = key >> 5;
247 token = key & 0x1f;
248 switch (type) {
249 case 0:
250 /* NULL-terminated string */
251 tmp_str = g_string_new("");
252 while (serial_read(fd, &tmp_c, 1) == 1 && tmp_c != '\0')
253 g_string_append_c(tmp_str, tmp_c);
254 sr_dbg("ols: got metadata key 0x%.2x value '%s'",
255 key, tmp_str->str);
256 switch (token) {
257 case 0x01:
258 /* Device name */
259 devname = g_string_append(devname, tmp_str->str);
260 break;
261 case 0x02:
262 /* FPGA firmware version */
263 if (version->len)
264 g_string_append(version, ", ");
265 g_string_append(version, "FPGA version ");
266 g_string_append(version, tmp_str->str);
267 break;
268 case 0x03:
269 /* Ancillary version */
270 if (version->len)
271 g_string_append(version, ", ");
272 g_string_append(version, "Ancillary version ");
273 g_string_append(version, tmp_str->str);
274 break;
275 default:
276 sr_info("ols: unknown token 0x%.2x: '%s'",
277 token, tmp_str->str);
278 break;
279 }
280 g_string_free(tmp_str, TRUE);
281 break;
282 case 1:
283 /* 32-bit unsigned integer */
284 if (serial_read(fd, &tmp_int, 4) != 4)
285 break;
286 tmp_int = reverse32(tmp_int);
287 sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x",
288 key, tmp_int);
289 switch (token) {
290 case 0x00:
291 /* Number of usable probes */
292 ctx->num_probes = tmp_int;
293 break;
294 case 0x01:
295 /* Amount of sample memory available (bytes) */
296 ctx->max_samples = tmp_int;
297 break;
298 case 0x02:
299 /* Amount of dynamic memory available (bytes) */
300 /* what is this for? */
301 break;
302 case 0x03:
303 /* Maximum sample rate (hz) */
304 ctx->max_samplerate = tmp_int;
305 break;
306 case 0x04:
307 /* protocol version */
308 ctx->protocol_version = tmp_int;
309 break;
310 default:
311 sr_info("ols: unknown token 0x%.2x: 0x%.8x",
312 token, tmp_int);
313 break;
314 }
315 break;
316 case 2:
317 /* 8-bit unsigned integer */
318 if (serial_read(fd, &tmp_c, 1) != 1)
319 break;
320 sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x",
321 key, tmp_c);
322 switch (token) {
323 case 0x00:
324 /* Number of usable probes */
325 ctx->num_probes = tmp_c;
326 break;
327 case 0x01:
328 /* protocol version */
329 ctx->protocol_version = tmp_c;
330 break;
331 default:
332 sr_info("ols: unknown token 0x%.2x: 0x%.2x",
333 token, tmp_c);
334 break;
335 }
336 break;
337 default:
338 /* unknown type */
339 break;
340 }
341 }
342
343 sdi->model = devname->str;
344 sdi->version = version->str;
345 g_string_free(devname, FALSE);
346 g_string_free(version, FALSE);
347
348 return sdi;
349}
350
351static int hw_init(void)
352{
353
354 /* Nothing to do. */
355
356 return SR_OK;
357}
358
359static int hw_scan(void)
360{
361 struct sr_dev_inst *sdi;
362 struct context *ctx;
363 GSList *ports, *l;
364 GPollFD *fds, probefd;
365 int devcnt, final_devcnt, num_ports, fd, ret, i;
366 char buf[8], **dev_names, **serial_params;
367
368 final_devcnt = 0;
369
370 /* Scan all serial ports. */
371 ports = list_serial_ports();
372 num_ports = g_slist_length(ports);
373
374 if (!(fds = g_try_malloc0(num_ports * sizeof(GPollFD)))) {
375 sr_err("ols: %s: fds malloc failed", __func__);
376 goto hw_init_free_ports; /* TODO: SR_ERR_MALLOC. */
377 }
378
379 if (!(dev_names = g_try_malloc(num_ports * sizeof(char *)))) {
380 sr_err("ols: %s: dev_names malloc failed", __func__);
381 goto hw_init_free_fds; /* TODO: SR_ERR_MALLOC. */
382 }
383
384 if (!(serial_params = g_try_malloc(num_ports * sizeof(char *)))) {
385 sr_err("ols: %s: serial_params malloc failed", __func__);
386 goto hw_init_free_dev_names; /* TODO: SR_ERR_MALLOC. */
387 }
388
389 devcnt = 0;
390 for (l = ports; l; l = l->next) {
391 /* The discovery procedure is like this: first send the Reset
392 * command (0x00) 5 times, since the device could be anywhere
393 * in a 5-byte command. Then send the ID command (0x02).
394 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
395 * have a match.
396 *
397 * Since it may take the device a while to respond at 115Kb/s,
398 * we do all the sending first, then wait for all of them to
399 * respond with g_poll().
400 */
401 sr_info("ols: probing %s...", (char *)l->data);
402 fd = serial_open(l->data, O_RDWR | O_NONBLOCK);
403 if (fd != -1) {
404 serial_params[devcnt] = serial_backup_params(fd);
405 serial_set_params(fd, 115200, 8, SERIAL_PARITY_NONE, 1, 2);
406 ret = SR_OK;
407 for (i = 0; i < 5; i++) {
408 if ((ret = send_shortcommand(fd,
409 CMD_RESET)) != SR_OK) {
410 /* Serial port is not writable. */
411 break;
412 }
413 }
414 if (ret != SR_OK) {
415 serial_restore_params(fd,
416 serial_params[devcnt]);
417 serial_close(fd);
418 continue;
419 }
420 send_shortcommand(fd, CMD_ID);
421 fds[devcnt].fd = fd;
422 fds[devcnt].events = G_IO_IN;
423 dev_names[devcnt] = g_strdup(l->data);
424 devcnt++;
425 }
426 g_free(l->data);
427 }
428
429 /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */
430 usleep(10000);
431
432 g_poll(fds, devcnt, 1);
433
434 for (i = 0; i < devcnt; i++) {
435 if (fds[i].revents != G_IO_IN)
436 continue;
437 if (serial_read(fds[i].fd, buf, 4) != 4)
438 continue;
439 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
440 continue;
441
442 /* definitely using the OLS protocol, check if it supports
443 * the metadata command
444 */
445 send_shortcommand(fds[i].fd, CMD_METADATA);
446 probefd.fd = fds[i].fd;
447 probefd.events = G_IO_IN;
448 if (g_poll(&probefd, 1, 10) > 0) {
449 /* got metadata */
450 sdi = get_metadata(fds[i].fd);
451 sdi->index = final_devcnt;
452 ctx = sdi->priv;
453 } else {
454 /* not an OLS -- some other board that uses the sump protocol */
455 sdi = sr_dev_inst_new(final_devcnt, SR_ST_INACTIVE,
456 "Sump", "Logic Analyzer", "v1.0");
457 ctx = ols_dev_new();
458 ctx->num_probes = 32;
459 sdi->priv = ctx;
460 }
461 ctx->serial = sr_serial_dev_inst_new(dev_names[i], -1);
462 dev_insts = g_slist_append(dev_insts, sdi);
463 final_devcnt++;
464 serial_close(fds[i].fd);
465 fds[i].fd = 0;
466 }
467
468 /* clean up after all the probing */
469 for (i = 0; i < devcnt; i++) {
470 if (fds[i].fd != 0) {
471 serial_restore_params(fds[i].fd, serial_params[i]);
472 serial_close(fds[i].fd);
473 }
474 g_free(serial_params[i]);
475 g_free(dev_names[i]);
476 }
477
478 g_free(serial_params);
479hw_init_free_dev_names:
480 g_free(dev_names);
481hw_init_free_fds:
482 g_free(fds);
483hw_init_free_ports:
484 g_slist_free(ports);
485
486 return final_devcnt;
487}
488
489static int hw_dev_open(int dev_index)
490{
491 struct sr_dev_inst *sdi;
492 struct context *ctx;
493
494 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
495 return SR_ERR;
496
497 ctx = sdi->priv;
498
499 ctx->serial->fd = serial_open(ctx->serial->port, O_RDWR);
500 if (ctx->serial->fd == -1)
501 return SR_ERR;
502
503 sdi->status = SR_ST_ACTIVE;
504
505 return SR_OK;
506}
507
508static int hw_dev_close(int dev_index)
509{
510 struct sr_dev_inst *sdi;
511 struct context *ctx;
512
513 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
514 sr_err("ols: %s: sdi was NULL", __func__);
515 return SR_ERR_BUG;
516 }
517
518 ctx = sdi->priv;
519
520 /* TODO */
521 if (ctx->serial->fd != -1) {
522 serial_close(ctx->serial->fd);
523 ctx->serial->fd = -1;
524 sdi->status = SR_ST_INACTIVE;
525 }
526
527 return SR_OK;
528}
529
530static int hw_cleanup(void)
531{
532 GSList *l;
533 struct sr_dev_inst *sdi;
534 struct context *ctx;
535 int ret = SR_OK;
536
537 /* Properly close and free all devices. */
538 for (l = dev_insts; l; l = l->next) {
539 if (!(sdi = l->data)) {
540 /* Log error, but continue cleaning up the rest. */
541 sr_err("ols: %s: sdi was NULL, continuing", __func__);
542 ret = SR_ERR_BUG;
543 continue;
544 }
545 if (!(ctx = sdi->priv)) {
546 /* Log error, but continue cleaning up the rest. */
547 sr_err("ols: %s: sdi->priv was NULL, continuing",
548 __func__);
549 ret = SR_ERR_BUG;
550 continue;
551 }
552 /* TODO: Check for serial != NULL. */
553 if (ctx->serial->fd != -1)
554 serial_close(ctx->serial->fd);
555 sr_serial_dev_inst_free(ctx->serial);
556 sr_dev_inst_free(sdi);
557 }
558 g_slist_free(dev_insts);
559 dev_insts = NULL;
560
561 return ret;
562}
563
564static const void *hw_dev_info_get(int dev_index, int dev_info_id)
565{
566 struct sr_dev_inst *sdi;
567 struct context *ctx;
568 const void *info;
569
570 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
571 return NULL;
572 ctx = sdi->priv;
573
574 info = NULL;
575 switch (dev_info_id) {
576 case SR_DI_INST:
577 info = sdi;
578 break;
579 case SR_DI_NUM_PROBES:
580 info = GINT_TO_POINTER(NUM_PROBES);
581 break;
582 case SR_DI_PROBE_NAMES:
583 info = probe_names;
584 break;
585 case SR_DI_SAMPLERATES:
586 info = &samplerates;
587 break;
588 case SR_DI_TRIGGER_TYPES:
589 info = (char *)TRIGGER_TYPES;
590 break;
591 case SR_DI_CUR_SAMPLERATE:
592 info = &ctx->cur_samplerate;
593 break;
594 }
595
596 return info;
597}
598
599static int hw_dev_status_get(int dev_index)
600{
601 struct sr_dev_inst *sdi;
602
603 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
604 return SR_ST_NOT_FOUND;
605
606 return sdi->status;
607}
608
609static const int *hw_hwcap_get_all(void)
610{
611 return hwcaps;
612}
613
614static int set_samplerate(struct sr_dev_inst *sdi, uint64_t samplerate)
615{
616 struct context *ctx;
617
618 ctx = sdi->priv;
619 if (ctx->max_samplerate) {
620 if (samplerate > ctx->max_samplerate)
621 return SR_ERR_SAMPLERATE;
622 } else if (samplerate < samplerates.low || samplerate > samplerates.high)
623 return SR_ERR_SAMPLERATE;
624
625 if (samplerate > CLOCK_RATE) {
626 ctx->flag_reg |= FLAG_DEMUX;
627 ctx->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
628 } else {
629 ctx->flag_reg &= ~FLAG_DEMUX;
630 ctx->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
631 }
632
633 /* Calculate actual samplerate used and complain if it is different
634 * from the requested.
635 */
636 ctx->cur_samplerate = CLOCK_RATE / (ctx->cur_samplerate_divider + 1);
637 if (ctx->flag_reg & FLAG_DEMUX)
638 ctx->cur_samplerate *= 2;
639 if (ctx->cur_samplerate != samplerate)
640 sr_err("ols: can't match samplerate %" PRIu64 ", using %"
641 PRIu64, samplerate, ctx->cur_samplerate);
642
643 return SR_OK;
644}
645
646static int hw_dev_config_set(int dev_index, int hwcap, const void *value)
647{
648 struct sr_dev_inst *sdi;
649 struct context *ctx;
650 int ret;
651 const uint64_t *tmp_u64;
652
653 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
654 return SR_ERR;
655 ctx = sdi->priv;
656
657 if (sdi->status != SR_ST_ACTIVE)
658 return SR_ERR;
659
660 switch (hwcap) {
661 case SR_HWCAP_SAMPLERATE:
662 ret = set_samplerate(sdi, *(const uint64_t *)value);
663 break;
664 case SR_HWCAP_PROBECONFIG:
665 ret = configure_probes(ctx, (const GSList *)value);
666 break;
667 case SR_HWCAP_LIMIT_SAMPLES:
668 tmp_u64 = value;
669 if (*tmp_u64 < MIN_NUM_SAMPLES)
670 return SR_ERR;
671 if (*tmp_u64 > ctx->max_samples)
672 sr_err("ols: sample limit exceeds hw max");
673 ctx->limit_samples = *tmp_u64;
674 sr_info("ols: sample limit %" PRIu64, ctx->limit_samples);
675 ret = SR_OK;
676 break;
677 case SR_HWCAP_CAPTURE_RATIO:
678 ctx->capture_ratio = *(const uint64_t *)value;
679 if (ctx->capture_ratio < 0 || ctx->capture_ratio > 100) {
680 ctx->capture_ratio = 0;
681 ret = SR_ERR;
682 } else
683 ret = SR_OK;
684 break;
685 case SR_HWCAP_RLE:
686 if (GPOINTER_TO_INT(value)) {
687 sr_info("ols: enabling RLE");
688 ctx->flag_reg |= FLAG_RLE;
689 }
690 ret = SR_OK;
691 break;
692 default:
693 ret = SR_ERR;
694 }
695
696 return ret;
697}
698
699static int receive_data(int fd, int revents, void *cb_data)
700{
701 struct sr_datafeed_packet packet;
702 struct sr_datafeed_logic logic;
703 struct sr_dev_inst *sdi;
704 struct context *ctx;
705 GSList *l;
706 int num_channels, offset, i, j;
707 unsigned char byte;
708
709 /* Find this device's ctx struct by its fd. */
710 ctx = NULL;
711 for (l = dev_insts; l; l = l->next) {
712 sdi = l->data;
713 ctx = sdi->priv;
714 if (ctx->serial->fd == fd) {
715 break;
716 }
717 ctx = NULL;
718 }
719 if (!ctx)
720 /* Shouldn't happen. */
721 return TRUE;
722
723 if (ctx->num_transfers++ == 0) {
724 /*
725 * First time round, means the device started sending data,
726 * and will not stop until done. If it stops sending for
727 * longer than it takes to send a byte, that means it's
728 * finished. We'll double that to 30ms to be sure...
729 */
730 sr_source_remove(fd);
731 sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data);
732 ctx->raw_sample_buf = g_try_malloc(ctx->limit_samples * 4);
733 if (!ctx->raw_sample_buf) {
734 sr_err("ols: %s: ctx->raw_sample_buf malloc failed",
735 __func__);
736 return FALSE;
737 }
738 /* fill with 1010... for debugging */
739 memset(ctx->raw_sample_buf, 0x82, ctx->limit_samples * 4);
740 }
741
742 num_channels = 0;
743 for (i = 0x20; i > 0x02; i /= 2) {
744 if ((ctx->flag_reg & i) == 0)
745 num_channels++;
746 }
747
748 if (revents == G_IO_IN) {
749 if (serial_read(fd, &byte, 1) != 1)
750 return FALSE;
751
752 /* Ignore it if we've read enough. */
753 if (ctx->num_samples >= ctx->limit_samples)
754 return TRUE;
755
756 ctx->sample[ctx->num_bytes++] = byte;
757 sr_dbg("ols: received byte 0x%.2x", byte);
758 if (ctx->num_bytes == num_channels) {
759 /* Got a full sample. */
760 sr_dbg("ols: received sample 0x%.*x",
761 ctx->num_bytes * 2, *(int *)ctx->sample);
762 if (ctx->flag_reg & FLAG_RLE) {
763 /*
764 * In RLE mode -1 should never come in as a
765 * sample, because bit 31 is the "count" flag.
766 */
767 if (ctx->sample[ctx->num_bytes - 1] & 0x80) {
768 ctx->sample[ctx->num_bytes - 1] &= 0x7f;
769 /*
770 * FIXME: This will only work on
771 * little-endian systems.
772 */
773 ctx->rle_count = *(int *)(ctx->sample);
774 sr_dbg("ols: RLE count = %d", ctx->rle_count);
775 ctx->num_bytes = 0;
776 return TRUE;
777 }
778 }
779 ctx->num_samples += ctx->rle_count + 1;
780 if (ctx->num_samples > ctx->limit_samples) {
781 /* Save us from overrunning the buffer. */
782 ctx->rle_count -= ctx->num_samples - ctx->limit_samples;
783 ctx->num_samples = ctx->limit_samples;
784 }
785
786 if (num_channels < 4) {
787 /*
788 * Some channel groups may have been turned
789 * off, to speed up transfer between the
790 * hardware and the PC. Expand that here before
791 * submitting it over the session bus --
792 * whatever is listening on the bus will be
793 * expecting a full 32-bit sample, based on
794 * the number of probes.
795 */
796 j = 0;
797 memset(ctx->tmp_sample, 0, 4);
798 for (i = 0; i < 4; i++) {
799 if (((ctx->flag_reg >> 2) & (1 << i)) == 0) {
800 /*
801 * This channel group was
802 * enabled, copy from received
803 * sample.
804 */
805 ctx->tmp_sample[i] = ctx->sample[j++];
806 }
807 }
808 memcpy(ctx->sample, ctx->tmp_sample, 4);
809 sr_dbg("ols: full sample 0x%.8x", *(int *)ctx->sample);
810 }
811
812 /* the OLS sends its sample buffer backwards.
813 * store it in reverse order here, so we can dump
814 * this on the session bus later.
815 */
816 offset = (ctx->limit_samples - ctx->num_samples) * 4;
817 for (i = 0; i <= ctx->rle_count; i++) {
818 memcpy(ctx->raw_sample_buf + offset + (i * 4),
819 ctx->sample, 4);
820 }
821 memset(ctx->sample, 0, 4);
822 ctx->num_bytes = 0;
823 ctx->rle_count = 0;
824 }
825 } else {
826 /*
827 * This is the main loop telling us a timeout was reached, or
828 * we've acquired all the samples we asked for -- we're done.
829 * Send the (properly-ordered) buffer to the frontend.
830 */
831 if (ctx->trigger_at != -1) {
832 /* a trigger was set up, so we need to tell the frontend
833 * about it.
834 */
835 if (ctx->trigger_at > 0) {
836 /* there are pre-trigger samples, send those first */
837 packet.type = SR_DF_LOGIC;
838 packet.payload = &logic;
839 logic.length = ctx->trigger_at * 4;
840 logic.unitsize = 4;
841 logic.data = ctx->raw_sample_buf +
842 (ctx->limit_samples - ctx->num_samples) * 4;
843 sr_session_send(cb_data, &packet);
844 }
845
846 /* send the trigger */
847 packet.type = SR_DF_TRIGGER;
848 sr_session_send(cb_data, &packet);
849
850 /* send post-trigger samples */
851 packet.type = SR_DF_LOGIC;
852 packet.payload = &logic;
853 logic.length = (ctx->num_samples * 4) - (ctx->trigger_at * 4);
854 logic.unitsize = 4;
855 logic.data = ctx->raw_sample_buf + ctx->trigger_at * 4 +
856 (ctx->limit_samples - ctx->num_samples) * 4;
857 sr_session_send(cb_data, &packet);
858 } else {
859 /* no trigger was used */
860 packet.type = SR_DF_LOGIC;
861 packet.payload = &logic;
862 logic.length = ctx->num_samples * 4;
863 logic.unitsize = 4;
864 logic.data = ctx->raw_sample_buf +
865 (ctx->limit_samples - ctx->num_samples) * 4;
866 sr_session_send(cb_data, &packet);
867 }
868 g_free(ctx->raw_sample_buf);
869
870 serial_flush(fd);
871 serial_close(fd);
872 packet.type = SR_DF_END;
873 sr_session_send(cb_data, &packet);
874 }
875
876 return TRUE;
877}
878
879static int hw_dev_acquisition_start(int dev_index, void *cb_data)
880{
881 struct sr_datafeed_packet *packet;
882 struct sr_datafeed_header *header;
883 struct sr_datafeed_meta_logic meta;
884 struct sr_dev_inst *sdi;
885 struct context *ctx;
886 uint32_t trigger_config[4];
887 uint32_t data;
888 uint16_t readcount, delaycount;
889 uint8_t changrp_mask;
890 int num_channels;
891 int i;
892
893 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
894 return SR_ERR;
895
896 ctx = sdi->priv;
897
898 if (sdi->status != SR_ST_ACTIVE)
899 return SR_ERR;
900
901 /*
902 * Enable/disable channel groups in the flag register according to the
903 * probe mask. Calculate this here, because num_channels is needed
904 * to limit readcount.
905 */
906 changrp_mask = 0;
907 num_channels = 0;
908 for (i = 0; i < 4; i++) {
909 if (ctx->probe_mask & (0xff << (i * 8))) {
910 changrp_mask |= (1 << i);
911 num_channels++;
912 }
913 }
914
915 /*
916 * Limit readcount to prevent reading past the end of the hardware
917 * buffer.
918 */
919 readcount = MIN(ctx->max_samples / num_channels, ctx->limit_samples) / 4;
920
921 memset(trigger_config, 0, 16);
922 trigger_config[ctx->num_stages - 1] |= 0x08;
923 if (ctx->trigger_mask[0]) {
924 delaycount = readcount * (1 - ctx->capture_ratio / 100.0);
925 ctx->trigger_at = (readcount - delaycount) * 4 - ctx->num_stages;
926
927 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_0,
928 reverse32(ctx->trigger_mask[0])) != SR_OK)
929 return SR_ERR;
930 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_0,
931 reverse32(ctx->trigger_value[0])) != SR_OK)
932 return SR_ERR;
933 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
934 trigger_config[0]) != SR_OK)
935 return SR_ERR;
936
937 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_1,
938 reverse32(ctx->trigger_mask[1])) != SR_OK)
939 return SR_ERR;
940 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_1,
941 reverse32(ctx->trigger_value[1])) != SR_OK)
942 return SR_ERR;
943 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_1,
944 trigger_config[1]) != SR_OK)
945 return SR_ERR;
946
947 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_2,
948 reverse32(ctx->trigger_mask[2])) != SR_OK)
949 return SR_ERR;
950 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_2,
951 reverse32(ctx->trigger_value[2])) != SR_OK)
952 return SR_ERR;
953 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_2,
954 trigger_config[2]) != SR_OK)
955 return SR_ERR;
956
957 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_3,
958 reverse32(ctx->trigger_mask[3])) != SR_OK)
959 return SR_ERR;
960 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_3,
961 reverse32(ctx->trigger_value[3])) != SR_OK)
962 return SR_ERR;
963 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_3,
964 trigger_config[3]) != SR_OK)
965 return SR_ERR;
966 } else {
967 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_MASK_0,
968 ctx->trigger_mask[0]) != SR_OK)
969 return SR_ERR;
970 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_VALUE_0,
971 ctx->trigger_value[0]) != SR_OK)
972 return SR_ERR;
973 if (send_longcommand(ctx->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
974 0x00000008) != SR_OK)
975 return SR_ERR;
976 delaycount = readcount;
977 }
978
979 sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
980 "demux %s)", ctx->cur_samplerate, ctx->cur_samplerate_divider,
981 ctx->flag_reg & FLAG_DEMUX ? "on" : "off");
982 if (send_longcommand(ctx->serial->fd, CMD_SET_DIVIDER,
983 reverse32(ctx->cur_samplerate_divider)) != SR_OK)
984 return SR_ERR;
985
986 /* Send sample limit and pre/post-trigger capture ratio. */
987 data = ((readcount - 1) & 0xffff) << 16;
988 data |= (delaycount - 1) & 0xffff;
989 if (send_longcommand(ctx->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
990 return SR_ERR;
991
992 /* The flag register wants them here, and 1 means "disable channel". */
993 ctx->flag_reg |= ~(changrp_mask << 2) & 0x3c;
994 ctx->flag_reg |= FLAG_FILTER;
995 ctx->rle_count = 0;
996 data = (ctx->flag_reg << 24) | ((ctx->flag_reg << 8) & 0xff0000);
997 if (send_longcommand(ctx->serial->fd, CMD_SET_FLAGS, data) != SR_OK)
998 return SR_ERR;
999
1000 /* Start acquisition on the device. */
1001 if (send_shortcommand(ctx->serial->fd, CMD_RUN) != SR_OK)
1002 return SR_ERR;
1003
1004 sr_source_add(ctx->serial->fd, G_IO_IN, -1, receive_data,
1005 cb_data);
1006
1007 if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
1008 sr_err("ols: %s: packet malloc failed", __func__);
1009 return SR_ERR_MALLOC;
1010 }
1011
1012 if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
1013 sr_err("ols: %s: header malloc failed", __func__);
1014 g_free(packet);
1015 return SR_ERR_MALLOC;
1016 }
1017
1018 /* Send header packet to the session bus. */
1019 packet->type = SR_DF_HEADER;
1020 packet->payload = (unsigned char *)header;
1021 header->feed_version = 1;
1022 gettimeofday(&header->starttime, NULL);
1023 sr_session_send(cb_data, packet);
1024
1025 /* Send metadata about the SR_DF_LOGIC packets to come. */
1026 packet->type = SR_DF_META_LOGIC;
1027 packet->payload = &meta;
1028 meta.samplerate = ctx->cur_samplerate;
1029 meta.num_probes = NUM_PROBES;
1030 sr_session_send(cb_data, packet);
1031
1032 g_free(header);
1033 g_free(packet);
1034
1035 return SR_OK;
1036}
1037
1038/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
1039static int hw_dev_acquisition_stop(int dev_index, void *cb_data)
1040{
1041 struct sr_datafeed_packet packet;
1042
1043 /* Avoid compiler warnings. */
1044 (void)dev_index;
1045
1046 packet.type = SR_DF_END;
1047 sr_session_send(cb_data, &packet);
1048
1049 return SR_OK;
1050}
1051
1052SR_PRIV struct sr_dev_driver ols_driver_info = {
1053 .name = "ols",
1054 .longname = "Openbench Logic Sniffer",
1055 .api_version = 1,
1056 .init = hw_init,
1057 .cleanup = hw_cleanup,
1058 .scan = hw_scan,
1059 .dev_open = hw_dev_open,
1060 .dev_close = hw_dev_close,
1061 .dev_info_get = hw_dev_info_get,
1062 .dev_status_get = hw_dev_status_get,
1063 .hwcap_get_all = hw_hwcap_get_all,
1064 .dev_config_set = hw_dev_config_set,
1065 .dev_acquisition_start = hw_dev_acquisition_start,
1066 .dev_acquisition_stop = hw_dev_acquisition_stop,
1067};
Hardware access and backend lib