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Add a struct sr_context * parameter to hw_init()
[libsigrok.git] / hardware / openbench-logic-sniffer / ols.c
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1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#ifdef _WIN32
28#include <windows.h>
29#else
30#include <termios.h>
31#endif
32#include <string.h>
33#include <sys/time.h>
34#include <inttypes.h>
35#ifdef _WIN32
36/* TODO */
37#else
38#include <arpa/inet.h>
39#endif
40#include <glib.h>
41#include "libsigrok.h"
42#include "libsigrok-internal.h"
43#include "ols.h"
44
45#define SERIALCOMM "115200/8n1"
46
47static const int hwcaps[] = {
48 SR_HWCAP_LOGIC_ANALYZER,
49 SR_HWCAP_SAMPLERATE,
50 SR_HWCAP_CAPTURE_RATIO,
51 SR_HWCAP_LIMIT_SAMPLES,
52 SR_HWCAP_RLE,
53 0,
54};
55
56/* Probes are numbered 0-31 (on the PCB silkscreen). */
57static const char *probe_names[NUM_PROBES + 1] = {
58 "0",
59 "1",
60 "2",
61 "3",
62 "4",
63 "5",
64 "6",
65 "7",
66 "8",
67 "9",
68 "10",
69 "11",
70 "12",
71 "13",
72 "14",
73 "15",
74 "16",
75 "17",
76 "18",
77 "19",
78 "20",
79 "21",
80 "22",
81 "23",
82 "24",
83 "25",
84 "26",
85 "27",
86 "28",
87 "29",
88 "30",
89 "31",
90 NULL,
91};
92
93/* default supported samplerates, can be overridden by device metadata */
94static const struct sr_samplerates samplerates = {
95 SR_HZ(10),
96 SR_MHZ(200),
97 SR_HZ(1),
98 NULL,
99};
100
101SR_PRIV struct sr_dev_driver ols_driver_info;
102static struct sr_dev_driver *odi = &ols_driver_info;
103
104static int send_shortcommand(struct sr_serial_dev_inst *serial,
105 uint8_t command)
106{
107 char buf[1];
108
109 sr_dbg("ols: sending cmd 0x%.2x", command);
110 buf[0] = command;
111 if (serial_write(serial, buf, 1) != 1)
112 return SR_ERR;
113
114 return SR_OK;
115}
116
117static int send_longcommand(struct sr_serial_dev_inst *serial,
118 uint8_t command, uint32_t data)
119{
120 char buf[5];
121
122 sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
123 buf[0] = command;
124 buf[1] = (data & 0xff000000) >> 24;
125 buf[2] = (data & 0xff0000) >> 16;
126 buf[3] = (data & 0xff00) >> 8;
127 buf[4] = data & 0xff;
128 if (serial_write(serial, buf, 5) != 5)
129 return SR_ERR;
130
131 return SR_OK;
132}
133
134static int configure_probes(const struct sr_dev_inst *sdi)
135{
136 struct dev_context *devc;
137 const struct sr_probe *probe;
138 const GSList *l;
139 int probe_bit, stage, i;
140 char *tc;
141
142 devc = sdi->priv;
143
144 devc->probe_mask = 0;
145 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
146 devc->trigger_mask[i] = 0;
147 devc->trigger_value[i] = 0;
148 }
149
150 devc->num_stages = 0;
151 for (l = sdi->probes; l; l = l->next) {
152 probe = (const struct sr_probe *)l->data;
153 if (!probe->enabled)
154 continue;
155
156 /*
157 * Set up the probe mask for later configuration into the
158 * flag register.
159 */
160 probe_bit = 1 << (probe->index);
161 devc->probe_mask |= probe_bit;
162
163 if (!probe->trigger)
164 continue;
165
166 /* Configure trigger mask and value. */
167 stage = 0;
168 for (tc = probe->trigger; tc && *tc; tc++) {
169 devc->trigger_mask[stage] |= probe_bit;
170 if (*tc == '1')
171 devc->trigger_value[stage] |= probe_bit;
172 stage++;
173 if (stage > 3)
174 /*
175 * TODO: Only supporting parallel mode, with
176 * up to 4 stages.
177 */
178 return SR_ERR;
179 }
180 if (stage > devc->num_stages)
181 devc->num_stages = stage;
182 }
183
184 return SR_OK;
185}
186
187static uint32_t reverse16(uint32_t in)
188{
189 uint32_t out;
190
191 out = (in & 0xff) << 8;
192 out |= (in & 0xff00) >> 8;
193 out |= (in & 0xff0000) << 8;
194 out |= (in & 0xff000000) >> 8;
195
196 return out;
197}
198
199static uint32_t reverse32(uint32_t in)
200{
201 uint32_t out;
202
203 out = (in & 0xff) << 24;
204 out |= (in & 0xff00) << 8;
205 out |= (in & 0xff0000) >> 8;
206 out |= (in & 0xff000000) >> 24;
207
208 return out;
209}
210
211static struct dev_context *ols_dev_new(void)
212{
213 struct dev_context *devc;
214
215 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
216 sr_err("ols: %s: devc malloc failed", __func__);
217 return NULL;
218 }
219
220 devc->trigger_at = -1;
221 devc->probe_mask = 0xffffffff;
222 devc->cur_samplerate = SR_KHZ(200);
223 devc->serial = NULL;
224
225 return devc;
226}
227
228static struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
229{
230 struct sr_dev_inst *sdi;
231 struct dev_context *devc;
232 struct sr_probe *probe;
233 uint32_t tmp_int, ui;
234 uint8_t key, type, token;
235 GString *tmp_str, *devname, *version;
236 guchar tmp_c;
237
238 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL);
239 sdi->driver = odi;
240 devc = ols_dev_new();
241 sdi->priv = devc;
242
243 devname = g_string_new("");
244 version = g_string_new("");
245
246 key = 0xff;
247 while (key) {
248 if (serial_read(serial, &key, 1) != 1 || key == 0x00)
249 break;
250 type = key >> 5;
251 token = key & 0x1f;
252 switch (type) {
253 case 0:
254 /* NULL-terminated string */
255 tmp_str = g_string_new("");
256 while (serial_read(serial, &tmp_c, 1) == 1 && tmp_c != '\0')
257 g_string_append_c(tmp_str, tmp_c);
258 sr_dbg("ols: got metadata key 0x%.2x value '%s'",
259 key, tmp_str->str);
260 switch (token) {
261 case 0x01:
262 /* Device name */
263 devname = g_string_append(devname, tmp_str->str);
264 break;
265 case 0x02:
266 /* FPGA firmware version */
267 if (version->len)
268 g_string_append(version, ", ");
269 g_string_append(version, "FPGA version ");
270 g_string_append(version, tmp_str->str);
271 break;
272 case 0x03:
273 /* Ancillary version */
274 if (version->len)
275 g_string_append(version, ", ");
276 g_string_append(version, "Ancillary version ");
277 g_string_append(version, tmp_str->str);
278 break;
279 default:
280 sr_info("ols: unknown token 0x%.2x: '%s'",
281 token, tmp_str->str);
282 break;
283 }
284 g_string_free(tmp_str, TRUE);
285 break;
286 case 1:
287 /* 32-bit unsigned integer */
288 if (serial_read(serial, &tmp_int, 4) != 4)
289 break;
290 tmp_int = reverse32(tmp_int);
291 sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x",
292 key, tmp_int);
293 switch (token) {
294 case 0x00:
295 /* Number of usable probes */
296 for (ui = 0; ui < tmp_int; ui++) {
297 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
298 probe_names[ui])))
299 return 0;
300 sdi->probes = g_slist_append(sdi->probes, probe);
301 }
302 break;
303 case 0x01:
304 /* Amount of sample memory available (bytes) */
305 devc->max_samples = tmp_int;
306 break;
307 case 0x02:
308 /* Amount of dynamic memory available (bytes) */
309 /* what is this for? */
310 break;
311 case 0x03:
312 /* Maximum sample rate (hz) */
313 devc->max_samplerate = tmp_int;
314 break;
315 case 0x04:
316 /* protocol version */
317 devc->protocol_version = tmp_int;
318 break;
319 default:
320 sr_info("ols: unknown token 0x%.2x: 0x%.8x",
321 token, tmp_int);
322 break;
323 }
324 break;
325 case 2:
326 /* 8-bit unsigned integer */
327 if (serial_read(serial, &tmp_c, 1) != 1)
328 break;
329 sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x",
330 key, tmp_c);
331 switch (token) {
332 case 0x00:
333 /* Number of usable probes */
334 for (ui = 0; ui < tmp_c; ui++) {
335 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
336 probe_names[ui])))
337 return 0;
338 sdi->probes = g_slist_append(sdi->probes, probe);
339 }
340 break;
341 case 0x01:
342 /* protocol version */
343 devc->protocol_version = tmp_c;
344 break;
345 default:
346 sr_info("ols: unknown token 0x%.2x: 0x%.2x",
347 token, tmp_c);
348 break;
349 }
350 break;
351 default:
352 /* unknown type */
353 break;
354 }
355 }
356
357 sdi->model = devname->str;
358 sdi->version = version->str;
359 g_string_free(devname, FALSE);
360 g_string_free(version, FALSE);
361
362 return sdi;
363}
364
365static int hw_init(struct sr_context *sr_ctx)
366{
367 struct drv_context *drvc;
368
369 if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
370 sr_err("ols: driver context malloc failed.");
371 return SR_ERR_MALLOC;
372 }
373 odi->priv = drvc;
374
375 return SR_OK;
376}
377
378static GSList *hw_scan(GSList *options)
379{
380 struct sr_hwopt *opt;
381 struct sr_dev_inst *sdi;
382 struct drv_context *drvc;
383 struct dev_context *devc;
384 struct sr_probe *probe;
385 struct sr_serial_dev_inst *serial;
386 GPollFD probefd;
387 GSList *l, *devices;
388 int ret, i;
389 const char *conn, *serialcomm;
390 char buf[8];
391
392 (void)options;
393 drvc = odi->priv;
394 devices = NULL;
395
396 conn = serialcomm = NULL;
397 for (l = options; l; l = l->next) {
398 opt = l->data;
399 switch (opt->hwopt) {
400 case SR_HWOPT_CONN:
401 conn = opt->value;
402 break;
403 case SR_HWOPT_SERIALCOMM:
404 serialcomm = opt->value;
405 break;
406 }
407 }
408 if (!conn)
409 return NULL;
410
411 if (serialcomm == NULL)
412 serialcomm = SERIALCOMM;
413
414 if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
415 return NULL;
416
417 /* The discovery procedure is like this: first send the Reset
418 * command (0x00) 5 times, since the device could be anywhere
419 * in a 5-byte command. Then send the ID command (0x02).
420 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
421 * have a match.
422 */
423 sr_info("ols: probing %s .", conn);
424 if (serial_open(serial, SERIAL_RDWR | SERIAL_NONBLOCK) != SR_OK)
425 return NULL;
426
427 ret = SR_OK;
428 for (i = 0; i < 5; i++) {
429 if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
430 sr_err("ols: port %s is not writable.", conn);
431 break;
432 }
433 }
434 if (ret != SR_OK) {
435 serial_close(serial);
436 sr_err("ols: Could not use port %s. Quitting.", conn);
437 return NULL;
438 }
439 send_shortcommand(serial, CMD_ID);
440
441 /* Wait 10ms for a response. */
442 usleep(10000);
443
444 probefd.fd = serial->fd;
445 probefd.events = G_IO_IN;
446 g_poll(&probefd, 1, 1);
447
448 if (probefd.revents != G_IO_IN)
449 return NULL;
450 if (serial_read(serial, buf, 4) != 4)
451 return NULL;
452 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
453 return NULL;
454
455 /* Definitely using the OLS protocol, check if it supports
456 * the metadata command.
457 */
458 send_shortcommand(serial, CMD_METADATA);
459 if (g_poll(&probefd, 1, 10) > 0) {
460 /* Got metadata. */
461 sdi = get_metadata(serial);
462 sdi->index = 0;
463 devc = sdi->priv;
464 } else {
465 /* Not an OLS -- some other board that uses the sump protocol. */
466 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
467 "Sump", "Logic Analyzer", "v1.0");
468 sdi->driver = odi;
469 devc = ols_dev_new();
470 for (i = 0; i < 32; i++) {
471 if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
472 probe_names[i])))
473 return 0;
474 sdi->probes = g_slist_append(sdi->probes, probe);
475 }
476 sdi->priv = devc;
477 }
478 devc->serial = serial;
479 drvc->instances = g_slist_append(drvc->instances, sdi);
480 devices = g_slist_append(devices, sdi);
481
482 serial_close(serial);
483
484 return devices;
485}
486
487static GSList *hw_dev_list(void)
488{
489 struct drv_context *drvc;
490
491 drvc = odi->priv;
492
493 return drvc->instances;
494}
495
496static int hw_dev_open(struct sr_dev_inst *sdi)
497{
498 struct dev_context *devc;
499
500 devc = sdi->priv;
501
502 if (serial_open(devc->serial, SERIAL_RDWR) != SR_OK)
503 return SR_ERR;
504
505 sdi->status = SR_ST_ACTIVE;
506
507 return SR_OK;
508}
509
510static int hw_dev_close(struct sr_dev_inst *sdi)
511{
512 struct dev_context *devc;
513
514 devc = sdi->priv;
515
516 if (devc->serial && devc->serial->fd != -1) {
517 serial_close(devc->serial);
518 sdi->status = SR_ST_INACTIVE;
519 }
520
521 return SR_OK;
522}
523
524static int hw_cleanup(void)
525{
526 GSList *l;
527 struct sr_dev_inst *sdi;
528 struct drv_context *drvc;
529 struct dev_context *devc;
530 int ret = SR_OK;
531
532 if (!(drvc = odi->priv))
533 return SR_OK;
534
535 /* Properly close and free all devices. */
536 for (l = drvc->instances; l; l = l->next) {
537 if (!(sdi = l->data)) {
538 /* Log error, but continue cleaning up the rest. */
539 sr_err("ols: %s: sdi was NULL, continuing", __func__);
540 ret = SR_ERR_BUG;
541 continue;
542 }
543 if (!(devc = sdi->priv)) {
544 /* Log error, but continue cleaning up the rest. */
545 sr_err("ols: %s: sdi->priv was NULL, continuing",
546 __func__);
547 ret = SR_ERR_BUG;
548 continue;
549 }
550 hw_dev_close(sdi);
551 sr_serial_dev_inst_free(devc->serial);
552 sr_dev_inst_free(sdi);
553 }
554 g_slist_free(drvc->instances);
555 drvc->instances = NULL;
556
557 return ret;
558}
559
560static int hw_info_get(int info_id, const void **data,
561 const struct sr_dev_inst *sdi)
562{
563 struct dev_context *devc;
564
565 switch (info_id) {
566 case SR_DI_HWCAPS:
567 *data = hwcaps;
568 break;
569 case SR_DI_NUM_PROBES:
570 *data = GINT_TO_POINTER(1);
571 break;
572 case SR_DI_PROBE_NAMES:
573 *data = probe_names;
574 break;
575 case SR_DI_SAMPLERATES:
576 *data = &samplerates;
577 break;
578 case SR_DI_TRIGGER_TYPES:
579 *data = (char *)TRIGGER_TYPES;
580 break;
581 case SR_DI_CUR_SAMPLERATE:
582 if (sdi) {
583 devc = sdi->priv;
584 *data = &devc->cur_samplerate;
585 } else
586 return SR_ERR;
587 break;
588 default:
589 return SR_ERR_ARG;
590 }
591
592 return SR_OK;
593}
594
595static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate)
596{
597 struct dev_context *devc;
598
599 devc = sdi->priv;
600 if (devc->max_samplerate) {
601 if (samplerate > devc->max_samplerate)
602 return SR_ERR_SAMPLERATE;
603 } else if (samplerate < samplerates.low || samplerate > samplerates.high)
604 return SR_ERR_SAMPLERATE;
605
606 if (samplerate > CLOCK_RATE) {
607 devc->flag_reg |= FLAG_DEMUX;
608 devc->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
609 } else {
610 devc->flag_reg &= ~FLAG_DEMUX;
611 devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
612 }
613
614 /* Calculate actual samplerate used and complain if it is different
615 * from the requested.
616 */
617 devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1);
618 if (devc->flag_reg & FLAG_DEMUX)
619 devc->cur_samplerate *= 2;
620 if (devc->cur_samplerate != samplerate)
621 sr_err("ols: can't match samplerate %" PRIu64 ", using %"
622 PRIu64, samplerate, devc->cur_samplerate);
623
624 return SR_OK;
625}
626
627static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
628 const void *value)
629{
630 struct dev_context *devc;
631 int ret;
632 const uint64_t *tmp_u64;
633
634 devc = sdi->priv;
635
636 if (sdi->status != SR_ST_ACTIVE)
637 return SR_ERR;
638
639 switch (hwcap) {
640 case SR_HWCAP_SAMPLERATE:
641 ret = set_samplerate(sdi, *(const uint64_t *)value);
642 break;
643 case SR_HWCAP_LIMIT_SAMPLES:
644 tmp_u64 = value;
645 if (*tmp_u64 < MIN_NUM_SAMPLES)
646 return SR_ERR;
647 if (*tmp_u64 > devc->max_samples)
648 sr_err("ols: sample limit exceeds hw max");
649 devc->limit_samples = *tmp_u64;
650 sr_info("ols: sample limit %" PRIu64, devc->limit_samples);
651 ret = SR_OK;
652 break;
653 case SR_HWCAP_CAPTURE_RATIO:
654 devc->capture_ratio = *(const uint64_t *)value;
655 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
656 devc->capture_ratio = 0;
657 ret = SR_ERR;
658 } else
659 ret = SR_OK;
660 break;
661 case SR_HWCAP_RLE:
662 if (GPOINTER_TO_INT(value)) {
663 sr_info("ols: enabling RLE");
664 devc->flag_reg |= FLAG_RLE;
665 }
666 ret = SR_OK;
667 break;
668 default:
669 ret = SR_ERR;
670 }
671
672 return ret;
673}
674
675static void abort_acquisition(const struct sr_dev_inst *sdi)
676{
677 struct sr_datafeed_packet packet;
678 struct dev_context *devc;
679
680 devc = sdi->priv;
681 sr_source_remove(devc->serial->fd);
682
683 /* Terminate session */
684 packet.type = SR_DF_END;
685 sr_session_send(sdi, &packet);
686
687}
688
689
690
691static int receive_data(int fd, int revents, void *cb_data)
692{
693 struct sr_datafeed_packet packet;
694 struct sr_datafeed_logic logic;
695 struct sr_dev_inst *sdi;
696 struct drv_context *drvc;
697 struct dev_context *devc;
698 GSList *l;
699 int num_channels, offset, i, j;
700 unsigned char byte;
701
702 drvc = odi->priv;
703
704 /* Find this device's devc struct by its fd. */
705 devc = NULL;
706 for (l = drvc->instances; l; l = l->next) {
707 sdi = l->data;
708 devc = sdi->priv;
709 if (devc->serial->fd == fd)
710 break;
711 devc = NULL;
712 }
713 if (!devc)
714 /* Shouldn't happen. */
715 return TRUE;
716
717 if (devc->num_transfers++ == 0) {
718 /*
719 * First time round, means the device started sending data,
720 * and will not stop until done. If it stops sending for
721 * longer than it takes to send a byte, that means it's
722 * finished. We'll double that to 30ms to be sure...
723 */
724 sr_source_remove(fd);
725 sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data);
726 /* TODO: Check malloc return code. */
727 devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4);
728 if (!devc->raw_sample_buf) {
729 sr_err("ols: %s: devc->raw_sample_buf malloc failed",
730 __func__);
731 return FALSE;
732 }
733 /* fill with 1010... for debugging */
734 memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4);
735 }
736
737 num_channels = 0;
738 for (i = 0x20; i > 0x02; i /= 2) {
739 if ((devc->flag_reg & i) == 0)
740 num_channels++;
741 }
742
743 if (revents == G_IO_IN) {
744 if (serial_read(devc->serial, &byte, 1) != 1)
745 return FALSE;
746
747 /* Ignore it if we've read enough. */
748 if (devc->num_samples >= devc->limit_samples)
749 return TRUE;
750
751 devc->sample[devc->num_bytes++] = byte;
752 sr_dbg("ols: received byte 0x%.2x", byte);
753 if (devc->num_bytes == num_channels) {
754 /* Got a full sample. */
755 sr_dbg("ols: received sample 0x%.*x",
756 devc->num_bytes * 2, *(int *)devc->sample);
757 if (devc->flag_reg & FLAG_RLE) {
758 /*
759 * In RLE mode -1 should never come in as a
760 * sample, because bit 31 is the "count" flag.
761 */
762 if (devc->sample[devc->num_bytes - 1] & 0x80) {
763 devc->sample[devc->num_bytes - 1] &= 0x7f;
764 /*
765 * FIXME: This will only work on
766 * little-endian systems.
767 */
768 devc->rle_count = *(int *)(devc->sample);
769 sr_dbg("ols: RLE count = %d", devc->rle_count);
770 devc->num_bytes = 0;
771 return TRUE;
772 }
773 }
774 devc->num_samples += devc->rle_count + 1;
775 if (devc->num_samples > devc->limit_samples) {
776 /* Save us from overrunning the buffer. */
777 devc->rle_count -= devc->num_samples - devc->limit_samples;
778 devc->num_samples = devc->limit_samples;
779 }
780
781 if (num_channels < 4) {
782 /*
783 * Some channel groups may have been turned
784 * off, to speed up transfer between the
785 * hardware and the PC. Expand that here before
786 * submitting it over the session bus --
787 * whatever is listening on the bus will be
788 * expecting a full 32-bit sample, based on
789 * the number of probes.
790 */
791 j = 0;
792 memset(devc->tmp_sample, 0, 4);
793 for (i = 0; i < 4; i++) {
794 if (((devc->flag_reg >> 2) & (1 << i)) == 0) {
795 /*
796 * This channel group was
797 * enabled, copy from received
798 * sample.
799 */
800 devc->tmp_sample[i] = devc->sample[j++];
801 }
802 }
803 memcpy(devc->sample, devc->tmp_sample, 4);
804 sr_dbg("ols: full sample 0x%.8x", *(int *)devc->sample);
805 }
806
807 /* the OLS sends its sample buffer backwards.
808 * store it in reverse order here, so we can dump
809 * this on the session bus later.
810 */
811 offset = (devc->limit_samples - devc->num_samples) * 4;
812 for (i = 0; i <= devc->rle_count; i++) {
813 memcpy(devc->raw_sample_buf + offset + (i * 4),
814 devc->sample, 4);
815 }
816 memset(devc->sample, 0, 4);
817 devc->num_bytes = 0;
818 devc->rle_count = 0;
819 }
820 } else {
821 /*
822 * This is the main loop telling us a timeout was reached, or
823 * we've acquired all the samples we asked for -- we're done.
824 * Send the (properly-ordered) buffer to the frontend.
825 */
826 if (devc->trigger_at != -1) {
827 /* a trigger was set up, so we need to tell the frontend
828 * about it.
829 */
830 if (devc->trigger_at > 0) {
831 /* there are pre-trigger samples, send those first */
832 packet.type = SR_DF_LOGIC;
833 packet.payload = &logic;
834 logic.length = devc->trigger_at * 4;
835 logic.unitsize = 4;
836 logic.data = devc->raw_sample_buf +
837 (devc->limit_samples - devc->num_samples) * 4;
838 sr_session_send(cb_data, &packet);
839 }
840
841 /* send the trigger */
842 packet.type = SR_DF_TRIGGER;
843 sr_session_send(cb_data, &packet);
844
845 /* send post-trigger samples */
846 packet.type = SR_DF_LOGIC;
847 packet.payload = &logic;
848 logic.length = (devc->num_samples * 4) - (devc->trigger_at * 4);
849 logic.unitsize = 4;
850 logic.data = devc->raw_sample_buf + devc->trigger_at * 4 +
851 (devc->limit_samples - devc->num_samples) * 4;
852 sr_session_send(cb_data, &packet);
853 } else {
854 /* no trigger was used */
855 packet.type = SR_DF_LOGIC;
856 packet.payload = &logic;
857 logic.length = devc->num_samples * 4;
858 logic.unitsize = 4;
859 logic.data = devc->raw_sample_buf +
860 (devc->limit_samples - devc->num_samples) * 4;
861 sr_session_send(cb_data, &packet);
862 }
863 g_free(devc->raw_sample_buf);
864
865 serial_flush(devc->serial);
866 abort_acquisition(sdi);
867 serial_close(devc->serial);
868 }
869
870 return TRUE;
871}
872
873static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
874 void *cb_data)
875{
876 struct sr_datafeed_packet *packet;
877 struct sr_datafeed_header *header;
878 struct sr_datafeed_meta_logic meta;
879 struct dev_context *devc;
880 uint32_t trigger_config[4];
881 uint32_t data;
882 uint16_t readcount, delaycount;
883 uint8_t changrp_mask;
884 int num_channels;
885 int i;
886
887 devc = sdi->priv;
888
889 if (sdi->status != SR_ST_ACTIVE)
890 return SR_ERR;
891
892 if (configure_probes(sdi) != SR_OK) {
893 sr_err("ols: failed to configured probes");
894 return SR_ERR;
895 }
896
897 /*
898 * Enable/disable channel groups in the flag register according to the
899 * probe mask. Calculate this here, because num_channels is needed
900 * to limit readcount.
901 */
902 changrp_mask = 0;
903 num_channels = 0;
904 for (i = 0; i < 4; i++) {
905 if (devc->probe_mask & (0xff << (i * 8))) {
906 changrp_mask |= (1 << i);
907 num_channels++;
908 }
909 }
910
911 /*
912 * Limit readcount to prevent reading past the end of the hardware
913 * buffer.
914 */
915 readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;
916
917 memset(trigger_config, 0, 16);
918 trigger_config[devc->num_stages - 1] |= 0x08;
919 if (devc->trigger_mask[0]) {
920 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
921 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
922
923 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_0,
924 reverse32(devc->trigger_mask[0])) != SR_OK)
925 return SR_ERR;
926 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_0,
927 reverse32(devc->trigger_value[0])) != SR_OK)
928 return SR_ERR;
929 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_0,
930 trigger_config[0]) != SR_OK)
931 return SR_ERR;
932
933 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_1,
934 reverse32(devc->trigger_mask[1])) != SR_OK)
935 return SR_ERR;
936 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_1,
937 reverse32(devc->trigger_value[1])) != SR_OK)
938 return SR_ERR;
939 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_1,
940 trigger_config[1]) != SR_OK)
941 return SR_ERR;
942
943 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_2,
944 reverse32(devc->trigger_mask[2])) != SR_OK)
945 return SR_ERR;
946 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_2,
947 reverse32(devc->trigger_value[2])) != SR_OK)
948 return SR_ERR;
949 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_2,
950 trigger_config[2]) != SR_OK)
951 return SR_ERR;
952
953 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_3,
954 reverse32(devc->trigger_mask[3])) != SR_OK)
955 return SR_ERR;
956 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_3,
957 reverse32(devc->trigger_value[3])) != SR_OK)
958 return SR_ERR;
959 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_3,
960 trigger_config[3]) != SR_OK)
961 return SR_ERR;
962 } else {
963 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_0,
964 devc->trigger_mask[0]) != SR_OK)
965 return SR_ERR;
966 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_0,
967 devc->trigger_value[0]) != SR_OK)
968 return SR_ERR;
969 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_0,
970 0x00000008) != SR_OK)
971 return SR_ERR;
972 delaycount = readcount;
973 }
974
975 sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
976 "demux %s)", devc->cur_samplerate, devc->cur_samplerate_divider,
977 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
978 if (send_longcommand(devc->serial, CMD_SET_DIVIDER,
979 reverse32(devc->cur_samplerate_divider)) != SR_OK)
980 return SR_ERR;
981
982 /* Send sample limit and pre/post-trigger capture ratio. */
983 data = ((readcount - 1) & 0xffff) << 16;
984 data |= (delaycount - 1) & 0xffff;
985 if (send_longcommand(devc->serial, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
986 return SR_ERR;
987
988 /* The flag register wants them here, and 1 means "disable channel". */
989 devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
990 devc->flag_reg |= FLAG_FILTER;
991 devc->rle_count = 0;
992 data = (devc->flag_reg << 24) | ((devc->flag_reg << 8) & 0xff0000);
993 if (send_longcommand(devc->serial, CMD_SET_FLAGS, data) != SR_OK)
994 return SR_ERR;
995
996 /* Start acquisition on the device. */
997 if (send_shortcommand(devc->serial, CMD_RUN) != SR_OK)
998 return SR_ERR;
999
1000 sr_source_add(devc->serial->fd, G_IO_IN, -1, receive_data,
1001 cb_data);
1002
1003 if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
1004 sr_err("ols: %s: packet malloc failed", __func__);
1005 return SR_ERR_MALLOC;
1006 }
1007
1008 if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
1009 sr_err("ols: %s: header malloc failed", __func__);
1010 g_free(packet);
1011 return SR_ERR_MALLOC;
1012 }
1013
1014 /* Send header packet to the session bus. */
1015 packet->type = SR_DF_HEADER;
1016 packet->payload = (unsigned char *)header;
1017 header->feed_version = 1;
1018 gettimeofday(&header->starttime, NULL);
1019 sr_session_send(cb_data, packet);
1020
1021 /* Send metadata about the SR_DF_LOGIC packets to come. */
1022 packet->type = SR_DF_META_LOGIC;
1023 packet->payload = &meta;
1024 meta.samplerate = devc->cur_samplerate;
1025 meta.num_probes = NUM_PROBES;
1026 sr_session_send(cb_data, packet);
1027
1028 g_free(header);
1029 g_free(packet);
1030
1031 return SR_OK;
1032}
1033
1034/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
1035static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1036{
1037 /* Avoid compiler warnings. */
1038 (void)cb_data;
1039
1040 abort_acquisition(sdi);
1041
1042 return SR_OK;
1043}
1044
1045SR_PRIV struct sr_dev_driver ols_driver_info = {
1046 .name = "ols",
1047 .longname = "Openbench Logic Sniffer",
1048 .api_version = 1,
1049 .init = hw_init,
1050 .cleanup = hw_cleanup,
1051 .scan = hw_scan,
1052 .dev_list = hw_dev_list,
1053 .dev_clear = hw_cleanup,
1054 .dev_open = hw_dev_open,
1055 .dev_close = hw_dev_close,
1056 .info_get = hw_info_get,
1057 .dev_config_set = hw_dev_config_set,
1058 .dev_acquisition_start = hw_dev_acquisition_start,
1059 .dev_acquisition_stop = hw_dev_acquisition_stop,
1060 .priv = NULL,
1061};
Hardware access and backend lib