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serial-dmm: Add Voltcraft VC-820 (UT-D02) support.
[libsigrok.git] / hardware / openbench-logic-sniffer / ols.c
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1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
27#ifdef _WIN32
28#include <windows.h>
29#else
30#include <termios.h>
31#endif
32#include <string.h>
33#include <sys/time.h>
34#include <inttypes.h>
35#ifdef _WIN32
36/* TODO */
37#else
38#include <arpa/inet.h>
39#endif
40#include <glib.h>
41#include "libsigrok.h"
42#include "libsigrok-internal.h"
43#include "ols.h"
44
45#define SERIALCOMM "115200/8n1"
46
47static const int hwcaps[] = {
48 SR_HWCAP_LOGIC_ANALYZER,
49 SR_HWCAP_SAMPLERATE,
50 SR_HWCAP_CAPTURE_RATIO,
51 SR_HWCAP_LIMIT_SAMPLES,
52 SR_HWCAP_RLE,
53 0,
54};
55
56/* Probes are numbered 0-31 (on the PCB silkscreen). */
57static const char *probe_names[NUM_PROBES + 1] = {
58 "0",
59 "1",
60 "2",
61 "3",
62 "4",
63 "5",
64 "6",
65 "7",
66 "8",
67 "9",
68 "10",
69 "11",
70 "12",
71 "13",
72 "14",
73 "15",
74 "16",
75 "17",
76 "18",
77 "19",
78 "20",
79 "21",
80 "22",
81 "23",
82 "24",
83 "25",
84 "26",
85 "27",
86 "28",
87 "29",
88 "30",
89 "31",
90 NULL,
91};
92
93/* default supported samplerates, can be overridden by device metadata */
94static const struct sr_samplerates samplerates = {
95 SR_HZ(10),
96 SR_MHZ(200),
97 SR_HZ(1),
98 NULL,
99};
100
101SR_PRIV struct sr_dev_driver ols_driver_info;
102static struct sr_dev_driver *odi = &ols_driver_info;
103
104static int send_shortcommand(struct sr_serial_dev_inst *serial,
105 uint8_t command)
106{
107 char buf[1];
108
109 sr_dbg("ols: sending cmd 0x%.2x", command);
110 buf[0] = command;
111 if (serial_write(serial, buf, 1) != 1)
112 return SR_ERR;
113
114 return SR_OK;
115}
116
117static int send_longcommand(struct sr_serial_dev_inst *serial,
118 uint8_t command, uint32_t data)
119{
120 char buf[5];
121
122 sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
123 buf[0] = command;
124 buf[1] = (data & 0xff000000) >> 24;
125 buf[2] = (data & 0xff0000) >> 16;
126 buf[3] = (data & 0xff00) >> 8;
127 buf[4] = data & 0xff;
128 if (serial_write(serial, buf, 5) != 5)
129 return SR_ERR;
130
131 return SR_OK;
132}
133
134static int configure_probes(const struct sr_dev_inst *sdi)
135{
136 struct dev_context *devc;
137 const struct sr_probe *probe;
138 const GSList *l;
139 int probe_bit, stage, i;
140 char *tc;
141
142 devc = sdi->priv;
143
144 devc->probe_mask = 0;
145 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
146 devc->trigger_mask[i] = 0;
147 devc->trigger_value[i] = 0;
148 }
149
150 devc->num_stages = 0;
151 for (l = sdi->probes; l; l = l->next) {
152 probe = (const struct sr_probe *)l->data;
153 if (!probe->enabled)
154 continue;
155
156 /*
157 * Set up the probe mask for later configuration into the
158 * flag register.
159 */
160 probe_bit = 1 << (probe->index);
161 devc->probe_mask |= probe_bit;
162
163 if (!probe->trigger)
164 continue;
165
166 /* Configure trigger mask and value. */
167 stage = 0;
168 for (tc = probe->trigger; tc && *tc; tc++) {
169 devc->trigger_mask[stage] |= probe_bit;
170 if (*tc == '1')
171 devc->trigger_value[stage] |= probe_bit;
172 stage++;
173 if (stage > 3)
174 /*
175 * TODO: Only supporting parallel mode, with
176 * up to 4 stages.
177 */
178 return SR_ERR;
179 }
180 if (stage > devc->num_stages)
181 devc->num_stages = stage;
182 }
183
184 return SR_OK;
185}
186
187static uint32_t reverse16(uint32_t in)
188{
189 uint32_t out;
190
191 out = (in & 0xff) << 8;
192 out |= (in & 0xff00) >> 8;
193 out |= (in & 0xff0000) << 8;
194 out |= (in & 0xff000000) >> 8;
195
196 return out;
197}
198
199static uint32_t reverse32(uint32_t in)
200{
201 uint32_t out;
202
203 out = (in & 0xff) << 24;
204 out |= (in & 0xff00) << 8;
205 out |= (in & 0xff0000) >> 8;
206 out |= (in & 0xff000000) >> 24;
207
208 return out;
209}
210
211static struct dev_context *ols_dev_new(void)
212{
213 struct dev_context *devc;
214
215 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
216 sr_err("ols: %s: devc malloc failed", __func__);
217 return NULL;
218 }
219
220 devc->trigger_at = -1;
221 devc->probe_mask = 0xffffffff;
222 devc->cur_samplerate = SR_KHZ(200);
223 devc->serial = NULL;
224
225 return devc;
226}
227
228static struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
229{
230 struct sr_dev_inst *sdi;
231 struct dev_context *devc;
232 struct sr_probe *probe;
233 uint32_t tmp_int, ui;
234 uint8_t key, type, token;
235 GString *tmp_str, *devname, *version;
236 guchar tmp_c;
237
238 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL);
239 sdi->driver = odi;
240 devc = ols_dev_new();
241 sdi->priv = devc;
242
243 devname = g_string_new("");
244 version = g_string_new("");
245
246 key = 0xff;
247 while (key) {
248 if (serial_read(serial, &key, 1) != 1 || key == 0x00)
249 break;
250 type = key >> 5;
251 token = key & 0x1f;
252 switch (type) {
253 case 0:
254 /* NULL-terminated string */
255 tmp_str = g_string_new("");
256 while (serial_read(serial, &tmp_c, 1) == 1 && tmp_c != '\0')
257 g_string_append_c(tmp_str, tmp_c);
258 sr_dbg("ols: got metadata key 0x%.2x value '%s'",
259 key, tmp_str->str);
260 switch (token) {
261 case 0x01:
262 /* Device name */
263 devname = g_string_append(devname, tmp_str->str);
264 break;
265 case 0x02:
266 /* FPGA firmware version */
267 if (version->len)
268 g_string_append(version, ", ");
269 g_string_append(version, "FPGA version ");
270 g_string_append(version, tmp_str->str);
271 break;
272 case 0x03:
273 /* Ancillary version */
274 if (version->len)
275 g_string_append(version, ", ");
276 g_string_append(version, "Ancillary version ");
277 g_string_append(version, tmp_str->str);
278 break;
279 default:
280 sr_info("ols: unknown token 0x%.2x: '%s'",
281 token, tmp_str->str);
282 break;
283 }
284 g_string_free(tmp_str, TRUE);
285 break;
286 case 1:
287 /* 32-bit unsigned integer */
288 if (serial_read(serial, &tmp_int, 4) != 4)
289 break;
290 tmp_int = reverse32(tmp_int);
291 sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x",
292 key, tmp_int);
293 switch (token) {
294 case 0x00:
295 /* Number of usable probes */
296 for (ui = 0; ui < tmp_int; ui++) {
297 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
298 probe_names[ui])))
299 return 0;
300 sdi->probes = g_slist_append(sdi->probes, probe);
301 }
302 break;
303 case 0x01:
304 /* Amount of sample memory available (bytes) */
305 devc->max_samples = tmp_int;
306 break;
307 case 0x02:
308 /* Amount of dynamic memory available (bytes) */
309 /* what is this for? */
310 break;
311 case 0x03:
312 /* Maximum sample rate (hz) */
313 devc->max_samplerate = tmp_int;
314 break;
315 case 0x04:
316 /* protocol version */
317 devc->protocol_version = tmp_int;
318 break;
319 default:
320 sr_info("ols: unknown token 0x%.2x: 0x%.8x",
321 token, tmp_int);
322 break;
323 }
324 break;
325 case 2:
326 /* 8-bit unsigned integer */
327 if (serial_read(serial, &tmp_c, 1) != 1)
328 break;
329 sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x",
330 key, tmp_c);
331 switch (token) {
332 case 0x00:
333 /* Number of usable probes */
334 for (ui = 0; ui < tmp_c; ui++) {
335 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
336 probe_names[ui])))
337 return 0;
338 sdi->probes = g_slist_append(sdi->probes, probe);
339 }
340 break;
341 case 0x01:
342 /* protocol version */
343 devc->protocol_version = tmp_c;
344 break;
345 default:
346 sr_info("ols: unknown token 0x%.2x: 0x%.2x",
347 token, tmp_c);
348 break;
349 }
350 break;
351 default:
352 /* unknown type */
353 break;
354 }
355 }
356
357 sdi->model = devname->str;
358 sdi->version = version->str;
359 g_string_free(devname, FALSE);
360 g_string_free(version, FALSE);
361
362 return sdi;
363}
364
365static int hw_init(struct sr_context *sr_ctx)
366{
367 struct drv_context *drvc;
368
369 if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
370 sr_err("ols: driver context malloc failed.");
371 return SR_ERR_MALLOC;
372 }
373 drvc->sr_ctx = sr_ctx;
374 odi->priv = drvc;
375
376 return SR_OK;
377}
378
379static GSList *hw_scan(GSList *options)
380{
381 struct sr_hwopt *opt;
382 struct sr_dev_inst *sdi;
383 struct drv_context *drvc;
384 struct dev_context *devc;
385 struct sr_probe *probe;
386 struct sr_serial_dev_inst *serial;
387 GPollFD probefd;
388 GSList *l, *devices;
389 int ret, i;
390 const char *conn, *serialcomm;
391 char buf[8];
392
393 (void)options;
394 drvc = odi->priv;
395 devices = NULL;
396
397 conn = serialcomm = NULL;
398 for (l = options; l; l = l->next) {
399 opt = l->data;
400 switch (opt->hwopt) {
401 case SR_HWOPT_CONN:
402 conn = opt->value;
403 break;
404 case SR_HWOPT_SERIALCOMM:
405 serialcomm = opt->value;
406 break;
407 }
408 }
409 if (!conn)
410 return NULL;
411
412 if (serialcomm == NULL)
413 serialcomm = SERIALCOMM;
414
415 if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
416 return NULL;
417
418 /* The discovery procedure is like this: first send the Reset
419 * command (0x00) 5 times, since the device could be anywhere
420 * in a 5-byte command. Then send the ID command (0x02).
421 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
422 * have a match.
423 */
424 sr_info("ols: probing %s .", conn);
425 if (serial_open(serial, SERIAL_RDWR | SERIAL_NONBLOCK) != SR_OK)
426 return NULL;
427
428 ret = SR_OK;
429 for (i = 0; i < 5; i++) {
430 if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
431 sr_err("ols: port %s is not writable.", conn);
432 break;
433 }
434 }
435 if (ret != SR_OK) {
436 serial_close(serial);
437 sr_err("ols: Could not use port %s. Quitting.", conn);
438 return NULL;
439 }
440 send_shortcommand(serial, CMD_ID);
441
442 /* Wait 10ms for a response. */
443 usleep(10000);
444
445 probefd.fd = serial->fd;
446 probefd.events = G_IO_IN;
447 g_poll(&probefd, 1, 1);
448
449 if (probefd.revents != G_IO_IN)
450 return NULL;
451 if (serial_read(serial, buf, 4) != 4)
452 return NULL;
453 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
454 return NULL;
455
456 /* Definitely using the OLS protocol, check if it supports
457 * the metadata command.
458 */
459 send_shortcommand(serial, CMD_METADATA);
460 if (g_poll(&probefd, 1, 10) > 0) {
461 /* Got metadata. */
462 sdi = get_metadata(serial);
463 sdi->index = 0;
464 devc = sdi->priv;
465 } else {
466 /* Not an OLS -- some other board that uses the sump protocol. */
467 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
468 "Sump", "Logic Analyzer", "v1.0");
469 sdi->driver = odi;
470 devc = ols_dev_new();
471 for (i = 0; i < 32; i++) {
472 if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
473 probe_names[i])))
474 return 0;
475 sdi->probes = g_slist_append(sdi->probes, probe);
476 }
477 sdi->priv = devc;
478 }
479 devc->serial = serial;
480 drvc->instances = g_slist_append(drvc->instances, sdi);
481 devices = g_slist_append(devices, sdi);
482
483 serial_close(serial);
484
485 return devices;
486}
487
488static GSList *hw_dev_list(void)
489{
490 struct drv_context *drvc;
491
492 drvc = odi->priv;
493
494 return drvc->instances;
495}
496
497static int hw_dev_open(struct sr_dev_inst *sdi)
498{
499 struct dev_context *devc;
500
501 devc = sdi->priv;
502
503 if (serial_open(devc->serial, SERIAL_RDWR) != SR_OK)
504 return SR_ERR;
505
506 sdi->status = SR_ST_ACTIVE;
507
508 return SR_OK;
509}
510
511static int hw_dev_close(struct sr_dev_inst *sdi)
512{
513 struct dev_context *devc;
514
515 devc = sdi->priv;
516
517 if (devc->serial && devc->serial->fd != -1) {
518 serial_close(devc->serial);
519 sdi->status = SR_ST_INACTIVE;
520 }
521
522 return SR_OK;
523}
524
525static int hw_cleanup(void)
526{
527 GSList *l;
528 struct sr_dev_inst *sdi;
529 struct drv_context *drvc;
530 struct dev_context *devc;
531 int ret = SR_OK;
532
533 if (!(drvc = odi->priv))
534 return SR_OK;
535
536 /* Properly close and free all devices. */
537 for (l = drvc->instances; l; l = l->next) {
538 if (!(sdi = l->data)) {
539 /* Log error, but continue cleaning up the rest. */
540 sr_err("ols: %s: sdi was NULL, continuing", __func__);
541 ret = SR_ERR_BUG;
542 continue;
543 }
544 if (!(devc = sdi->priv)) {
545 /* Log error, but continue cleaning up the rest. */
546 sr_err("ols: %s: sdi->priv was NULL, continuing",
547 __func__);
548 ret = SR_ERR_BUG;
549 continue;
550 }
551 hw_dev_close(sdi);
552 sr_serial_dev_inst_free(devc->serial);
553 sr_dev_inst_free(sdi);
554 }
555 g_slist_free(drvc->instances);
556 drvc->instances = NULL;
557
558 return ret;
559}
560
561static int hw_info_get(int info_id, const void **data,
562 const struct sr_dev_inst *sdi)
563{
564 struct dev_context *devc;
565
566 switch (info_id) {
567 case SR_DI_HWCAPS:
568 *data = hwcaps;
569 break;
570 case SR_DI_NUM_PROBES:
571 *data = GINT_TO_POINTER(1);
572 break;
573 case SR_DI_PROBE_NAMES:
574 *data = probe_names;
575 break;
576 case SR_DI_SAMPLERATES:
577 *data = &samplerates;
578 break;
579 case SR_DI_TRIGGER_TYPES:
580 *data = (char *)TRIGGER_TYPES;
581 break;
582 case SR_DI_CUR_SAMPLERATE:
583 if (sdi) {
584 devc = sdi->priv;
585 *data = &devc->cur_samplerate;
586 } else
587 return SR_ERR;
588 break;
589 default:
590 return SR_ERR_ARG;
591 }
592
593 return SR_OK;
594}
595
596static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate)
597{
598 struct dev_context *devc;
599
600 devc = sdi->priv;
601 if (devc->max_samplerate) {
602 if (samplerate > devc->max_samplerate)
603 return SR_ERR_SAMPLERATE;
604 } else if (samplerate < samplerates.low || samplerate > samplerates.high)
605 return SR_ERR_SAMPLERATE;
606
607 if (samplerate > CLOCK_RATE) {
608 devc->flag_reg |= FLAG_DEMUX;
609 devc->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
610 } else {
611 devc->flag_reg &= ~FLAG_DEMUX;
612 devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
613 }
614
615 /* Calculate actual samplerate used and complain if it is different
616 * from the requested.
617 */
618 devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1);
619 if (devc->flag_reg & FLAG_DEMUX)
620 devc->cur_samplerate *= 2;
621 if (devc->cur_samplerate != samplerate)
622 sr_err("ols: can't match samplerate %" PRIu64 ", using %"
623 PRIu64, samplerate, devc->cur_samplerate);
624
625 return SR_OK;
626}
627
628static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
629 const void *value)
630{
631 struct dev_context *devc;
632 int ret;
633 const uint64_t *tmp_u64;
634
635 devc = sdi->priv;
636
637 if (sdi->status != SR_ST_ACTIVE)
638 return SR_ERR;
639
640 switch (hwcap) {
641 case SR_HWCAP_SAMPLERATE:
642 ret = set_samplerate(sdi, *(const uint64_t *)value);
643 break;
644 case SR_HWCAP_LIMIT_SAMPLES:
645 tmp_u64 = value;
646 if (*tmp_u64 < MIN_NUM_SAMPLES)
647 return SR_ERR;
648 if (*tmp_u64 > devc->max_samples)
649 sr_err("ols: sample limit exceeds hw max");
650 devc->limit_samples = *tmp_u64;
651 sr_info("ols: sample limit %" PRIu64, devc->limit_samples);
652 ret = SR_OK;
653 break;
654 case SR_HWCAP_CAPTURE_RATIO:
655 devc->capture_ratio = *(const uint64_t *)value;
656 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
657 devc->capture_ratio = 0;
658 ret = SR_ERR;
659 } else
660 ret = SR_OK;
661 break;
662 case SR_HWCAP_RLE:
663 if (GPOINTER_TO_INT(value)) {
664 sr_info("ols: enabling RLE");
665 devc->flag_reg |= FLAG_RLE;
666 }
667 ret = SR_OK;
668 break;
669 default:
670 ret = SR_ERR;
671 }
672
673 return ret;
674}
675
676static void abort_acquisition(const struct sr_dev_inst *sdi)
677{
678 struct sr_datafeed_packet packet;
679 struct dev_context *devc;
680
681 devc = sdi->priv;
682 sr_source_remove(devc->serial->fd);
683
684 /* Terminate session */
685 packet.type = SR_DF_END;
686 sr_session_send(sdi, &packet);
687
688}
689
690
691
692static int receive_data(int fd, int revents, void *cb_data)
693{
694 struct sr_datafeed_packet packet;
695 struct sr_datafeed_logic logic;
696 struct sr_dev_inst *sdi;
697 struct drv_context *drvc;
698 struct dev_context *devc;
699 GSList *l;
700 int num_channels, offset, i, j;
701 unsigned char byte;
702
703 drvc = odi->priv;
704
705 /* Find this device's devc struct by its fd. */
706 devc = NULL;
707 for (l = drvc->instances; l; l = l->next) {
708 sdi = l->data;
709 devc = sdi->priv;
710 if (devc->serial->fd == fd)
711 break;
712 devc = NULL;
713 }
714 if (!devc)
715 /* Shouldn't happen. */
716 return TRUE;
717
718 if (devc->num_transfers++ == 0) {
719 /*
720 * First time round, means the device started sending data,
721 * and will not stop until done. If it stops sending for
722 * longer than it takes to send a byte, that means it's
723 * finished. We'll double that to 30ms to be sure...
724 */
725 sr_source_remove(fd);
726 sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data);
727 /* TODO: Check malloc return code. */
728 devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4);
729 if (!devc->raw_sample_buf) {
730 sr_err("ols: %s: devc->raw_sample_buf malloc failed",
731 __func__);
732 return FALSE;
733 }
734 /* fill with 1010... for debugging */
735 memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4);
736 }
737
738 num_channels = 0;
739 for (i = 0x20; i > 0x02; i /= 2) {
740 if ((devc->flag_reg & i) == 0)
741 num_channels++;
742 }
743
744 if (revents == G_IO_IN) {
745 if (serial_read(devc->serial, &byte, 1) != 1)
746 return FALSE;
747
748 /* Ignore it if we've read enough. */
749 if (devc->num_samples >= devc->limit_samples)
750 return TRUE;
751
752 devc->sample[devc->num_bytes++] = byte;
753 sr_dbg("ols: received byte 0x%.2x", byte);
754 if (devc->num_bytes == num_channels) {
755 /* Got a full sample. */
756 sr_dbg("ols: received sample 0x%.*x",
757 devc->num_bytes * 2, *(int *)devc->sample);
758 if (devc->flag_reg & FLAG_RLE) {
759 /*
760 * In RLE mode -1 should never come in as a
761 * sample, because bit 31 is the "count" flag.
762 */
763 if (devc->sample[devc->num_bytes - 1] & 0x80) {
764 devc->sample[devc->num_bytes - 1] &= 0x7f;
765 /*
766 * FIXME: This will only work on
767 * little-endian systems.
768 */
769 devc->rle_count = *(int *)(devc->sample);
770 sr_dbg("ols: RLE count = %d", devc->rle_count);
771 devc->num_bytes = 0;
772 return TRUE;
773 }
774 }
775 devc->num_samples += devc->rle_count + 1;
776 if (devc->num_samples > devc->limit_samples) {
777 /* Save us from overrunning the buffer. */
778 devc->rle_count -= devc->num_samples - devc->limit_samples;
779 devc->num_samples = devc->limit_samples;
780 }
781
782 if (num_channels < 4) {
783 /*
784 * Some channel groups may have been turned
785 * off, to speed up transfer between the
786 * hardware and the PC. Expand that here before
787 * submitting it over the session bus --
788 * whatever is listening on the bus will be
789 * expecting a full 32-bit sample, based on
790 * the number of probes.
791 */
792 j = 0;
793 memset(devc->tmp_sample, 0, 4);
794 for (i = 0; i < 4; i++) {
795 if (((devc->flag_reg >> 2) & (1 << i)) == 0) {
796 /*
797 * This channel group was
798 * enabled, copy from received
799 * sample.
800 */
801 devc->tmp_sample[i] = devc->sample[j++];
802 }
803 }
804 memcpy(devc->sample, devc->tmp_sample, 4);
805 sr_dbg("ols: full sample 0x%.8x", *(int *)devc->sample);
806 }
807
808 /* the OLS sends its sample buffer backwards.
809 * store it in reverse order here, so we can dump
810 * this on the session bus later.
811 */
812 offset = (devc->limit_samples - devc->num_samples) * 4;
813 for (i = 0; i <= devc->rle_count; i++) {
814 memcpy(devc->raw_sample_buf + offset + (i * 4),
815 devc->sample, 4);
816 }
817 memset(devc->sample, 0, 4);
818 devc->num_bytes = 0;
819 devc->rle_count = 0;
820 }
821 } else {
822 /*
823 * This is the main loop telling us a timeout was reached, or
824 * we've acquired all the samples we asked for -- we're done.
825 * Send the (properly-ordered) buffer to the frontend.
826 */
827 if (devc->trigger_at != -1) {
828 /* a trigger was set up, so we need to tell the frontend
829 * about it.
830 */
831 if (devc->trigger_at > 0) {
832 /* there are pre-trigger samples, send those first */
833 packet.type = SR_DF_LOGIC;
834 packet.payload = &logic;
835 logic.length = devc->trigger_at * 4;
836 logic.unitsize = 4;
837 logic.data = devc->raw_sample_buf +
838 (devc->limit_samples - devc->num_samples) * 4;
839 sr_session_send(cb_data, &packet);
840 }
841
842 /* send the trigger */
843 packet.type = SR_DF_TRIGGER;
844 sr_session_send(cb_data, &packet);
845
846 /* send post-trigger samples */
847 packet.type = SR_DF_LOGIC;
848 packet.payload = &logic;
849 logic.length = (devc->num_samples * 4) - (devc->trigger_at * 4);
850 logic.unitsize = 4;
851 logic.data = devc->raw_sample_buf + devc->trigger_at * 4 +
852 (devc->limit_samples - devc->num_samples) * 4;
853 sr_session_send(cb_data, &packet);
854 } else {
855 /* no trigger was used */
856 packet.type = SR_DF_LOGIC;
857 packet.payload = &logic;
858 logic.length = devc->num_samples * 4;
859 logic.unitsize = 4;
860 logic.data = devc->raw_sample_buf +
861 (devc->limit_samples - devc->num_samples) * 4;
862 sr_session_send(cb_data, &packet);
863 }
864 g_free(devc->raw_sample_buf);
865
866 serial_flush(devc->serial);
867 abort_acquisition(sdi);
868 serial_close(devc->serial);
869 }
870
871 return TRUE;
872}
873
874static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
875 void *cb_data)
876{
877 struct sr_datafeed_packet *packet;
878 struct sr_datafeed_header *header;
879 struct sr_datafeed_meta_logic meta;
880 struct dev_context *devc;
881 uint32_t trigger_config[4];
882 uint32_t data;
883 uint16_t readcount, delaycount;
884 uint8_t changrp_mask;
885 int num_channels;
886 int i;
887
888 devc = sdi->priv;
889
890 if (sdi->status != SR_ST_ACTIVE)
891 return SR_ERR;
892
893 if (configure_probes(sdi) != SR_OK) {
894 sr_err("ols: failed to configured probes");
895 return SR_ERR;
896 }
897
898 /*
899 * Enable/disable channel groups in the flag register according to the
900 * probe mask. Calculate this here, because num_channels is needed
901 * to limit readcount.
902 */
903 changrp_mask = 0;
904 num_channels = 0;
905 for (i = 0; i < 4; i++) {
906 if (devc->probe_mask & (0xff << (i * 8))) {
907 changrp_mask |= (1 << i);
908 num_channels++;
909 }
910 }
911
912 /*
913 * Limit readcount to prevent reading past the end of the hardware
914 * buffer.
915 */
916 readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;
917
918 memset(trigger_config, 0, 16);
919 trigger_config[devc->num_stages - 1] |= 0x08;
920 if (devc->trigger_mask[0]) {
921 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
922 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
923
924 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_0,
925 reverse32(devc->trigger_mask[0])) != SR_OK)
926 return SR_ERR;
927 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_0,
928 reverse32(devc->trigger_value[0])) != SR_OK)
929 return SR_ERR;
930 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_0,
931 trigger_config[0]) != SR_OK)
932 return SR_ERR;
933
934 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_1,
935 reverse32(devc->trigger_mask[1])) != SR_OK)
936 return SR_ERR;
937 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_1,
938 reverse32(devc->trigger_value[1])) != SR_OK)
939 return SR_ERR;
940 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_1,
941 trigger_config[1]) != SR_OK)
942 return SR_ERR;
943
944 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_2,
945 reverse32(devc->trigger_mask[2])) != SR_OK)
946 return SR_ERR;
947 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_2,
948 reverse32(devc->trigger_value[2])) != SR_OK)
949 return SR_ERR;
950 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_2,
951 trigger_config[2]) != SR_OK)
952 return SR_ERR;
953
954 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_3,
955 reverse32(devc->trigger_mask[3])) != SR_OK)
956 return SR_ERR;
957 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_3,
958 reverse32(devc->trigger_value[3])) != SR_OK)
959 return SR_ERR;
960 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_3,
961 trigger_config[3]) != SR_OK)
962 return SR_ERR;
963 } else {
964 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_MASK_0,
965 devc->trigger_mask[0]) != SR_OK)
966 return SR_ERR;
967 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_VALUE_0,
968 devc->trigger_value[0]) != SR_OK)
969 return SR_ERR;
970 if (send_longcommand(devc->serial, CMD_SET_TRIGGER_CONFIG_0,
971 0x00000008) != SR_OK)
972 return SR_ERR;
973 delaycount = readcount;
974 }
975
976 sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
977 "demux %s)", devc->cur_samplerate, devc->cur_samplerate_divider,
978 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
979 if (send_longcommand(devc->serial, CMD_SET_DIVIDER,
980 reverse32(devc->cur_samplerate_divider)) != SR_OK)
981 return SR_ERR;
982
983 /* Send sample limit and pre/post-trigger capture ratio. */
984 data = ((readcount - 1) & 0xffff) << 16;
985 data |= (delaycount - 1) & 0xffff;
986 if (send_longcommand(devc->serial, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
987 return SR_ERR;
988
989 /* The flag register wants them here, and 1 means "disable channel". */
990 devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
991 devc->flag_reg |= FLAG_FILTER;
992 devc->rle_count = 0;
993 data = (devc->flag_reg << 24) | ((devc->flag_reg << 8) & 0xff0000);
994 if (send_longcommand(devc->serial, CMD_SET_FLAGS, data) != SR_OK)
995 return SR_ERR;
996
997 /* Start acquisition on the device. */
998 if (send_shortcommand(devc->serial, CMD_RUN) != SR_OK)
999 return SR_ERR;
1000
1001 sr_source_add(devc->serial->fd, G_IO_IN, -1, receive_data,
1002 cb_data);
1003
1004 if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
1005 sr_err("ols: %s: packet malloc failed", __func__);
1006 return SR_ERR_MALLOC;
1007 }
1008
1009 if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
1010 sr_err("ols: %s: header malloc failed", __func__);
1011 g_free(packet);
1012 return SR_ERR_MALLOC;
1013 }
1014
1015 /* Send header packet to the session bus. */
1016 packet->type = SR_DF_HEADER;
1017 packet->payload = (unsigned char *)header;
1018 header->feed_version = 1;
1019 gettimeofday(&header->starttime, NULL);
1020 sr_session_send(cb_data, packet);
1021
1022 /* Send metadata about the SR_DF_LOGIC packets to come. */
1023 packet->type = SR_DF_META_LOGIC;
1024 packet->payload = &meta;
1025 meta.samplerate = devc->cur_samplerate;
1026 meta.num_probes = NUM_PROBES;
1027 sr_session_send(cb_data, packet);
1028
1029 g_free(header);
1030 g_free(packet);
1031
1032 return SR_OK;
1033}
1034
1035/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
1036static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1037{
1038 /* Avoid compiler warnings. */
1039 (void)cb_data;
1040
1041 abort_acquisition(sdi);
1042
1043 return SR_OK;
1044}
1045
1046SR_PRIV struct sr_dev_driver ols_driver_info = {
1047 .name = "ols",
1048 .longname = "Openbench Logic Sniffer",
1049 .api_version = 1,
1050 .init = hw_init,
1051 .cleanup = hw_cleanup,
1052 .scan = hw_scan,
1053 .dev_list = hw_dev_list,
1054 .dev_clear = hw_cleanup,
1055 .dev_open = hw_dev_open,
1056 .dev_close = hw_dev_close,
1057 .info_get = hw_info_get,
1058 .dev_config_set = hw_dev_config_set,
1059 .dev_acquisition_start = hw_dev_acquisition_start,
1060 .dev_acquisition_stop = hw_dev_acquisition_stop,
1061 .priv = NULL,
1062};
Hardware access and backend lib