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Shorten probe_names[] arrays everywhere.
[libsigrok.git] / hardware / link-mso19 / link-mso19.c
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1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2011 Daniel Ribeiro <drwyrm@gmail.com>
5 * Copyright (C) 2012 Renato Caldas <rmsc@fe.up.pt>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <stdio.h>
22#include <stdlib.h>
23#include <string.h>
24#include <unistd.h>
25#include <fcntl.h>
26#include <sys/time.h>
27#include <inttypes.h>
28#include <glib.h>
29#include <libudev.h>
30#include <arpa/inet.h>
31#include "libsigrok.h"
32#include "libsigrok-internal.h"
33#include "link-mso19.h"
34
35#define USB_VENDOR "3195"
36#define USB_PRODUCT "f190"
37
38#define NUM_PROBES 8
39
40static const int hwcaps[] = {
41 SR_HWCAP_LOGIC_ANALYZER,
42// SR_HWCAP_OSCILLOSCOPE,
43// SR_HWCAP_PAT_GENERATOR,
44
45 SR_HWCAP_SAMPLERATE,
46// SR_HWCAP_CAPTURE_RATIO,
47 SR_HWCAP_LIMIT_SAMPLES,
48 0,
49};
50
51/*
52 * Probes are numbered 0 to 7.
53 *
54 * See also: http://www.linkinstruments.com/images/mso19_1113.gif
55 */
56static const char *probe_names[NUM_PROBES + 1] = {
57 "0", "1", "2", "3", "4", "5", "6", "7",
58 NULL,
59};
60
61static const uint64_t supported_samplerates[] = {
62 SR_HZ(100),
63 SR_HZ(200),
64 SR_HZ(500),
65 SR_KHZ(1),
66 SR_KHZ(2),
67 SR_KHZ(5),
68 SR_KHZ(10),
69 SR_KHZ(20),
70 SR_KHZ(50),
71 SR_KHZ(100),
72 SR_KHZ(200),
73 SR_KHZ(500),
74 SR_MHZ(1),
75 SR_MHZ(2),
76 SR_MHZ(5),
77 SR_MHZ(10),
78 SR_MHZ(20),
79 SR_MHZ(50),
80 SR_MHZ(100),
81 SR_MHZ(200),
82 0,
83};
84
85static const struct sr_samplerates samplerates = {
86 0,
87 0,
88 0,
89 supported_samplerates,
90};
91
92static GSList *dev_insts = NULL;
93
94static int mso_send_control_message(struct sr_dev_inst *sdi,
95 uint16_t payload[], int n)
96{
97 int fd = sdi->serial->fd;
98 int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
99 char *p, *buf;
100
101 ret = SR_ERR;
102
103 if (fd < 0)
104 goto ret;
105
106 if (!(buf = g_try_malloc(s))) {
107 sr_err("Failed to malloc message buffer.");
108 ret = SR_ERR_MALLOC;
109 goto ret;
110 }
111
112 p = buf;
113 memcpy(p, mso_head, sizeof(mso_head));
114 p += sizeof(mso_head);
115
116 for (i = 0; i < n; i++) {
117 *(uint16_t *) p = htons(payload[i]);
118 p += 2;
119 }
120 memcpy(p, mso_foot, sizeof(mso_foot));
121
122 w = 0;
123 while (w < s) {
124 ret = serial_write(fd, buf + w, s - w);
125 if (ret < 0) {
126 ret = SR_ERR;
127 goto free;
128 }
129 w += ret;
130 }
131 ret = SR_OK;
132free:
133 g_free(buf);
134ret:
135 return ret;
136}
137
138static int mso_reset_adc(struct sr_dev_inst *sdi)
139{
140 struct context *ctx = sdi->priv;
141 uint16_t ops[2];
142
143 ops[0] = mso_trans(REG_CTL1, (ctx->ctlbase1 | BIT_CTL1_RESETADC));
144 ops[1] = mso_trans(REG_CTL1, ctx->ctlbase1);
145 ctx->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4;
146
147 sr_dbg("Requesting ADC reset.");
148 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
149}
150
151static int mso_reset_fsm(struct sr_dev_inst *sdi)
152{
153 struct context *ctx = sdi->priv;
154 uint16_t ops[1];
155
156 ctx->ctlbase1 |= BIT_CTL1_RESETFSM;
157 ops[0] = mso_trans(REG_CTL1, ctx->ctlbase1);
158
159 sr_dbg("Requesting ADC reset.");
160 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
161}
162
163static int mso_toggle_led(struct sr_dev_inst *sdi, int state)
164{
165 struct context *ctx = sdi->priv;
166 uint16_t ops[1];
167
168 ctx->ctlbase1 &= ~BIT_CTL1_LED;
169 if (state)
170 ctx->ctlbase1 |= BIT_CTL1_LED;
171 ops[0] = mso_trans(REG_CTL1, ctx->ctlbase1);
172
173 sr_dbg("Requesting LED toggle.");
174 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
175}
176
177static int mso_check_trigger(struct sr_dev_inst *sdi, uint8_t *info)
178{
179 uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
180 char buf[1];
181 int ret;
182
183 sr_dbg("Requesting trigger state.");
184 ret = mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
185 if (info == NULL || ret != SR_OK)
186 return ret;
187
188 buf[0] = 0;
189 if (serial_read(sdi->serial->fd, buf, 1) != 1) /* FIXME: Need timeout */
190 ret = SR_ERR;
191 *info = buf[0];
192
193 sr_dbg("Trigger state is: 0x%x.", *info);
194 return ret;
195}
196
197static int mso_read_buffer(struct sr_dev_inst *sdi)
198{
199 uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
200
201 sr_dbg("Requesting buffer dump.");
202 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
203}
204
205static int mso_arm(struct sr_dev_inst *sdi)
206{
207 struct context *ctx = sdi->priv;
208 uint16_t ops[] = {
209 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_RESETFSM),
210 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_ARM),
211 mso_trans(REG_CTL1, ctx->ctlbase1),
212 };
213
214 sr_dbg("Requesting trigger arm.");
215 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
216}
217
218static int mso_force_capture(struct sr_dev_inst *sdi)
219{
220 struct context *ctx = sdi->priv;
221 uint16_t ops[] = {
222 mso_trans(REG_CTL1, ctx->ctlbase1 | 8),
223 mso_trans(REG_CTL1, ctx->ctlbase1),
224 };
225
226 sr_dbg("Requesting forced capture.");
227 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
228}
229
230static int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
231{
232 struct context *ctx = sdi->priv;
233 uint16_t ops[] = {
234 mso_trans(REG_DAC1, (val >> 8) & 0xff),
235 mso_trans(REG_DAC2, val & 0xff),
236 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_RESETADC),
237 };
238
239 sr_dbg("Setting dac word to 0x%x.", val);
240 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
241}
242
243static int mso_clkrate_out(struct sr_dev_inst *sdi, uint16_t val)
244{
245 uint16_t ops[] = {
246 mso_trans(REG_CLKRATE1, (val >> 8) & 0xff),
247 mso_trans(REG_CLKRATE2, val & 0xff),
248 };
249
250 sr_dbg("Setting clkrate word to 0x%x.", val);
251 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
252}
253
254static int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
255{
256 struct context *ctx = sdi->priv;
257 unsigned int i;
258 int ret = SR_ERR;
259
260 for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
261 if (rate_map[i].rate == rate) {
262 ctx->ctlbase2 = rate_map[i].slowmode;
263 ret = mso_clkrate_out(sdi, rate_map[i].val);
264 if (ret == SR_OK)
265 ctx->cur_rate = rate;
266 return ret;
267 }
268 }
269 return ret;
270}
271
272static inline uint16_t mso_calc_raw_from_mv(struct context *ctx)
273{
274 return (uint16_t) (0x200 -
275 ((ctx->dso_trigger_voltage / ctx->dso_probe_attn) /
276 ctx->vbit));
277}
278
279static int mso_configure_trigger(struct sr_dev_inst *sdi)
280{
281 struct context *ctx = sdi->priv;
282 uint16_t ops[16];
283 uint16_t dso_trigger = mso_calc_raw_from_mv(ctx);
284
285 dso_trigger &= 0x3ff;
286 if ((!ctx->trigger_slope && ctx->trigger_chan == 1) ||
287 (ctx->trigger_slope &&
288 (ctx->trigger_chan == 0 ||
289 ctx->trigger_chan == 2 ||
290 ctx->trigger_chan == 3)))
291 dso_trigger |= 0x400;
292
293 switch (ctx->trigger_chan) {
294 case 1:
295 dso_trigger |= 0xe000;
296 case 2:
297 dso_trigger |= 0x4000;
298 break;
299 case 3:
300 dso_trigger |= 0x2000;
301 break;
302 case 4:
303 dso_trigger |= 0xa000;
304 break;
305 case 5:
306 dso_trigger |= 0x8000;
307 break;
308 default:
309 case 0:
310 break;
311 }
312
313 switch (ctx->trigger_outsrc) {
314 case 1:
315 dso_trigger |= 0x800;
316 break;
317 case 2:
318 dso_trigger |= 0x1000;
319 break;
320 case 3:
321 dso_trigger |= 0x1800;
322 break;
323
324 }
325
326 ops[0] = mso_trans(5, ctx->la_trigger);
327 ops[1] = mso_trans(6, ctx->la_trigger_mask);
328 ops[2] = mso_trans(3, dso_trigger & 0xff);
329 ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
330 ops[4] = mso_trans(11,
331 ctx->dso_trigger_width / SR_HZ_TO_NS(ctx->cur_rate));
332
333 /* Select the SPI/I2C trigger config bank */
334 ops[5] = mso_trans(REG_CTL2, (ctx->ctlbase2 | BITS_CTL2_BANK(2)));
335 /* Configure the SPI/I2C protocol trigger */
336 ops[6] = mso_trans(REG_PT_WORD(0), ctx->protocol_trigger.word[0]);
337 ops[7] = mso_trans(REG_PT_WORD(1), ctx->protocol_trigger.word[1]);
338 ops[8] = mso_trans(REG_PT_WORD(2), ctx->protocol_trigger.word[2]);
339 ops[9] = mso_trans(REG_PT_WORD(3), ctx->protocol_trigger.word[3]);
340 ops[10] = mso_trans(REG_PT_MASK(0), ctx->protocol_trigger.mask[0]);
341 ops[11] = mso_trans(REG_PT_MASK(1), ctx->protocol_trigger.mask[1]);
342 ops[12] = mso_trans(REG_PT_MASK(2), ctx->protocol_trigger.mask[2]);
343 ops[13] = mso_trans(REG_PT_MASK(3), ctx->protocol_trigger.mask[3]);
344 ops[14] = mso_trans(REG_PT_SPIMODE, ctx->protocol_trigger.spimode);
345 /* Select the default config bank */
346 ops[15] = mso_trans(REG_CTL2, ctx->ctlbase2);
347
348 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
349}
350
351static int mso_configure_threshold_level(struct sr_dev_inst *sdi)
352{
353 struct context *ctx = sdi->priv;
354
355 return mso_dac_out(sdi, la_threshold_map[ctx->la_threshold]);
356}
357
358static int mso_parse_serial(const char *iSerial, const char *iProduct,
359 struct context *ctx)
360{
361 unsigned int u1, u2, u3, u4, u5, u6;
362
363 iProduct = iProduct;
364 /* FIXME: This code is in the original app, but I think its
365 * used only for the GUI */
366/* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
367 ctx->num_sample_rates = 0x16;
368 else
369 ctx->num_sample_rates = 0x10; */
370
371 /* parse iSerial */
372 if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
373 &u1, &u2, &u3, &u4, &u5, &u6) != 6)
374 return SR_ERR;
375 ctx->hwmodel = u4;
376 ctx->hwrev = u5;
377 ctx->serial = u6;
378 ctx->vbit = u1 / 10000;
379 if (ctx->vbit == 0)
380 ctx->vbit = 4.19195;
381 ctx->dac_offset = u2;
382 if (ctx->dac_offset == 0)
383 ctx->dac_offset = 0x1ff;
384 ctx->offset_range = u3;
385 if (ctx->offset_range == 0)
386 ctx->offset_range = 0x17d;
387
388 /*
389 * FIXME: There is more code on the original software to handle
390 * bigger iSerial strings, but as I can't test on my device
391 * I will not implement it yet
392 */
393
394 return SR_OK;
395}
396
397static int hw_init(struct sr_context *sr_ctx)
398{
399 /* Nothing to do. */
400
401 return SR_OK;
402}
403
404static int hw_scan(void)
405{
406 struct sr_dev_inst *sdi;
407 int devcnt = 0;
408 struct udev *udev;
409 struct udev_enumerate *enumerate;
410 struct udev_list_entry *devs, *dev_list_entry;
411 struct context *ctx;
412
413 /* It's easier to map usb<->serial using udev */
414 /*
415 * FIXME: On windows we can get the same information from the
416 * registry, add an #ifdef here later
417 */
418 udev = udev_new();
419 if (!udev) {
420 sr_err("Failed to initialize udev.");
421 goto ret;
422 }
423 enumerate = udev_enumerate_new(udev);
424 udev_enumerate_add_match_subsystem(enumerate, "usb-serial");
425 udev_enumerate_scan_devices(enumerate);
426 devs = udev_enumerate_get_list_entry(enumerate);
427 udev_list_entry_foreach(dev_list_entry, devs) {
428 const char *syspath, *sysname, *idVendor, *idProduct,
429 *iSerial, *iProduct;
430 char path[32], manufacturer[32], product[32], hwrev[32];
431 struct udev_device *dev, *parent;
432 size_t s;
433
434 syspath = udev_list_entry_get_name(dev_list_entry);
435 dev = udev_device_new_from_syspath(udev, syspath);
436 sysname = udev_device_get_sysname(dev);
437 parent = udev_device_get_parent_with_subsystem_devtype(
438 dev, "usb", "usb_device");
439 if (!parent) {
440 sr_err("Unable to find parent usb device for %s",
441 sysname);
442 continue;
443 }
444
445 idVendor = udev_device_get_sysattr_value(parent, "idVendor");
446 idProduct = udev_device_get_sysattr_value(parent, "idProduct");
447 if (strcmp(USB_VENDOR, idVendor)
448 || strcmp(USB_PRODUCT, idProduct))
449 continue;
450
451 iSerial = udev_device_get_sysattr_value(parent, "serial");
452 iProduct = udev_device_get_sysattr_value(parent, "product");
453
454 snprintf(path, sizeof(path), "/dev/%s", sysname);
455
456 s = strcspn(iProduct, " ");
457 if (s > sizeof(product) ||
458 strlen(iProduct) - s > sizeof(manufacturer)) {
459 sr_err("Could not parse iProduct: %s.", iProduct);
460 continue;
461 }
462 strncpy(product, iProduct, s);
463 product[s] = 0;
464 strcpy(manufacturer, iProduct + s);
465
466 if (!(ctx = g_try_malloc0(sizeof(struct context)))) {
467 sr_err("Context malloc failed.");
468 continue; /* TODO: Errors handled correctly? */
469 }
470
471 if (mso_parse_serial(iSerial, iProduct, ctx) != SR_OK) {
472 sr_err("Invalid iSerial: %s.", iSerial);
473 goto err_free_ctx;
474 }
475 sprintf(hwrev, "r%d", ctx->hwrev);
476
477 /* hardware initial state */
478 ctx->ctlbase1 = 0;
479 {
480 /* Initialize the protocol trigger configuration */
481 int i;
482 for (i = 0; i < 4; i++) {
483 ctx->protocol_trigger.word[i] = 0;
484 ctx->protocol_trigger.mask[i] = 0xff;
485 }
486 ctx->protocol_trigger.spimode = 0;
487 }
488
489 sdi = sr_dev_inst_new(devcnt, SR_ST_INITIALIZING,
490 manufacturer, product, hwrev);
491 if (!sdi) {
492 sr_err("Unable to create device instance for %s",
493 sysname);
494 goto err_free_ctx;
495 }
496
497 /* save a pointer to our private instance data */
498 sdi->priv = ctx;
499
500 sdi->serial = sr_serial_dev_inst_new(path, -1);
501 if (!sdi->serial)
502 goto err_dev_inst_free;
503
504 dev_insts = g_slist_append(dev_insts, sdi);
505 devcnt++;
506 continue;
507
508err_dev_inst_free:
509 sr_dev_inst_free(sdi);
510err_free_ctx:
511 g_free(ctx);
512 }
513
514 udev_enumerate_unref(enumerate);
515 udev_unref(udev);
516
517ret:
518 return devcnt;
519}
520
521static int hw_cleanup(void)
522{
523 GSList *l;
524 struct sr_dev_inst *sdi;
525 int ret;
526
527 ret = SR_OK;
528 /* Properly close all devices. */
529 for (l = dev_insts; l; l = l->next) {
530 if (!(sdi = l->data)) {
531 /* Log error, but continue cleaning up the rest. */
532 sr_err("%s: sdi was NULL, continuing", __func__);
533 ret = SR_ERR_BUG;
534 continue;
535 }
536 if (sdi->serial->fd != -1)
537 serial_close(sdi->serial->fd);
538 sr_dev_inst_free(sdi);
539 }
540 g_slist_free(dev_insts);
541 dev_insts = NULL;
542
543 return ret;
544}
545
546static int hw_dev_open(int dev_index)
547{
548 struct sr_dev_inst *sdi;
549 struct context *ctx;
550 int ret = SR_ERR;
551
552 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
553 return ret;
554
555 ctx = sdi->priv;
556 sdi->serial->fd = serial_open(sdi->serial->port, SERIAL_RDWR);
557 if (sdi->serial->fd == -1)
558 return ret;
559
560 ret = serial_set_params(sdi->serial->fd, 460800, 8, 0, 1, 2);
561 if (ret != SR_OK)
562 return ret;
563
564 sdi->status = SR_ST_ACTIVE;
565
566 /* FIXME: discard serial buffer */
567
568 mso_check_trigger(sdi, &ctx->trigger_state);
569 sr_dbg("Trigger state: 0x%x.", ctx->trigger_state);
570
571 ret = mso_reset_adc(sdi);
572 if (ret != SR_OK)
573 return ret;
574
575 mso_check_trigger(sdi, &ctx->trigger_state);
576 sr_dbg("Trigger state: 0x%x.", ctx->trigger_state);
577
578// ret = mso_reset_fsm(sdi);
579// if (ret != SR_OK)
580// return ret;
581
582// return SR_ERR;
583 return SR_OK;
584}
585
586static int hw_dev_close(int dev_index)
587{
588 struct sr_dev_inst *sdi;
589
590 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
591 sr_err("%s: sdi was NULL", __func__);
592 return SR_ERR_BUG;
593 }
594
595 /* TODO */
596 if (sdi->serial->fd != -1) {
597 serial_close(sdi->serial->fd);
598 sdi->serial->fd = -1;
599 sdi->status = SR_ST_INACTIVE;
600 }
601
602 return SR_OK;
603}
604
605static const void *hw_dev_info_get(int dev_index, int dev_info_id)
606{
607 struct sr_dev_inst *sdi;
608 struct context *ctx;
609 const void *info = NULL;
610
611 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
612 return NULL;
613 ctx = sdi->priv;
614
615 switch (dev_info_id) {
616 case SR_DI_INST:
617 info = sdi;
618 break;
619 case SR_DI_NUM_PROBES: /* FIXME: How to report analog probe? */
620 info = GINT_TO_POINTER(NUM_PROBES);
621 break;
622 case SR_DI_PROBE_NAMES:
623 info = probe_names;
624 break;
625 case SR_DI_SAMPLERATES:
626 info = &samplerates;
627 break;
628 case SR_DI_TRIGGER_TYPES:
629 info = "01"; /* FIXME */
630 break;
631 case SR_DI_CUR_SAMPLERATE:
632 info = &ctx->cur_rate;
633 break;
634 }
635 return info;
636}
637
638static int hw_dev_status_get(int dev_index)
639{
640 struct sr_dev_inst *sdi;
641
642 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
643 return SR_ST_NOT_FOUND;
644
645 return sdi->status;
646}
647
648static const int *hw_hwcap_get_all(void)
649{
650 return hwcaps;
651}
652
653static int hw_dev_config_set(int dev_index, int hwcap, const void *value)
654{
655 struct sr_dev_inst *sdi;
656
657 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
658 return SR_ERR;
659
660 switch (hwcap) {
661 case SR_HWCAP_SAMPLERATE:
662 return mso_configure_rate(sdi, *(const uint64_t *) value);
663 case SR_HWCAP_PROBECONFIG:
664 case SR_HWCAP_LIMIT_SAMPLES:
665 default:
666 return SR_OK; /* FIXME */
667 }
668}
669
670#define MSO_TRIGGER_UNKNOWN '!'
671#define MSO_TRIGGER_UNKNOWN1 '1'
672#define MSO_TRIGGER_UNKNOWN2 '2'
673#define MSO_TRIGGER_UNKNOWN3 '3'
674#define MSO_TRIGGER_WAIT '4'
675#define MSO_TRIGGER_FIRED '5'
676#define MSO_TRIGGER_DATAREADY '6'
677
678/* FIXME: Pass errors? */
679static int receive_data(int fd, int revents, void *cb_data)
680{
681 struct sr_dev_inst *sdi = cb_data;
682 struct context *ctx = sdi->priv;
683 struct sr_datafeed_packet packet;
684 struct sr_datafeed_logic logic;
685 uint8_t in[1024], logic_out[1024];
686 double analog_out[1024];
687 size_t i, s;
688
689 (void)revents;
690
691 s = serial_read(fd, in, sizeof(in));
692 if (s <= 0)
693 return FALSE;
694
695 /* No samples */
696 if (ctx->trigger_state != MSO_TRIGGER_DATAREADY) {
697 ctx->trigger_state = in[0];
698 if (ctx->trigger_state == MSO_TRIGGER_DATAREADY) {
699 mso_read_buffer(sdi);
700 ctx->buffer_n = 0;
701 } else {
702 mso_check_trigger(sdi, NULL);
703 }
704 return FALSE;
705 }
706
707 /* the hardware always dumps 1024 samples, 24bits each */
708 if (ctx->buffer_n < 3072) {
709 memcpy(ctx->buffer + ctx->buffer_n, in, s);
710 ctx->buffer_n += s;
711 }
712 if (ctx->buffer_n < 3072)
713 return FALSE;
714
715 /* do the conversion */
716 for (i = 0; i < 1024; i++) {
717 /* FIXME: Need to do conversion to mV */
718 analog_out[i] = (ctx->buffer[i * 3] & 0x3f) |
719 ((ctx->buffer[i * 3 + 1] & 0xf) << 6);
720 logic_out[i] = ((ctx->buffer[i * 3 + 1] & 0x30) >> 4) |
721 ((ctx->buffer[i * 3 + 2] & 0x3f) << 2);
722 }
723
724 packet.type = SR_DF_LOGIC;
725 packet.payload = &logic;
726 logic.length = 1024;
727 logic.unitsize = 1;
728 logic.data = logic_out;
729 sr_session_send(ctx->session_dev_id, &packet);
730
731 // Dont bother fixing this yet, keep it "old style"
732 /*
733 packet.type = SR_DF_ANALOG;
734 packet.length = 1024;
735 packet.unitsize = sizeof(double);
736 packet.payload = analog_out;
737 sr_session_send(ctx->session_dev_id, &packet);
738 */
739
740 packet.type = SR_DF_END;
741 sr_session_send(ctx->session_dev_id, &packet);
742
743 return TRUE;
744}
745
746static int hw_dev_acquisition_start(int dev_index, void *cb_data)
747{
748 struct sr_dev_inst *sdi;
749 struct context *ctx;
750 struct sr_datafeed_packet packet;
751 struct sr_datafeed_header header;
752 int ret = SR_ERR;
753
754 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
755 return ret;
756 ctx = sdi->priv;
757
758 /* FIXME: No need to do full reconfigure every time */
759// ret = mso_reset_fsm(sdi);
760// if (ret != SR_OK)
761// return ret;
762
763 /* FIXME: ACDC Mode */
764 ctx->ctlbase1 &= 0x7f;
765// ctx->ctlbase1 |= ctx->acdcmode;
766
767 ret = mso_configure_rate(sdi, ctx->cur_rate);
768 if (ret != SR_OK)
769 return ret;
770
771 /* set dac offset */
772 ret = mso_dac_out(sdi, ctx->dac_offset);
773 if (ret != SR_OK)
774 return ret;
775
776 ret = mso_configure_threshold_level(sdi);
777 if (ret != SR_OK)
778 return ret;
779
780 ret = mso_configure_trigger(sdi);
781 if (ret != SR_OK)
782 return ret;
783
784 /* FIXME: trigger_position */
785
786
787 /* END of config hardware part */
788
789 /* with trigger */
790 ret = mso_arm(sdi);
791 if (ret != SR_OK)
792 return ret;
793
794 /* without trigger */
795// ret = mso_force_capture(sdi);
796// if (ret != SR_OK)
797// return ret;
798
799 mso_check_trigger(sdi, &ctx->trigger_state);
800 ret = mso_check_trigger(sdi, NULL);
801 if (ret != SR_OK)
802 return ret;
803
804 ctx->session_dev_id = cb_data;
805 sr_source_add(sdi->serial->fd, G_IO_IN, -1, receive_data, sdi);
806
807 packet.type = SR_DF_HEADER;
808 packet.payload = (unsigned char *) &header;
809 header.feed_version = 1;
810 gettimeofday(&header.starttime, NULL);
811 header.samplerate = ctx->cur_rate;
812 // header.num_analog_probes = 1;
813 header.num_logic_probes = 8;
814 sr_session_send(ctx->session_dev_id, &packet);
815
816 return ret;
817}
818
819/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
820static int hw_dev_acquisition_stop(int dev_index, void *cb_data)
821{
822 struct sr_datafeed_packet packet;
823
824 (void)dev_index;
825
826 packet.type = SR_DF_END;
827 sr_session_send(cb_data, &packet);
828
829 return SR_OK;
830}
831
832SR_PRIV struct sr_dev_driver link_mso19_driver_info = {
833 .name = "link-mso19",
834 .longname = "Link Instruments MSO-19",
835 .api_version = 1,
836 .init = hw_init,
837 .cleanup = hw_cleanup,
838 .scan = hw_scan,
839 .dev_open = hw_dev_open,
840 .dev_close = hw_dev_close,
841 .dev_info_get = hw_dev_info_get,
842 .dev_status_get = hw_dev_status_get,
843 .hwcap_get_all = hw_hwcap_get_all,
844 .dev_config_set = hw_dev_config_set,
845 .dev_acquisition_start = hw_dev_acquisition_start,
846 .dev_acquisition_stop = hw_dev_acquisition_stop,
847};
Hardware access and backend lib