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1 | /* | |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2011 Daniel Ribeiro <drwyrm@gmail.com> | |
5 | * Copyright (C) 2012 Renato Caldas <rmsc@fe.up.pt> | |
6 | * | |
7 | * This program is free software: you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation, either version 3 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
20 | ||
21 | #include <stdio.h> | |
22 | #include <stdlib.h> | |
23 | #include <string.h> | |
24 | #include <unistd.h> | |
25 | #include <fcntl.h> | |
26 | #include <sys/time.h> | |
27 | #include <inttypes.h> | |
28 | #include <glib.h> | |
29 | #include <libudev.h> | |
30 | #include <arpa/inet.h> | |
31 | #include "libsigrok.h" | |
32 | #include "libsigrok-internal.h" | |
33 | #include "link-mso19.h" | |
34 | ||
35 | #define USB_VENDOR "3195" | |
36 | #define USB_PRODUCT "f190" | |
37 | ||
38 | #define NUM_PROBES 8 | |
39 | ||
40 | static const int hwcaps[] = { | |
41 | SR_HWCAP_LOGIC_ANALYZER, | |
42 | // SR_HWCAP_OSCILLOSCOPE, | |
43 | // SR_HWCAP_PAT_GENERATOR, | |
44 | ||
45 | SR_HWCAP_SAMPLERATE, | |
46 | // SR_HWCAP_CAPTURE_RATIO, | |
47 | SR_HWCAP_LIMIT_SAMPLES, | |
48 | 0, | |
49 | }; | |
50 | ||
51 | /* | |
52 | * Probes are numbered 0 to 7. | |
53 | * | |
54 | * See also: http://www.linkinstruments.com/images/mso19_1113.gif | |
55 | */ | |
56 | static const char *probe_names[NUM_PROBES + 1] = { | |
57 | "0", | |
58 | "1", | |
59 | "2", | |
60 | "3", | |
61 | "4", | |
62 | "5", | |
63 | "6", | |
64 | "7", | |
65 | NULL, | |
66 | }; | |
67 | ||
68 | static const uint64_t supported_samplerates[] = { | |
69 | SR_HZ(100), | |
70 | SR_HZ(200), | |
71 | SR_HZ(500), | |
72 | SR_KHZ(1), | |
73 | SR_KHZ(2), | |
74 | SR_KHZ(5), | |
75 | SR_KHZ(10), | |
76 | SR_KHZ(20), | |
77 | SR_KHZ(50), | |
78 | SR_KHZ(100), | |
79 | SR_KHZ(200), | |
80 | SR_KHZ(500), | |
81 | SR_MHZ(1), | |
82 | SR_MHZ(2), | |
83 | SR_MHZ(5), | |
84 | SR_MHZ(10), | |
85 | SR_MHZ(20), | |
86 | SR_MHZ(50), | |
87 | SR_MHZ(100), | |
88 | SR_MHZ(200), | |
89 | 0, | |
90 | }; | |
91 | ||
92 | static const struct sr_samplerates samplerates = { | |
93 | 0, | |
94 | 0, | |
95 | 0, | |
96 | supported_samplerates, | |
97 | }; | |
98 | ||
99 | static GSList *dev_insts = NULL; | |
100 | ||
101 | static int mso_send_control_message(struct sr_dev_inst *sdi, | |
102 | uint16_t payload[], int n) | |
103 | { | |
104 | int fd = sdi->serial->fd; | |
105 | int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot); | |
106 | char *p, *buf; | |
107 | ||
108 | ret = SR_ERR; | |
109 | ||
110 | if (fd < 0) | |
111 | goto ret; | |
112 | ||
113 | if (!(buf = g_try_malloc(s))) { | |
114 | sr_err("Failed to malloc message buffer."); | |
115 | ret = SR_ERR_MALLOC; | |
116 | goto ret; | |
117 | } | |
118 | ||
119 | p = buf; | |
120 | memcpy(p, mso_head, sizeof(mso_head)); | |
121 | p += sizeof(mso_head); | |
122 | ||
123 | for (i = 0; i < n; i++) { | |
124 | *(uint16_t *) p = htons(payload[i]); | |
125 | p += 2; | |
126 | } | |
127 | memcpy(p, mso_foot, sizeof(mso_foot)); | |
128 | ||
129 | w = 0; | |
130 | while (w < s) { | |
131 | ret = serial_write(fd, buf + w, s - w); | |
132 | if (ret < 0) { | |
133 | ret = SR_ERR; | |
134 | goto free; | |
135 | } | |
136 | w += ret; | |
137 | } | |
138 | ret = SR_OK; | |
139 | free: | |
140 | g_free(buf); | |
141 | ret: | |
142 | return ret; | |
143 | } | |
144 | ||
145 | static int mso_reset_adc(struct sr_dev_inst *sdi) | |
146 | { | |
147 | struct context *ctx = sdi->priv; | |
148 | uint16_t ops[2]; | |
149 | ||
150 | ops[0] = mso_trans(REG_CTL1, (ctx->ctlbase1 | BIT_CTL1_RESETADC)); | |
151 | ops[1] = mso_trans(REG_CTL1, ctx->ctlbase1); | |
152 | ctx->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4; | |
153 | ||
154 | sr_dbg("Requesting ADC reset."); | |
155 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
156 | } | |
157 | ||
158 | static int mso_reset_fsm(struct sr_dev_inst *sdi) | |
159 | { | |
160 | struct context *ctx = sdi->priv; | |
161 | uint16_t ops[1]; | |
162 | ||
163 | ctx->ctlbase1 |= BIT_CTL1_RESETFSM; | |
164 | ops[0] = mso_trans(REG_CTL1, ctx->ctlbase1); | |
165 | ||
166 | sr_dbg("Requesting ADC reset."); | |
167 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
168 | } | |
169 | ||
170 | static int mso_toggle_led(struct sr_dev_inst *sdi, int state) | |
171 | { | |
172 | struct context *ctx = sdi->priv; | |
173 | uint16_t ops[1]; | |
174 | ||
175 | ctx->ctlbase1 &= ~BIT_CTL1_LED; | |
176 | if (state) | |
177 | ctx->ctlbase1 |= BIT_CTL1_LED; | |
178 | ops[0] = mso_trans(REG_CTL1, ctx->ctlbase1); | |
179 | ||
180 | sr_dbg("Requesting LED toggle."); | |
181 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
182 | } | |
183 | ||
184 | static int mso_check_trigger(struct sr_dev_inst *sdi, uint8_t *info) | |
185 | { | |
186 | uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) }; | |
187 | char buf[1]; | |
188 | int ret; | |
189 | ||
190 | sr_dbg("Requesting trigger state."); | |
191 | ret = mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
192 | if (info == NULL || ret != SR_OK) | |
193 | return ret; | |
194 | ||
195 | buf[0] = 0; | |
196 | if (serial_read(sdi->serial->fd, buf, 1) != 1) /* FIXME: Need timeout */ | |
197 | ret = SR_ERR; | |
198 | *info = buf[0]; | |
199 | ||
200 | sr_dbg("Trigger state is: 0x%x.", *info); | |
201 | return ret; | |
202 | } | |
203 | ||
204 | static int mso_read_buffer(struct sr_dev_inst *sdi) | |
205 | { | |
206 | uint16_t ops[] = { mso_trans(REG_BUFFER, 0) }; | |
207 | ||
208 | sr_dbg("Requesting buffer dump."); | |
209 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
210 | } | |
211 | ||
212 | static int mso_arm(struct sr_dev_inst *sdi) | |
213 | { | |
214 | struct context *ctx = sdi->priv; | |
215 | uint16_t ops[] = { | |
216 | mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_RESETFSM), | |
217 | mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_ARM), | |
218 | mso_trans(REG_CTL1, ctx->ctlbase1), | |
219 | }; | |
220 | ||
221 | sr_dbg("Requesting trigger arm."); | |
222 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
223 | } | |
224 | ||
225 | static int mso_force_capture(struct sr_dev_inst *sdi) | |
226 | { | |
227 | struct context *ctx = sdi->priv; | |
228 | uint16_t ops[] = { | |
229 | mso_trans(REG_CTL1, ctx->ctlbase1 | 8), | |
230 | mso_trans(REG_CTL1, ctx->ctlbase1), | |
231 | }; | |
232 | ||
233 | sr_dbg("Requesting forced capture."); | |
234 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
235 | } | |
236 | ||
237 | static int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val) | |
238 | { | |
239 | struct context *ctx = sdi->priv; | |
240 | uint16_t ops[] = { | |
241 | mso_trans(REG_DAC1, (val >> 8) & 0xff), | |
242 | mso_trans(REG_DAC2, val & 0xff), | |
243 | mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_RESETADC), | |
244 | }; | |
245 | ||
246 | sr_dbg("Setting dac word to 0x%x.", val); | |
247 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
248 | } | |
249 | ||
250 | static int mso_clkrate_out(struct sr_dev_inst *sdi, uint16_t val) | |
251 | { | |
252 | uint16_t ops[] = { | |
253 | mso_trans(REG_CLKRATE1, (val >> 8) & 0xff), | |
254 | mso_trans(REG_CLKRATE2, val & 0xff), | |
255 | }; | |
256 | ||
257 | sr_dbg("Setting clkrate word to 0x%x.", val); | |
258 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
259 | } | |
260 | ||
261 | static int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate) | |
262 | { | |
263 | struct context *ctx = sdi->priv; | |
264 | unsigned int i; | |
265 | int ret = SR_ERR; | |
266 | ||
267 | for (i = 0; i < ARRAY_SIZE(rate_map); i++) { | |
268 | if (rate_map[i].rate == rate) { | |
269 | ctx->ctlbase2 = rate_map[i].slowmode; | |
270 | ret = mso_clkrate_out(sdi, rate_map[i].val); | |
271 | if (ret == SR_OK) | |
272 | ctx->cur_rate = rate; | |
273 | return ret; | |
274 | } | |
275 | } | |
276 | return ret; | |
277 | } | |
278 | ||
279 | static inline uint16_t mso_calc_raw_from_mv(struct context *ctx) | |
280 | { | |
281 | return (uint16_t) (0x200 - | |
282 | ((ctx->dso_trigger_voltage / ctx->dso_probe_attn) / | |
283 | ctx->vbit)); | |
284 | } | |
285 | ||
286 | static int mso_configure_trigger(struct sr_dev_inst *sdi) | |
287 | { | |
288 | struct context *ctx = sdi->priv; | |
289 | uint16_t ops[16]; | |
290 | uint16_t dso_trigger = mso_calc_raw_from_mv(ctx); | |
291 | ||
292 | dso_trigger &= 0x3ff; | |
293 | if ((!ctx->trigger_slope && ctx->trigger_chan == 1) || | |
294 | (ctx->trigger_slope && | |
295 | (ctx->trigger_chan == 0 || | |
296 | ctx->trigger_chan == 2 || | |
297 | ctx->trigger_chan == 3))) | |
298 | dso_trigger |= 0x400; | |
299 | ||
300 | switch (ctx->trigger_chan) { | |
301 | case 1: | |
302 | dso_trigger |= 0xe000; | |
303 | case 2: | |
304 | dso_trigger |= 0x4000; | |
305 | break; | |
306 | case 3: | |
307 | dso_trigger |= 0x2000; | |
308 | break; | |
309 | case 4: | |
310 | dso_trigger |= 0xa000; | |
311 | break; | |
312 | case 5: | |
313 | dso_trigger |= 0x8000; | |
314 | break; | |
315 | default: | |
316 | case 0: | |
317 | break; | |
318 | } | |
319 | ||
320 | switch (ctx->trigger_outsrc) { | |
321 | case 1: | |
322 | dso_trigger |= 0x800; | |
323 | break; | |
324 | case 2: | |
325 | dso_trigger |= 0x1000; | |
326 | break; | |
327 | case 3: | |
328 | dso_trigger |= 0x1800; | |
329 | break; | |
330 | ||
331 | } | |
332 | ||
333 | ops[0] = mso_trans(5, ctx->la_trigger); | |
334 | ops[1] = mso_trans(6, ctx->la_trigger_mask); | |
335 | ops[2] = mso_trans(3, dso_trigger & 0xff); | |
336 | ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff); | |
337 | ops[4] = mso_trans(11, | |
338 | ctx->dso_trigger_width / SR_HZ_TO_NS(ctx->cur_rate)); | |
339 | ||
340 | /* Select the SPI/I2C trigger config bank */ | |
341 | ops[5] = mso_trans(REG_CTL2, (ctx->ctlbase2 | BITS_CTL2_BANK(2))); | |
342 | /* Configure the SPI/I2C protocol trigger */ | |
343 | ops[6] = mso_trans(REG_PT_WORD(0), ctx->protocol_trigger.word[0]); | |
344 | ops[7] = mso_trans(REG_PT_WORD(1), ctx->protocol_trigger.word[1]); | |
345 | ops[8] = mso_trans(REG_PT_WORD(2), ctx->protocol_trigger.word[2]); | |
346 | ops[9] = mso_trans(REG_PT_WORD(3), ctx->protocol_trigger.word[3]); | |
347 | ops[10] = mso_trans(REG_PT_MASK(0), ctx->protocol_trigger.mask[0]); | |
348 | ops[11] = mso_trans(REG_PT_MASK(1), ctx->protocol_trigger.mask[1]); | |
349 | ops[12] = mso_trans(REG_PT_MASK(2), ctx->protocol_trigger.mask[2]); | |
350 | ops[13] = mso_trans(REG_PT_MASK(3), ctx->protocol_trigger.mask[3]); | |
351 | ops[14] = mso_trans(REG_PT_SPIMODE, ctx->protocol_trigger.spimode); | |
352 | /* Select the default config bank */ | |
353 | ops[15] = mso_trans(REG_CTL2, ctx->ctlbase2); | |
354 | ||
355 | return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops)); | |
356 | } | |
357 | ||
358 | static int mso_configure_threshold_level(struct sr_dev_inst *sdi) | |
359 | { | |
360 | struct context *ctx = sdi->priv; | |
361 | ||
362 | return mso_dac_out(sdi, la_threshold_map[ctx->la_threshold]); | |
363 | } | |
364 | ||
365 | static int mso_parse_serial(const char *iSerial, const char *iProduct, | |
366 | struct context *ctx) | |
367 | { | |
368 | unsigned int u1, u2, u3, u4, u5, u6; | |
369 | ||
370 | iProduct = iProduct; | |
371 | /* FIXME: This code is in the original app, but I think its | |
372 | * used only for the GUI */ | |
373 | /* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03")) | |
374 | ctx->num_sample_rates = 0x16; | |
375 | else | |
376 | ctx->num_sample_rates = 0x10; */ | |
377 | ||
378 | /* parse iSerial */ | |
379 | if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u", | |
380 | &u1, &u2, &u3, &u4, &u5, &u6) != 6) | |
381 | return SR_ERR; | |
382 | ctx->hwmodel = u4; | |
383 | ctx->hwrev = u5; | |
384 | ctx->serial = u6; | |
385 | ctx->vbit = u1 / 10000; | |
386 | if (ctx->vbit == 0) | |
387 | ctx->vbit = 4.19195; | |
388 | ctx->dac_offset = u2; | |
389 | if (ctx->dac_offset == 0) | |
390 | ctx->dac_offset = 0x1ff; | |
391 | ctx->offset_range = u3; | |
392 | if (ctx->offset_range == 0) | |
393 | ctx->offset_range = 0x17d; | |
394 | ||
395 | /* | |
396 | * FIXME: There is more code on the original software to handle | |
397 | * bigger iSerial strings, but as I can't test on my device | |
398 | * I will not implement it yet | |
399 | */ | |
400 | ||
401 | return SR_OK; | |
402 | } | |
403 | ||
404 | static int hw_init(struct sr_context *sr_ctx) | |
405 | { | |
406 | /* Nothing to do. */ | |
407 | ||
408 | return SR_OK; | |
409 | } | |
410 | ||
411 | static int hw_scan(void) | |
412 | { | |
413 | struct sr_dev_inst *sdi; | |
414 | int devcnt = 0; | |
415 | struct udev *udev; | |
416 | struct udev_enumerate *enumerate; | |
417 | struct udev_list_entry *devs, *dev_list_entry; | |
418 | struct context *ctx; | |
419 | ||
420 | /* It's easier to map usb<->serial using udev */ | |
421 | /* | |
422 | * FIXME: On windows we can get the same information from the | |
423 | * registry, add an #ifdef here later | |
424 | */ | |
425 | udev = udev_new(); | |
426 | if (!udev) { | |
427 | sr_err("Failed to initialize udev."); | |
428 | goto ret; | |
429 | } | |
430 | enumerate = udev_enumerate_new(udev); | |
431 | udev_enumerate_add_match_subsystem(enumerate, "usb-serial"); | |
432 | udev_enumerate_scan_devices(enumerate); | |
433 | devs = udev_enumerate_get_list_entry(enumerate); | |
434 | udev_list_entry_foreach(dev_list_entry, devs) { | |
435 | const char *syspath, *sysname, *idVendor, *idProduct, | |
436 | *iSerial, *iProduct; | |
437 | char path[32], manufacturer[32], product[32], hwrev[32]; | |
438 | struct udev_device *dev, *parent; | |
439 | size_t s; | |
440 | ||
441 | syspath = udev_list_entry_get_name(dev_list_entry); | |
442 | dev = udev_device_new_from_syspath(udev, syspath); | |
443 | sysname = udev_device_get_sysname(dev); | |
444 | parent = udev_device_get_parent_with_subsystem_devtype( | |
445 | dev, "usb", "usb_device"); | |
446 | if (!parent) { | |
447 | sr_err("Unable to find parent usb device for %s", | |
448 | sysname); | |
449 | continue; | |
450 | } | |
451 | ||
452 | idVendor = udev_device_get_sysattr_value(parent, "idVendor"); | |
453 | idProduct = udev_device_get_sysattr_value(parent, "idProduct"); | |
454 | if (strcmp(USB_VENDOR, idVendor) | |
455 | || strcmp(USB_PRODUCT, idProduct)) | |
456 | continue; | |
457 | ||
458 | iSerial = udev_device_get_sysattr_value(parent, "serial"); | |
459 | iProduct = udev_device_get_sysattr_value(parent, "product"); | |
460 | ||
461 | snprintf(path, sizeof(path), "/dev/%s", sysname); | |
462 | ||
463 | s = strcspn(iProduct, " "); | |
464 | if (s > sizeof(product) || | |
465 | strlen(iProduct) - s > sizeof(manufacturer)) { | |
466 | sr_err("Could not parse iProduct: %s.", iProduct); | |
467 | continue; | |
468 | } | |
469 | strncpy(product, iProduct, s); | |
470 | product[s] = 0; | |
471 | strcpy(manufacturer, iProduct + s); | |
472 | ||
473 | if (!(ctx = g_try_malloc0(sizeof(struct context)))) { | |
474 | sr_err("Context malloc failed."); | |
475 | continue; /* TODO: Errors handled correctly? */ | |
476 | } | |
477 | ||
478 | if (mso_parse_serial(iSerial, iProduct, ctx) != SR_OK) { | |
479 | sr_err("Invalid iSerial: %s.", iSerial); | |
480 | goto err_free_ctx; | |
481 | } | |
482 | sprintf(hwrev, "r%d", ctx->hwrev); | |
483 | ||
484 | /* hardware initial state */ | |
485 | ctx->ctlbase1 = 0; | |
486 | { | |
487 | /* Initialize the protocol trigger configuration */ | |
488 | int i; | |
489 | for (i = 0; i < 4; i++) { | |
490 | ctx->protocol_trigger.word[i] = 0; | |
491 | ctx->protocol_trigger.mask[i] = 0xff; | |
492 | } | |
493 | ctx->protocol_trigger.spimode = 0; | |
494 | } | |
495 | ||
496 | sdi = sr_dev_inst_new(devcnt, SR_ST_INITIALIZING, | |
497 | manufacturer, product, hwrev); | |
498 | if (!sdi) { | |
499 | sr_err("Unable to create device instance for %s", | |
500 | sysname); | |
501 | goto err_free_ctx; | |
502 | } | |
503 | ||
504 | /* save a pointer to our private instance data */ | |
505 | sdi->priv = ctx; | |
506 | ||
507 | sdi->serial = sr_serial_dev_inst_new(path, -1); | |
508 | if (!sdi->serial) | |
509 | goto err_dev_inst_free; | |
510 | ||
511 | dev_insts = g_slist_append(dev_insts, sdi); | |
512 | devcnt++; | |
513 | continue; | |
514 | ||
515 | err_dev_inst_free: | |
516 | sr_dev_inst_free(sdi); | |
517 | err_free_ctx: | |
518 | g_free(ctx); | |
519 | } | |
520 | ||
521 | udev_enumerate_unref(enumerate); | |
522 | udev_unref(udev); | |
523 | ||
524 | ret: | |
525 | return devcnt; | |
526 | } | |
527 | ||
528 | static int hw_cleanup(void) | |
529 | { | |
530 | GSList *l; | |
531 | struct sr_dev_inst *sdi; | |
532 | int ret; | |
533 | ||
534 | ret = SR_OK; | |
535 | /* Properly close all devices. */ | |
536 | for (l = dev_insts; l; l = l->next) { | |
537 | if (!(sdi = l->data)) { | |
538 | /* Log error, but continue cleaning up the rest. */ | |
539 | sr_err("%s: sdi was NULL, continuing", __func__); | |
540 | ret = SR_ERR_BUG; | |
541 | continue; | |
542 | } | |
543 | if (sdi->serial->fd != -1) | |
544 | serial_close(sdi->serial->fd); | |
545 | sr_dev_inst_free(sdi); | |
546 | } | |
547 | g_slist_free(dev_insts); | |
548 | dev_insts = NULL; | |
549 | ||
550 | return ret; | |
551 | } | |
552 | ||
553 | static int hw_dev_open(int dev_index) | |
554 | { | |
555 | struct sr_dev_inst *sdi; | |
556 | struct context *ctx; | |
557 | int ret = SR_ERR; | |
558 | ||
559 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
560 | return ret; | |
561 | ||
562 | ctx = sdi->priv; | |
563 | sdi->serial->fd = serial_open(sdi->serial->port, SERIAL_RDWR); | |
564 | if (sdi->serial->fd == -1) | |
565 | return ret; | |
566 | ||
567 | ret = serial_set_params(sdi->serial->fd, 460800, 8, 0, 1, 2); | |
568 | if (ret != SR_OK) | |
569 | return ret; | |
570 | ||
571 | sdi->status = SR_ST_ACTIVE; | |
572 | ||
573 | /* FIXME: discard serial buffer */ | |
574 | ||
575 | mso_check_trigger(sdi, &ctx->trigger_state); | |
576 | sr_dbg("Trigger state: 0x%x.", ctx->trigger_state); | |
577 | ||
578 | ret = mso_reset_adc(sdi); | |
579 | if (ret != SR_OK) | |
580 | return ret; | |
581 | ||
582 | mso_check_trigger(sdi, &ctx->trigger_state); | |
583 | sr_dbg("Trigger state: 0x%x.", ctx->trigger_state); | |
584 | ||
585 | // ret = mso_reset_fsm(sdi); | |
586 | // if (ret != SR_OK) | |
587 | // return ret; | |
588 | ||
589 | // return SR_ERR; | |
590 | return SR_OK; | |
591 | } | |
592 | ||
593 | static int hw_dev_close(int dev_index) | |
594 | { | |
595 | struct sr_dev_inst *sdi; | |
596 | ||
597 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) { | |
598 | sr_err("%s: sdi was NULL", __func__); | |
599 | return SR_ERR_BUG; | |
600 | } | |
601 | ||
602 | /* TODO */ | |
603 | if (sdi->serial->fd != -1) { | |
604 | serial_close(sdi->serial->fd); | |
605 | sdi->serial->fd = -1; | |
606 | sdi->status = SR_ST_INACTIVE; | |
607 | } | |
608 | ||
609 | return SR_OK; | |
610 | } | |
611 | ||
612 | static const void *hw_dev_info_get(int dev_index, int dev_info_id) | |
613 | { | |
614 | struct sr_dev_inst *sdi; | |
615 | struct context *ctx; | |
616 | const void *info = NULL; | |
617 | ||
618 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
619 | return NULL; | |
620 | ctx = sdi->priv; | |
621 | ||
622 | switch (dev_info_id) { | |
623 | case SR_DI_INST: | |
624 | info = sdi; | |
625 | break; | |
626 | case SR_DI_NUM_PROBES: /* FIXME: How to report analog probe? */ | |
627 | info = GINT_TO_POINTER(NUM_PROBES); | |
628 | break; | |
629 | case SR_DI_PROBE_NAMES: | |
630 | info = probe_names; | |
631 | break; | |
632 | case SR_DI_SAMPLERATES: | |
633 | info = &samplerates; | |
634 | break; | |
635 | case SR_DI_TRIGGER_TYPES: | |
636 | info = "01"; /* FIXME */ | |
637 | break; | |
638 | case SR_DI_CUR_SAMPLERATE: | |
639 | info = &ctx->cur_rate; | |
640 | break; | |
641 | } | |
642 | return info; | |
643 | } | |
644 | ||
645 | static int hw_dev_status_get(int dev_index) | |
646 | { | |
647 | struct sr_dev_inst *sdi; | |
648 | ||
649 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
650 | return SR_ST_NOT_FOUND; | |
651 | ||
652 | return sdi->status; | |
653 | } | |
654 | ||
655 | static const int *hw_hwcap_get_all(void) | |
656 | { | |
657 | return hwcaps; | |
658 | } | |
659 | ||
660 | static int hw_dev_config_set(int dev_index, int hwcap, const void *value) | |
661 | { | |
662 | struct sr_dev_inst *sdi; | |
663 | ||
664 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
665 | return SR_ERR; | |
666 | ||
667 | switch (hwcap) { | |
668 | case SR_HWCAP_SAMPLERATE: | |
669 | return mso_configure_rate(sdi, *(const uint64_t *) value); | |
670 | case SR_HWCAP_PROBECONFIG: | |
671 | case SR_HWCAP_LIMIT_SAMPLES: | |
672 | default: | |
673 | return SR_OK; /* FIXME */ | |
674 | } | |
675 | } | |
676 | ||
677 | #define MSO_TRIGGER_UNKNOWN '!' | |
678 | #define MSO_TRIGGER_UNKNOWN1 '1' | |
679 | #define MSO_TRIGGER_UNKNOWN2 '2' | |
680 | #define MSO_TRIGGER_UNKNOWN3 '3' | |
681 | #define MSO_TRIGGER_WAIT '4' | |
682 | #define MSO_TRIGGER_FIRED '5' | |
683 | #define MSO_TRIGGER_DATAREADY '6' | |
684 | ||
685 | /* FIXME: Pass errors? */ | |
686 | static int receive_data(int fd, int revents, void *cb_data) | |
687 | { | |
688 | struct sr_dev_inst *sdi = cb_data; | |
689 | struct context *ctx = sdi->priv; | |
690 | struct sr_datafeed_packet packet; | |
691 | struct sr_datafeed_logic logic; | |
692 | uint8_t in[1024], logic_out[1024]; | |
693 | double analog_out[1024]; | |
694 | size_t i, s; | |
695 | ||
696 | (void)revents; | |
697 | ||
698 | s = serial_read(fd, in, sizeof(in)); | |
699 | if (s <= 0) | |
700 | return FALSE; | |
701 | ||
702 | /* No samples */ | |
703 | if (ctx->trigger_state != MSO_TRIGGER_DATAREADY) { | |
704 | ctx->trigger_state = in[0]; | |
705 | if (ctx->trigger_state == MSO_TRIGGER_DATAREADY) { | |
706 | mso_read_buffer(sdi); | |
707 | ctx->buffer_n = 0; | |
708 | } else { | |
709 | mso_check_trigger(sdi, NULL); | |
710 | } | |
711 | return FALSE; | |
712 | } | |
713 | ||
714 | /* the hardware always dumps 1024 samples, 24bits each */ | |
715 | if (ctx->buffer_n < 3072) { | |
716 | memcpy(ctx->buffer + ctx->buffer_n, in, s); | |
717 | ctx->buffer_n += s; | |
718 | } | |
719 | if (ctx->buffer_n < 3072) | |
720 | return FALSE; | |
721 | ||
722 | /* do the conversion */ | |
723 | for (i = 0; i < 1024; i++) { | |
724 | /* FIXME: Need to do conversion to mV */ | |
725 | analog_out[i] = (ctx->buffer[i * 3] & 0x3f) | | |
726 | ((ctx->buffer[i * 3 + 1] & 0xf) << 6); | |
727 | logic_out[i] = ((ctx->buffer[i * 3 + 1] & 0x30) >> 4) | | |
728 | ((ctx->buffer[i * 3 + 2] & 0x3f) << 2); | |
729 | } | |
730 | ||
731 | packet.type = SR_DF_LOGIC; | |
732 | packet.payload = &logic; | |
733 | logic.length = 1024; | |
734 | logic.unitsize = 1; | |
735 | logic.data = logic_out; | |
736 | sr_session_send(ctx->session_dev_id, &packet); | |
737 | ||
738 | // Dont bother fixing this yet, keep it "old style" | |
739 | /* | |
740 | packet.type = SR_DF_ANALOG; | |
741 | packet.length = 1024; | |
742 | packet.unitsize = sizeof(double); | |
743 | packet.payload = analog_out; | |
744 | sr_session_send(ctx->session_dev_id, &packet); | |
745 | */ | |
746 | ||
747 | packet.type = SR_DF_END; | |
748 | sr_session_send(ctx->session_dev_id, &packet); | |
749 | ||
750 | return TRUE; | |
751 | } | |
752 | ||
753 | static int hw_dev_acquisition_start(int dev_index, void *cb_data) | |
754 | { | |
755 | struct sr_dev_inst *sdi; | |
756 | struct context *ctx; | |
757 | struct sr_datafeed_packet packet; | |
758 | struct sr_datafeed_header header; | |
759 | int ret = SR_ERR; | |
760 | ||
761 | if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) | |
762 | return ret; | |
763 | ctx = sdi->priv; | |
764 | ||
765 | /* FIXME: No need to do full reconfigure every time */ | |
766 | // ret = mso_reset_fsm(sdi); | |
767 | // if (ret != SR_OK) | |
768 | // return ret; | |
769 | ||
770 | /* FIXME: ACDC Mode */ | |
771 | ctx->ctlbase1 &= 0x7f; | |
772 | // ctx->ctlbase1 |= ctx->acdcmode; | |
773 | ||
774 | ret = mso_configure_rate(sdi, ctx->cur_rate); | |
775 | if (ret != SR_OK) | |
776 | return ret; | |
777 | ||
778 | /* set dac offset */ | |
779 | ret = mso_dac_out(sdi, ctx->dac_offset); | |
780 | if (ret != SR_OK) | |
781 | return ret; | |
782 | ||
783 | ret = mso_configure_threshold_level(sdi); | |
784 | if (ret != SR_OK) | |
785 | return ret; | |
786 | ||
787 | ret = mso_configure_trigger(sdi); | |
788 | if (ret != SR_OK) | |
789 | return ret; | |
790 | ||
791 | /* FIXME: trigger_position */ | |
792 | ||
793 | ||
794 | /* END of config hardware part */ | |
795 | ||
796 | /* with trigger */ | |
797 | ret = mso_arm(sdi); | |
798 | if (ret != SR_OK) | |
799 | return ret; | |
800 | ||
801 | /* without trigger */ | |
802 | // ret = mso_force_capture(sdi); | |
803 | // if (ret != SR_OK) | |
804 | // return ret; | |
805 | ||
806 | mso_check_trigger(sdi, &ctx->trigger_state); | |
807 | ret = mso_check_trigger(sdi, NULL); | |
808 | if (ret != SR_OK) | |
809 | return ret; | |
810 | ||
811 | ctx->session_dev_id = cb_data; | |
812 | sr_source_add(sdi->serial->fd, G_IO_IN, -1, receive_data, sdi); | |
813 | ||
814 | packet.type = SR_DF_HEADER; | |
815 | packet.payload = (unsigned char *) &header; | |
816 | header.feed_version = 1; | |
817 | gettimeofday(&header.starttime, NULL); | |
818 | header.samplerate = ctx->cur_rate; | |
819 | // header.num_analog_probes = 1; | |
820 | header.num_logic_probes = 8; | |
821 | sr_session_send(ctx->session_dev_id, &packet); | |
822 | ||
823 | return ret; | |
824 | } | |
825 | ||
826 | /* TODO: This stops acquisition on ALL devices, ignoring dev_index. */ | |
827 | static int hw_dev_acquisition_stop(int dev_index, void *cb_data) | |
828 | { | |
829 | struct sr_datafeed_packet packet; | |
830 | ||
831 | (void)dev_index; | |
832 | ||
833 | packet.type = SR_DF_END; | |
834 | sr_session_send(cb_data, &packet); | |
835 | ||
836 | return SR_OK; | |
837 | } | |
838 | ||
839 | SR_PRIV struct sr_dev_driver link_mso19_driver_info = { | |
840 | .name = "link-mso19", | |
841 | .longname = "Link Instruments MSO-19", | |
842 | .api_version = 1, | |
843 | .init = hw_init, | |
844 | .cleanup = hw_cleanup, | |
845 | .scan = hw_scan, | |
846 | .dev_open = hw_dev_open, | |
847 | .dev_close = hw_dev_close, | |
848 | .dev_info_get = hw_dev_info_get, | |
849 | .dev_status_get = hw_dev_status_get, | |
850 | .hwcap_get_all = hw_hwcap_get_all, | |
851 | .dev_config_set = hw_dev_config_set, | |
852 | .dev_acquisition_start = hw_dev_acquisition_start, | |
853 | .dev_acquisition_stop = hw_dev_acquisition_stop, | |
854 | }; |