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sr: Fix/document probe names.
[libsigrok.git] / hardware / link-mso19 / link-mso19.c
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1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2011 Daniel Ribeiro <drwyrm@gmail.com>
5 * Copyright (C) 2012 Renato Caldas <rmsc@fe.up.pt>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <stdio.h>
22#include <stdlib.h>
23#include <string.h>
24#include <unistd.h>
25#include <fcntl.h>
26#include <sys/time.h>
27#include <inttypes.h>
28#include <glib.h>
29#include <libudev.h>
30#include <arpa/inet.h>
31#include "sigrok.h"
32#include "sigrok-internal.h"
33#include "link-mso19.h"
34
35#define USB_VENDOR "3195"
36#define USB_PRODUCT "f190"
37
38#define NUM_PROBES 8
39
40static int hwcaps[] = {
41 SR_HWCAP_LOGIC_ANALYZER,
42// SR_HWCAP_OSCILLOSCOPE,
43// SR_HWCAP_PAT_GENERATOR,
44
45 SR_HWCAP_SAMPLERATE,
46// SR_HWCAP_CAPTURE_RATIO,
47 SR_HWCAP_LIMIT_SAMPLES,
48 0,
49};
50
51/*
52 * Probes are numbered 0 to 7.
53 *
54 * See also: http://www.linkinstruments.com/images/mso19_1113.gif
55 */
56static const char *probe_names[NUM_PROBES + 1] = {
57 "0",
58 "1",
59 "2",
60 "3",
61 "4",
62 "5",
63 "6",
64 "7",
65 NULL,
66};
67
68static uint64_t supported_samplerates[] = {
69 SR_HZ(100),
70 SR_HZ(200),
71 SR_HZ(500),
72 SR_KHZ(1),
73 SR_KHZ(2),
74 SR_KHZ(5),
75 SR_KHZ(10),
76 SR_KHZ(20),
77 SR_KHZ(50),
78 SR_KHZ(100),
79 SR_KHZ(200),
80 SR_KHZ(500),
81 SR_MHZ(1),
82 SR_MHZ(2),
83 SR_MHZ(5),
84 SR_MHZ(10),
85 SR_MHZ(20),
86 SR_MHZ(50),
87 SR_MHZ(100),
88 SR_MHZ(200),
89 0,
90};
91
92static struct sr_samplerates samplerates = {
93 SR_HZ(100),
94 SR_MHZ(200),
95 SR_HZ(0),
96 supported_samplerates,
97};
98
99static GSList *dev_insts = NULL;
100
101static int mso_send_control_message(struct sr_dev_inst *sdi,
102 uint16_t payload[], int n)
103{
104 int fd = sdi->serial->fd;
105 int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
106 char *p, *buf;
107
108 ret = SR_ERR;
109
110 if (fd < 0)
111 goto ret;
112
113 if (!(buf = g_try_malloc(s))) {
114 sr_err("mso19: %s: buf malloc failed", __func__);
115 ret = SR_ERR_MALLOC;
116 goto ret;
117 }
118
119 p = buf;
120 memcpy(p, mso_head, sizeof(mso_head));
121 p += sizeof(mso_head);
122
123 for (i = 0; i < n; i++) {
124 *(uint16_t *) p = htons(payload[i]);
125 p += 2;
126 }
127 memcpy(p, mso_foot, sizeof(mso_foot));
128
129 w = 0;
130 while (w < s) {
131 ret = serial_write(fd, buf + w, s - w);
132 if (ret < 0) {
133 ret = SR_ERR;
134 goto free;
135 }
136 w += ret;
137 }
138 ret = SR_OK;
139free:
140 g_free(buf);
141ret:
142 return ret;
143}
144
145static int mso_reset_adc(struct sr_dev_inst *sdi)
146{
147 struct context *ctx = sdi->priv;
148 uint16_t ops[2];
149
150 ops[0] = mso_trans(REG_CTL1, (ctx->ctlbase1 | BIT_CTL1_RESETADC));
151 ops[1] = mso_trans(REG_CTL1, ctx->ctlbase1);
152 ctx->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4;
153
154 sr_dbg("mso19: Requesting ADC reset");
155 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
156}
157
158static int mso_reset_fsm(struct sr_dev_inst *sdi)
159{
160 struct context *ctx = sdi->priv;
161 uint16_t ops[1];
162
163 ctx->ctlbase1 |= BIT_CTL1_RESETFSM;
164 ops[0] = mso_trans(REG_CTL1, ctx->ctlbase1);
165
166 sr_dbg("mso19: Requesting ADC reset");
167 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
168}
169
170static int mso_toggle_led(struct sr_dev_inst *sdi, int state)
171{
172 struct context *ctx = sdi->priv;
173 uint16_t ops[1];
174
175 ctx->ctlbase1 &= ~BIT_CTL1_LED;
176 if (state)
177 ctx->ctlbase1 |= BIT_CTL1_LED;
178 ops[0] = mso_trans(REG_CTL1, ctx->ctlbase1);
179
180 sr_dbg("mso19: Requesting LED toggle");
181 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
182}
183
184static int mso_check_trigger(struct sr_dev_inst *sdi, uint8_t *info)
185{
186 uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
187 char buf[1];
188 int ret;
189
190 sr_dbg("mso19: Requesting trigger state");
191 ret = mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
192 if (info == NULL || ret != SR_OK)
193 return ret;
194
195 buf[0] = 0;
196 if (serial_read(sdi->serial->fd, buf, 1) != 1) /* FIXME: Need timeout */
197 ret = SR_ERR;
198 *info = buf[0];
199
200 sr_dbg("mso19: Trigger state is: 0x%x", *info);
201 return ret;
202}
203
204static int mso_read_buffer(struct sr_dev_inst *sdi)
205{
206 uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
207
208 sr_dbg("mso19: Requesting buffer dump");
209 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
210}
211
212static int mso_arm(struct sr_dev_inst *sdi)
213{
214 struct context *ctx = sdi->priv;
215 uint16_t ops[] = {
216 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_RESETFSM),
217 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_ARM),
218 mso_trans(REG_CTL1, ctx->ctlbase1),
219 };
220
221 sr_dbg("mso19: Requesting trigger arm");
222 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
223}
224
225static int mso_force_capture(struct sr_dev_inst *sdi)
226{
227 struct context *ctx = sdi->priv;
228 uint16_t ops[] = {
229 mso_trans(REG_CTL1, ctx->ctlbase1 | 8),
230 mso_trans(REG_CTL1, ctx->ctlbase1),
231 };
232
233 sr_dbg("mso19: Requesting forced capture");
234 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
235}
236
237static int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
238{
239 struct context *ctx = sdi->priv;
240 uint16_t ops[] = {
241 mso_trans(REG_DAC1, (val >> 8) & 0xff),
242 mso_trans(REG_DAC2, val & 0xff),
243 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_RESETADC),
244 };
245
246 sr_dbg("mso19: Setting dac word to 0x%x", val);
247 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
248}
249
250static int mso_clkrate_out(struct sr_dev_inst *sdi, uint16_t val)
251{
252 uint16_t ops[] = {
253 mso_trans(REG_CLKRATE1, (val >> 8) & 0xff),
254 mso_trans(REG_CLKRATE2, val & 0xff),
255 };
256
257 sr_dbg("mso19: Setting clkrate word to 0x%x", val);
258 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
259}
260
261static int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
262{
263 struct context *ctx = sdi->priv;
264 unsigned int i;
265 int ret = SR_ERR;
266
267 for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
268 if (rate_map[i].rate == rate) {
269 ctx->ctlbase2 = rate_map[i].slowmode;
270 ret = mso_clkrate_out(sdi, rate_map[i].val);
271 if (ret == SR_OK)
272 ctx->cur_rate = rate;
273 return ret;
274 }
275 }
276 return ret;
277}
278
279static inline uint16_t mso_calc_raw_from_mv(struct context *ctx)
280{
281 return (uint16_t) (0x200 -
282 ((ctx->dso_trigger_voltage / ctx->dso_probe_attn) /
283 ctx->vbit));
284}
285
286static int mso_configure_trigger(struct sr_dev_inst *sdi)
287{
288 struct context *ctx = sdi->priv;
289 uint16_t ops[16];
290 uint16_t dso_trigger = mso_calc_raw_from_mv(ctx);
291
292 dso_trigger &= 0x3ff;
293 if ((!ctx->trigger_slope && ctx->trigger_chan == 1) ||
294 (ctx->trigger_slope &&
295 (ctx->trigger_chan == 0 ||
296 ctx->trigger_chan == 2 ||
297 ctx->trigger_chan == 3)))
298 dso_trigger |= 0x400;
299
300 switch (ctx->trigger_chan) {
301 case 1:
302 dso_trigger |= 0xe000;
303 case 2:
304 dso_trigger |= 0x4000;
305 break;
306 case 3:
307 dso_trigger |= 0x2000;
308 break;
309 case 4:
310 dso_trigger |= 0xa000;
311 break;
312 case 5:
313 dso_trigger |= 0x8000;
314 break;
315 default:
316 case 0:
317 break;
318 }
319
320 switch (ctx->trigger_outsrc) {
321 case 1:
322 dso_trigger |= 0x800;
323 break;
324 case 2:
325 dso_trigger |= 0x1000;
326 break;
327 case 3:
328 dso_trigger |= 0x1800;
329 break;
330
331 }
332
333 ops[0] = mso_trans(5, ctx->la_trigger);
334 ops[1] = mso_trans(6, ctx->la_trigger_mask);
335 ops[2] = mso_trans(3, dso_trigger & 0xff);
336 ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
337 ops[4] = mso_trans(11,
338 ctx->dso_trigger_width / SR_HZ_TO_NS(ctx->cur_rate));
339
340 /* Select the SPI/I2C trigger config bank */
341 ops[5] = mso_trans(REG_CTL2, (ctx->ctlbase2 | BITS_CTL2_BANK(2)));
342 /* Configure the SPI/I2C protocol trigger */
343 ops[6] = mso_trans(REG_PT_WORD(0), ctx->protocol_trigger.word[0]);
344 ops[7] = mso_trans(REG_PT_WORD(1), ctx->protocol_trigger.word[1]);
345 ops[8] = mso_trans(REG_PT_WORD(2), ctx->protocol_trigger.word[2]);
346 ops[9] = mso_trans(REG_PT_WORD(3), ctx->protocol_trigger.word[3]);
347 ops[10] = mso_trans(REG_PT_MASK(0), ctx->protocol_trigger.mask[0]);
348 ops[11] = mso_trans(REG_PT_MASK(1), ctx->protocol_trigger.mask[1]);
349 ops[12] = mso_trans(REG_PT_MASK(2), ctx->protocol_trigger.mask[2]);
350 ops[13] = mso_trans(REG_PT_MASK(3), ctx->protocol_trigger.mask[3]);
351 ops[14] = mso_trans(REG_PT_SPIMODE, ctx->protocol_trigger.spimode);
352 /* Select the default config bank */
353 ops[15] = mso_trans(REG_CTL2, ctx->ctlbase2);
354
355 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
356}
357
358static int mso_configure_threshold_level(struct sr_dev_inst *sdi)
359{
360 struct context *ctx = sdi->priv;
361
362 return mso_dac_out(sdi, la_threshold_map[ctx->la_threshold]);
363}
364
365static int mso_parse_serial(const char *iSerial, const char *iProduct,
366 struct context *ctx)
367{
368 unsigned int u1, u2, u3, u4, u5, u6;
369
370 iProduct = iProduct;
371 /* FIXME: This code is in the original app, but I think its
372 * used only for the GUI */
373/* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
374 ctx->num_sample_rates = 0x16;
375 else
376 ctx->num_sample_rates = 0x10; */
377
378 /* parse iSerial */
379 if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
380 &u1, &u2, &u3, &u4, &u5, &u6) != 6)
381 return SR_ERR;
382 ctx->hwmodel = u4;
383 ctx->hwrev = u5;
384 ctx->serial = u6;
385 ctx->vbit = u1 / 10000;
386 if (ctx->vbit == 0)
387 ctx->vbit = 4.19195;
388 ctx->dac_offset = u2;
389 if (ctx->dac_offset == 0)
390 ctx->dac_offset = 0x1ff;
391 ctx->offset_range = u3;
392 if (ctx->offset_range == 0)
393 ctx->offset_range = 0x17d;
394
395 /*
396 * FIXME: There is more code on the original software to handle
397 * bigger iSerial strings, but as I can't test on my device
398 * I will not implement it yet
399 */
400
401 return SR_OK;
402}
403
404static int hw_init(const char *devinfo)
405{
406 struct sr_dev_inst *sdi;
407 int devcnt = 0;
408 struct udev *udev;
409 struct udev_enumerate *enumerate;
410 struct udev_list_entry *devs, *dev_list_entry;
411 struct context *ctx;
412
413 devinfo = devinfo;
414
415 /* It's easier to map usb<->serial using udev */
416 /*
417 * FIXME: On windows we can get the same information from the
418 * registry, add an #ifdef here later
419 */
420 udev = udev_new();
421 if (!udev) {
422 sr_err("mso19: Failed to initialize udev.");
423 goto ret;
424 }
425 enumerate = udev_enumerate_new(udev);
426 udev_enumerate_add_match_subsystem(enumerate, "usb-serial");
427 udev_enumerate_scan_devices(enumerate);
428 devs = udev_enumerate_get_list_entry(enumerate);
429 udev_list_entry_foreach(dev_list_entry, devs) {
430 const char *syspath, *sysname, *idVendor, *idProduct,
431 *iSerial, *iProduct;
432 char path[32], manufacturer[32], product[32], hwrev[32];
433 struct udev_device *dev, *parent;
434 size_t s;
435
436 syspath = udev_list_entry_get_name(dev_list_entry);
437 dev = udev_device_new_from_syspath(udev, syspath);
438 sysname = udev_device_get_sysname(dev);
439 parent = udev_device_get_parent_with_subsystem_devtype(
440 dev, "usb", "usb_device");
441 if (!parent) {
442 sr_err("mso19: Unable to find parent usb device for %s",
443 sysname);
444 continue;
445 }
446
447 idVendor = udev_device_get_sysattr_value(parent, "idVendor");
448 idProduct = udev_device_get_sysattr_value(parent, "idProduct");
449 if (strcmp(USB_VENDOR, idVendor)
450 || strcmp(USB_PRODUCT, idProduct))
451 continue;
452
453 iSerial = udev_device_get_sysattr_value(parent, "serial");
454 iProduct = udev_device_get_sysattr_value(parent, "product");
455
456 snprintf(path, sizeof(path), "/dev/%s", sysname);
457
458 s = strcspn(iProduct, " ");
459 if (s > sizeof(product) ||
460 strlen(iProduct) - s > sizeof(manufacturer)) {
461 sr_err("mso19: Could not parse iProduct: %s", iProduct);
462 continue;
463 }
464 strncpy(product, iProduct, s);
465 product[s] = 0;
466 strcpy(manufacturer, iProduct + s);
467
468 if (!(ctx = g_try_malloc0(sizeof(struct context)))) {
469 sr_err("mso19: %s: ctx malloc failed", __func__);
470 continue; /* TODO: Errors handled correctly? */
471 }
472
473 if (mso_parse_serial(iSerial, iProduct, ctx) != SR_OK) {
474 sr_err("mso19: Invalid iSerial: %s", iSerial);
475 goto err_free_ctx;
476 }
477 sprintf(hwrev, "r%d", ctx->hwrev);
478
479 /* hardware initial state */
480 ctx->ctlbase1 = 0;
481 {
482 /* Initialize the protocol trigger configuration */
483 int i;
484 for (i = 0; i < 4; i++) {
485 ctx->protocol_trigger.word[i] = 0;
486 ctx->protocol_trigger.mask[i] = 0xff;
487 }
488 ctx->protocol_trigger.spimode = 0;
489 }
490
491 sdi = sr_dev_inst_new(devcnt, SR_ST_INITIALIZING,
492 manufacturer, product, hwrev);
493 if (!sdi) {
494 sr_err("mso19: Unable to create device instance for %s",
495 sysname);
496 goto err_free_ctx;
497 }
498
499 /* save a pointer to our private instance data */
500 sdi->priv = ctx;
501
502 sdi->serial = sr_serial_dev_inst_new(path, -1);
503 if (!sdi->serial)
504 goto err_dev_inst_free;
505
506 dev_insts = g_slist_append(dev_insts, sdi);
507 devcnt++;
508 continue;
509
510err_dev_inst_free:
511 sr_dev_inst_free(sdi);
512err_free_ctx:
513 g_free(ctx);
514 }
515
516 udev_enumerate_unref(enumerate);
517 udev_unref(udev);
518
519ret:
520 return devcnt;
521}
522
523static int hw_cleanup(void)
524{
525 GSList *l;
526 struct sr_dev_inst *sdi;
527 int ret;
528
529 ret = SR_OK;
530 /* Properly close all devices. */
531 for (l = dev_insts; l; l = l->next) {
532 if (!(sdi = l->data)) {
533 /* Log error, but continue cleaning up the rest. */
534 sr_err("mso19: %s: sdi was NULL, continuing", __func__);
535 ret = SR_ERR_BUG;
536 continue;
537 }
538 if (sdi->serial->fd != -1)
539 serial_close(sdi->serial->fd);
540 sr_dev_inst_free(sdi);
541 }
542 g_slist_free(dev_insts);
543 dev_insts = NULL;
544
545 return ret;
546}
547
548static int hw_dev_open(int dev_index)
549{
550 struct sr_dev_inst *sdi;
551 struct context *ctx;
552 int ret = SR_ERR;
553
554 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
555 return ret;
556
557 ctx = sdi->priv;
558 sdi->serial->fd = serial_open(sdi->serial->port, O_RDWR);
559 if (sdi->serial->fd == -1)
560 return ret;
561
562 ret = serial_set_params(sdi->serial->fd, 460800, 8, 0, 1, 2);
563 if (ret != SR_OK)
564 return ret;
565
566 sdi->status = SR_ST_ACTIVE;
567
568 /* FIXME: discard serial buffer */
569
570 mso_check_trigger(sdi, &ctx->trigger_state);
571 sr_dbg("mso19: trigger state: 0x%x", ctx->trigger_state);
572
573 ret = mso_reset_adc(sdi);
574 if (ret != SR_OK)
575 return ret;
576
577 mso_check_trigger(sdi, &ctx->trigger_state);
578 sr_dbg("mso19: trigger state: 0x%x", ctx->trigger_state);
579
580// ret = mso_reset_fsm(sdi);
581// if (ret != SR_OK)
582// return ret;
583
584 sr_dbg("mso19: Finished %s", __func__);
585
586// return SR_ERR;
587 return SR_OK;
588}
589
590static int hw_dev_close(int dev_index)
591{
592 struct sr_dev_inst *sdi;
593
594 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
595 sr_err("mso19: %s: sdi was NULL", __func__);
596 return SR_ERR; /* TODO: SR_ERR_ARG? */
597 }
598
599 /* TODO */
600 if (sdi->serial->fd != -1) {
601 serial_close(sdi->serial->fd);
602 sdi->serial->fd = -1;
603 sdi->status = SR_ST_INACTIVE;
604 }
605
606 sr_dbg("mso19: finished %s", __func__);
607 return SR_OK;
608}
609
610static void *hw_dev_info_get(int dev_index, int dev_info_id)
611{
612 struct sr_dev_inst *sdi;
613 struct context *ctx;
614 void *info = NULL;
615
616 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
617 return NULL;
618 ctx = sdi->priv;
619
620 switch (dev_info_id) {
621 case SR_DI_INST:
622 info = sdi;
623 break;
624 case SR_DI_NUM_PROBES: /* FIXME: How to report analog probe? */
625 info = GINT_TO_POINTER(NUM_PROBES);
626 break;
627 case SR_DI_PROBE_NAMES:
628 info = probe_names;
629 break;
630 case SR_DI_SAMPLERATES:
631 info = &samplerates;
632 break;
633 case SR_DI_TRIGGER_TYPES:
634 info = "01"; /* FIXME */
635 break;
636 case SR_DI_CUR_SAMPLERATE:
637 info = &ctx->cur_rate;
638 break;
639 }
640 return info;
641}
642
643static int hw_dev_status_get(int dev_index)
644{
645 struct sr_dev_inst *sdi;
646
647 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
648 return SR_ST_NOT_FOUND;
649
650 return sdi->status;
651}
652
653static int *hw_hwcap_get_all(void)
654{
655 return hwcaps;
656}
657
658static int hw_dev_config_set(int dev_index, int hwcap, void *value)
659{
660 struct sr_dev_inst *sdi;
661
662 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
663 return SR_ERR;
664
665 switch (hwcap) {
666 case SR_HWCAP_SAMPLERATE:
667 return mso_configure_rate(sdi, *(uint64_t *) value);
668 case SR_HWCAP_PROBECONFIG:
669 case SR_HWCAP_LIMIT_SAMPLES:
670 default:
671 return SR_OK; /* FIXME */
672 }
673}
674
675#define MSO_TRIGGER_UNKNOWN '!'
676#define MSO_TRIGGER_UNKNOWN1 '1'
677#define MSO_TRIGGER_UNKNOWN2 '2'
678#define MSO_TRIGGER_UNKNOWN3 '3'
679#define MSO_TRIGGER_WAIT '4'
680#define MSO_TRIGGER_FIRED '5'
681#define MSO_TRIGGER_DATAREADY '6'
682
683/* FIXME: Pass errors? */
684static int receive_data(int fd, int revents, void *user_data)
685{
686 struct sr_dev_inst *sdi = user_data;
687 struct context *ctx = sdi->priv;
688 struct sr_datafeed_packet packet;
689 struct sr_datafeed_logic logic;
690 uint8_t in[1024], logic_out[1024];
691 double analog_out[1024];
692 size_t i, s;
693
694 revents = revents;
695
696 s = serial_read(fd, in, sizeof(in));
697 if (s <= 0)
698 return FALSE;
699
700 /* No samples */
701 if (ctx->trigger_state != MSO_TRIGGER_DATAREADY) {
702 ctx->trigger_state = in[0];
703 if (ctx->trigger_state == MSO_TRIGGER_DATAREADY) {
704 mso_read_buffer(sdi);
705 ctx->buffer_n = 0;
706 } else {
707 mso_check_trigger(sdi, NULL);
708 }
709 return FALSE;
710 }
711
712 /* the hardware always dumps 1024 samples, 24bits each */
713 if (ctx->buffer_n < 3072) {
714 memcpy(ctx->buffer + ctx->buffer_n, in, s);
715 ctx->buffer_n += s;
716 }
717 if (ctx->buffer_n < 3072)
718 return FALSE;
719
720 /* do the conversion */
721 for (i = 0; i < 1024; i++) {
722 /* FIXME: Need to do conversion to mV */
723 analog_out[i] = (ctx->buffer[i * 3] & 0x3f) |
724 ((ctx->buffer[i * 3 + 1] & 0xf) << 6);
725 logic_out[i] = ((ctx->buffer[i * 3 + 1] & 0x30) >> 4) |
726 ((ctx->buffer[i * 3 + 2] & 0x3f) << 2);
727 }
728
729 packet.type = SR_DF_LOGIC;
730 packet.payload = &logic;
731 logic.length = 1024;
732 logic.unitsize = 1;
733 logic.data = logic_out;
734 sr_session_bus(ctx->session_id, &packet);
735
736 // Dont bother fixing this yet, keep it "old style"
737 /*
738 packet.type = SR_DF_ANALOG;
739 packet.length = 1024;
740 packet.unitsize = sizeof(double);
741 packet.payload = analog_out;
742 sr_session_bus(ctx->session_id, &packet);
743 */
744
745 packet.type = SR_DF_END;
746 sr_session_bus(ctx->session_id, &packet);
747
748 return TRUE;
749}
750
751static int hw_dev_acquisition_start(int dev_index, gpointer session_dev_id)
752{
753 struct sr_dev_inst *sdi;
754 struct context *ctx;
755 struct sr_datafeed_packet packet;
756 struct sr_datafeed_header header;
757 int ret = SR_ERR;
758
759 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
760 return ret;
761 ctx = sdi->priv;
762
763 /* FIXME: No need to do full reconfigure every time */
764// ret = mso_reset_fsm(sdi);
765// if (ret != SR_OK)
766// return ret;
767
768 /* FIXME: ACDC Mode */
769 ctx->ctlbase1 &= 0x7f;
770// ctx->ctlbase1 |= ctx->acdcmode;
771
772 ret = mso_configure_rate(sdi, ctx->cur_rate);
773 if (ret != SR_OK)
774 return ret;
775
776 /* set dac offset */
777 ret = mso_dac_out(sdi, ctx->dac_offset);
778 if (ret != SR_OK)
779 return ret;
780
781 ret = mso_configure_threshold_level(sdi);
782 if (ret != SR_OK)
783 return ret;
784
785 ret = mso_configure_trigger(sdi);
786 if (ret != SR_OK)
787 return ret;
788
789 /* FIXME: trigger_position */
790
791
792 /* END of config hardware part */
793
794 /* with trigger */
795 ret = mso_arm(sdi);
796 if (ret != SR_OK)
797 return ret;
798
799 /* without trigger */
800// ret = mso_force_capture(sdi);
801// if (ret != SR_OK)
802// return ret;
803
804 mso_check_trigger(sdi, &ctx->trigger_state);
805 ret = mso_check_trigger(sdi, NULL);
806 if (ret != SR_OK)
807 return ret;
808
809 ctx->session_id = session_dev_id;
810 sr_source_add(sdi->serial->fd, G_IO_IN, -1, receive_data, sdi);
811
812 packet.type = SR_DF_HEADER;
813 packet.payload = (unsigned char *) &header;
814 header.feed_version = 1;
815 gettimeofday(&header.starttime, NULL);
816 header.samplerate = ctx->cur_rate;
817 // header.num_analog_probes = 1;
818 header.num_logic_probes = 8;
819 sr_session_bus(session_dev_id, &packet);
820
821 return ret;
822}
823
824/* FIXME */
825static int hw_dev_acquisition_stop(int dev_index, gpointer session_dev_id)
826{
827 struct sr_datafeed_packet packet;
828
829 dev_index = dev_index;
830
831 packet.type = SR_DF_END;
832 sr_session_bus(session_dev_id, &packet);
833
834 return SR_OK;
835}
836
837SR_PRIV struct sr_dev_plugin link_mso19_plugin_info = {
838 .name = "link-mso19",
839 .longname = "Link Instruments MSO-19",
840 .api_version = 1,
841 .init = hw_init,
842 .cleanup = hw_cleanup,
843 .dev_open = hw_dev_open,
844 .dev_close = hw_dev_close,
845 .dev_info_get = hw_dev_info_get,
846 .dev_status_get = hw_dev_status_get,
847 .hwcap_get_all = hw_hwcap_get_all,
848 .dev_config_set = hw_dev_config_set,
849 .dev_acquisition_start = hw_dev_acquisition_start,
850 .dev_acquisition_stop = hw_dev_acquisition_stop,
851};
Hardware access and backend lib