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1 | /* | |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2012 Bert Vermeulen <bert@biot.com> | |
5 | * With protocol information from the hantekdso project, | |
6 | * Copyright (C) 2008 Oleg Khudyakov <prcoder@gmail.com> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #ifndef LIBSIGROK_HARDWARE_HANTEK_DSO_H | |
23 | #define LIBSIGROK_HARDWARE_HANTEK_DSO_H | |
24 | ||
25 | #define USB_INTERFACE 0 | |
26 | #define USB_CONFIGURATION 1 | |
27 | #define DSO_EP_IN 0x86 | |
28 | #define DSO_EP_OUT 0x02 | |
29 | ||
30 | /* FX2 renumeration delay in ms */ | |
31 | #define MAX_RENUM_DELAY 3000 | |
32 | ||
33 | #define MAX_CAPTURE_EMPTY 3 | |
34 | ||
35 | #define DEFAULT_VOLTAGE VDIV_500MV | |
36 | #define DEFAULT_FRAMESIZE FRAMESIZE_SMALL | |
37 | #define DEFAULT_TIMEBASE TIME_100us | |
38 | #define DEFAULT_TRIGGER_SOURCE "CH1" | |
39 | #define DEFAULT_COUPLING COUPLING_AC | |
40 | #define DEFAULT_HORIZ_TRIGGERPOS 0.5 | |
41 | #define DEFAULT_VERT_OFFSET 0.5 | |
42 | #define DEFAULT_VERT_TRIGGERPOS 0.0 | |
43 | ||
44 | #define MAX_VERT_TRIGGER 0xfe | |
45 | ||
46 | /* Hantek DSO-specific protocol values */ | |
47 | #define EEPROM_CHANNEL_OFFSETS 0x08 | |
48 | ||
49 | #define FRAMESIZE_SMALL 10240 | |
50 | #define FRAMESIZE_LARGE 32768 | |
51 | ||
52 | ||
53 | enum control_requests { | |
54 | CTRL_READ_EEPROM = 0xa2, | |
55 | CTRL_GETSPEED = 0xb2, | |
56 | CTRL_BEGINCOMMAND = 0xb3, | |
57 | CTRL_SETOFFSET = 0xb4, | |
58 | CTRL_SETRELAYS = 0xb5 | |
59 | }; | |
60 | ||
61 | enum dso_commands { | |
62 | CMD_SET_FILTERS = 0, | |
63 | CMD_SET_TRIGGER_SAMPLERATE, | |
64 | CMD_FORCE_TRIGGER, | |
65 | CMD_CAPTURE_START, | |
66 | CMD_ENABLE_TRIGGER, | |
67 | CMD_GET_CHANNELDATA, | |
68 | CMD_GET_CAPTURESTATE, | |
69 | CMD_SET_VOLTAGE, | |
70 | /* unused */ | |
71 | cmdSetLogicalData, | |
72 | cmdGetLogicalData | |
73 | }; | |
74 | ||
75 | enum couplings { | |
76 | COUPLING_AC = 0, | |
77 | COUPLING_DC, | |
78 | COUPLING_OFF | |
79 | }; | |
80 | ||
81 | enum time_bases { | |
82 | TIME_10us = 0, | |
83 | TIME_20us, | |
84 | TIME_40us, | |
85 | TIME_100us, | |
86 | TIME_200us, | |
87 | TIME_400us, | |
88 | TIME_1ms, | |
89 | TIME_2ms, | |
90 | TIME_4ms, | |
91 | TIME_10ms, | |
92 | TIME_20ms, | |
93 | TIME_40ms, | |
94 | TIME_100ms, | |
95 | TIME_200ms, | |
96 | TIME_400ms | |
97 | }; | |
98 | ||
99 | /* Must match the vdivs table, these are just handy indexes into it. */ | |
100 | enum { | |
101 | VDIV_10MV, | |
102 | VDIV_20MV, | |
103 | VDIV_50MV, | |
104 | VDIV_100MV, | |
105 | VDIV_200MV, | |
106 | VDIV_500MV, | |
107 | VDIV_1V, | |
108 | VDIV_2V, | |
109 | VDIV_5V, | |
110 | }; | |
111 | ||
112 | enum trigger_slopes { | |
113 | SLOPE_POSITIVE = 0, | |
114 | SLOPE_NEGATIVE | |
115 | }; | |
116 | ||
117 | enum trigger_sources { | |
118 | TRIGGER_CH2 = 0, | |
119 | TRIGGER_CH1, | |
120 | TRIGGER_EXT, | |
121 | }; | |
122 | ||
123 | enum capturestates { | |
124 | CAPTURE_EMPTY = 0, | |
125 | CAPTURE_FILLING = 1, | |
126 | CAPTURE_READY_8BIT = 2, | |
127 | CAPTURE_READY_9BIT = 7, | |
128 | CAPTURE_TIMEOUT = 127, | |
129 | CAPTURE_UNKNOWN = 255 | |
130 | }; | |
131 | ||
132 | enum triggermodes { | |
133 | TRIGGERMODE_AUTO, | |
134 | TRIGGERMODE_NORMAL, | |
135 | TRIGGERMODE_SINGLE | |
136 | }; | |
137 | ||
138 | enum states { | |
139 | IDLE, | |
140 | NEW_CAPTURE, | |
141 | CAPTURE, | |
142 | FETCH_DATA | |
143 | }; | |
144 | ||
145 | struct dso_profile { | |
146 | /* VID/PID after cold boot */ | |
147 | uint16_t orig_vid; | |
148 | uint16_t orig_pid; | |
149 | /* VID/PID after firmware upload */ | |
150 | uint16_t fw_vid; | |
151 | uint16_t fw_pid; | |
152 | char *vendor; | |
153 | char *model; | |
154 | char *model_version; | |
155 | int num_probes; | |
156 | char *firmware; | |
157 | }; | |
158 | ||
159 | struct context { | |
160 | struct dso_profile *profile; | |
161 | struct sr_usb_dev_inst *usb; | |
162 | void *cb_data; | |
163 | uint64_t limit_frames; | |
164 | uint64_t num_frames; | |
165 | /* We can't keep track of an FX2-based device after upgrading | |
166 | * the firmware (it re-enumerates into a different device address | |
167 | * after the upgrade) this is like a global lock. No device will open | |
168 | * until a proper delay after the last device was upgraded. | |
169 | */ | |
170 | GTimeVal fw_updated; | |
171 | int epin_maxpacketsize; | |
172 | int capture_empty_count; | |
173 | int current_transfer; | |
174 | int dev_state; | |
175 | ||
176 | int timebase; | |
177 | gboolean ch1_enabled; | |
178 | gboolean ch2_enabled; | |
179 | int voltage_ch1; | |
180 | int voltage_ch2; | |
181 | int coupling_ch1; | |
182 | int coupling_ch2; | |
183 | // voltage offset (vertical position) | |
184 | float voffset_ch1; | |
185 | float voffset_ch2; | |
186 | float voffset_trigger; | |
187 | uint16_t channel_levels[2][9][2]; | |
188 | int framesize; | |
189 | gboolean filter_ch1; | |
190 | gboolean filter_ch2; | |
191 | gboolean filter_trigger; | |
192 | int triggerslope; | |
193 | char *triggersource; | |
194 | float triggerposition; | |
195 | int triggermode; | |
196 | }; | |
197 | ||
198 | SR_PRIV int dso_open(int dev_index); | |
199 | SR_PRIV void dso_close(struct sr_dev_inst *sdi); | |
200 | SR_PRIV int dso_enable_trigger(struct context *ctx); | |
201 | SR_PRIV int dso_force_trigger(struct context *ctx); | |
202 | SR_PRIV int dso_init(struct context *ctx); | |
203 | SR_PRIV uint8_t dso_get_capturestate(struct context *ctx); | |
204 | SR_PRIV uint8_t dso_capture_start(struct context *ctx); | |
205 | SR_PRIV int dso_get_channeldata(struct context *ctx, libusb_transfer_cb_fn cb); | |
206 | ||
207 | #endif |