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1 | /* | |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>, | |
5 | * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no> | |
6 | * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | /* | |
23 | * ASIX Sigma Logic Analyzer Driver | |
24 | */ | |
25 | ||
26 | #include <ftdi.h> | |
27 | #include <string.h> | |
28 | #include <zlib.h> | |
29 | #include <sigrok.h> | |
30 | #include <config.h> | |
31 | #include "asix-sigma.h" | |
32 | ||
33 | #define USB_VENDOR 0xa600 | |
34 | #define USB_PRODUCT 0xa000 | |
35 | #define USB_DESCRIPTION "ASIX SIGMA" | |
36 | #define USB_VENDOR_NAME "ASIX" | |
37 | #define USB_MODEL_NAME "SIGMA" | |
38 | #define USB_MODEL_VERSION "" | |
39 | #define TRIGGER_TYPES "rf10" | |
40 | ||
41 | static GSList *device_instances = NULL; | |
42 | ||
43 | static uint64_t supported_samplerates[] = { | |
44 | KHZ(200), | |
45 | KHZ(250), | |
46 | KHZ(500), | |
47 | MHZ(1), | |
48 | MHZ(5), | |
49 | MHZ(10), | |
50 | MHZ(25), | |
51 | MHZ(50), | |
52 | MHZ(100), | |
53 | MHZ(200), | |
54 | 0, | |
55 | }; | |
56 | ||
57 | static struct samplerates samplerates = { | |
58 | KHZ(200), | |
59 | MHZ(200), | |
60 | 0, | |
61 | supported_samplerates, | |
62 | }; | |
63 | ||
64 | static int capabilities[] = { | |
65 | HWCAP_LOGIC_ANALYZER, | |
66 | HWCAP_SAMPLERATE, | |
67 | HWCAP_CAPTURE_RATIO, | |
68 | HWCAP_PROBECONFIG, | |
69 | ||
70 | HWCAP_LIMIT_MSEC, | |
71 | 0, | |
72 | }; | |
73 | ||
74 | /* Force the FPGA to reboot. */ | |
75 | static uint8_t suicide[] = { | |
76 | 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84, | |
77 | }; | |
78 | ||
79 | /* Prepare to upload firmware (FPGA specific). */ | |
80 | static uint8_t init[] = { | |
81 | 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, | |
82 | }; | |
83 | ||
84 | /* Initialize the logic analyzer mode. */ | |
85 | static uint8_t logic_mode_start[] = { | |
86 | 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40, | |
87 | 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38, | |
88 | }; | |
89 | ||
90 | static const char *firmware_files[] = { | |
91 | "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */ | |
92 | "asix-sigma-100.fw", /* 100 MHz */ | |
93 | "asix-sigma-200.fw", /* 200 MHz */ | |
94 | "asix-sigma-50sync.fw", /* Synchronous clock from pin */ | |
95 | "asix-sigma-phasor.fw", /* Frequency counter */ | |
96 | }; | |
97 | ||
98 | static void hw_stop_acquisition(int device_index, gpointer session_device_id); | |
99 | ||
100 | static int sigma_read(void *buf, size_t size, struct sigma *sigma) | |
101 | { | |
102 | int ret; | |
103 | ||
104 | ret = ftdi_read_data(&sigma->ftdic, (unsigned char *)buf, size); | |
105 | if (ret < 0) { | |
106 | g_warning("ftdi_read_data failed: %s", | |
107 | ftdi_get_error_string(&sigma->ftdic)); | |
108 | } | |
109 | ||
110 | return ret; | |
111 | } | |
112 | ||
113 | static int sigma_write(void *buf, size_t size, struct sigma *sigma) | |
114 | { | |
115 | int ret; | |
116 | ||
117 | ret = ftdi_write_data(&sigma->ftdic, (unsigned char *)buf, size); | |
118 | if (ret < 0) { | |
119 | g_warning("ftdi_write_data failed: %s", | |
120 | ftdi_get_error_string(&sigma->ftdic)); | |
121 | } else if ((size_t) ret != size) { | |
122 | g_warning("ftdi_write_data did not complete write\n"); | |
123 | } | |
124 | ||
125 | return ret; | |
126 | } | |
127 | ||
128 | static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len, | |
129 | struct sigma *sigma) | |
130 | { | |
131 | size_t i; | |
132 | uint8_t buf[len + 2]; | |
133 | int idx = 0; | |
134 | ||
135 | buf[idx++] = REG_ADDR_LOW | (reg & 0xf); | |
136 | buf[idx++] = REG_ADDR_HIGH | (reg >> 4); | |
137 | ||
138 | for (i = 0; i < len; ++i) { | |
139 | buf[idx++] = REG_DATA_LOW | (data[i] & 0xf); | |
140 | buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4); | |
141 | } | |
142 | ||
143 | return sigma_write(buf, idx, sigma); | |
144 | } | |
145 | ||
146 | static int sigma_set_register(uint8_t reg, uint8_t value, struct sigma *sigma) | |
147 | { | |
148 | return sigma_write_register(reg, &value, 1, sigma); | |
149 | } | |
150 | ||
151 | static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len, | |
152 | struct sigma *sigma) | |
153 | { | |
154 | uint8_t buf[3]; | |
155 | ||
156 | buf[0] = REG_ADDR_LOW | (reg & 0xf); | |
157 | buf[1] = REG_ADDR_HIGH | (reg >> 4); | |
158 | buf[2] = REG_READ_ADDR; | |
159 | ||
160 | sigma_write(buf, sizeof(buf), sigma); | |
161 | ||
162 | return sigma_read(data, len, sigma); | |
163 | } | |
164 | ||
165 | static uint8_t sigma_get_register(uint8_t reg, struct sigma *sigma) | |
166 | { | |
167 | uint8_t value; | |
168 | ||
169 | if (1 != sigma_read_register(reg, &value, 1, sigma)) { | |
170 | g_warning("Sigma_get_register: 1 byte expected"); | |
171 | return 0; | |
172 | } | |
173 | ||
174 | return value; | |
175 | } | |
176 | ||
177 | static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos, | |
178 | struct sigma *sigma) | |
179 | { | |
180 | uint8_t buf[] = { | |
181 | REG_ADDR_LOW | READ_TRIGGER_POS_LOW, | |
182 | ||
183 | REG_READ_ADDR | NEXT_REG, | |
184 | REG_READ_ADDR | NEXT_REG, | |
185 | REG_READ_ADDR | NEXT_REG, | |
186 | REG_READ_ADDR | NEXT_REG, | |
187 | REG_READ_ADDR | NEXT_REG, | |
188 | REG_READ_ADDR | NEXT_REG, | |
189 | }; | |
190 | uint8_t result[6]; | |
191 | ||
192 | sigma_write(buf, sizeof(buf), sigma); | |
193 | ||
194 | sigma_read(result, sizeof(result), sigma); | |
195 | ||
196 | *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16); | |
197 | *stoppos = result[3] | (result[4] << 8) | (result[5] << 16); | |
198 | ||
199 | /* Not really sure why this must be done, but according to spec. */ | |
200 | if ((--*stoppos & 0x1ff) == 0x1ff) | |
201 | stoppos -= 64; | |
202 | ||
203 | if ((*--triggerpos & 0x1ff) == 0x1ff) | |
204 | triggerpos -= 64; | |
205 | ||
206 | return 1; | |
207 | } | |
208 | ||
209 | static int sigma_read_dram(uint16_t startchunk, size_t numchunks, | |
210 | uint8_t *data, struct sigma *sigma) | |
211 | { | |
212 | size_t i; | |
213 | uint8_t buf[4096]; | |
214 | int idx = 0; | |
215 | ||
216 | /* Send the startchunk. Index start with 1. */ | |
217 | buf[0] = startchunk >> 8; | |
218 | buf[1] = startchunk & 0xff; | |
219 | sigma_write_register(WRITE_MEMROW, buf, 2, sigma); | |
220 | ||
221 | /* Read the DRAM. */ | |
222 | buf[idx++] = REG_DRAM_BLOCK; | |
223 | buf[idx++] = REG_DRAM_WAIT_ACK; | |
224 | ||
225 | for (i = 0; i < numchunks; ++i) { | |
226 | /* Alternate bit to copy from DRAM to cache. */ | |
227 | if (i != (numchunks - 1)) | |
228 | buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4); | |
229 | ||
230 | buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4); | |
231 | ||
232 | if (i != (numchunks - 1)) | |
233 | buf[idx++] = REG_DRAM_WAIT_ACK; | |
234 | } | |
235 | ||
236 | sigma_write(buf, idx, sigma); | |
237 | ||
238 | return sigma_read(data, numchunks * CHUNK_SIZE, sigma); | |
239 | } | |
240 | ||
241 | /* Upload trigger look-up tables to Sigma. */ | |
242 | static int sigma_write_trigger_lut(struct triggerlut *lut, struct sigma *sigma) | |
243 | { | |
244 | int i; | |
245 | uint8_t tmp[2]; | |
246 | uint16_t bit; | |
247 | ||
248 | /* Transpose the table and send to Sigma. */ | |
249 | for (i = 0; i < 16; ++i) { | |
250 | bit = 1 << i; | |
251 | ||
252 | tmp[0] = tmp[1] = 0; | |
253 | ||
254 | if (lut->m2d[0] & bit) | |
255 | tmp[0] |= 0x01; | |
256 | if (lut->m2d[1] & bit) | |
257 | tmp[0] |= 0x02; | |
258 | if (lut->m2d[2] & bit) | |
259 | tmp[0] |= 0x04; | |
260 | if (lut->m2d[3] & bit) | |
261 | tmp[0] |= 0x08; | |
262 | ||
263 | if (lut->m3 & bit) | |
264 | tmp[0] |= 0x10; | |
265 | if (lut->m3s & bit) | |
266 | tmp[0] |= 0x20; | |
267 | if (lut->m4 & bit) | |
268 | tmp[0] |= 0x40; | |
269 | ||
270 | if (lut->m0d[0] & bit) | |
271 | tmp[1] |= 0x01; | |
272 | if (lut->m0d[1] & bit) | |
273 | tmp[1] |= 0x02; | |
274 | if (lut->m0d[2] & bit) | |
275 | tmp[1] |= 0x04; | |
276 | if (lut->m0d[3] & bit) | |
277 | tmp[1] |= 0x08; | |
278 | ||
279 | if (lut->m1d[0] & bit) | |
280 | tmp[1] |= 0x10; | |
281 | if (lut->m1d[1] & bit) | |
282 | tmp[1] |= 0x20; | |
283 | if (lut->m1d[2] & bit) | |
284 | tmp[1] |= 0x40; | |
285 | if (lut->m1d[3] & bit) | |
286 | tmp[1] |= 0x80; | |
287 | ||
288 | sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp), | |
289 | sigma); | |
290 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, sigma); | |
291 | } | |
292 | ||
293 | /* Send the parameters */ | |
294 | sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params, | |
295 | sizeof(lut->params), sigma); | |
296 | ||
297 | return SR_OK; | |
298 | } | |
299 | ||
300 | /* Generate the bitbang stream for programming the FPGA. */ | |
301 | static int bin2bitbang(const char *filename, | |
302 | unsigned char **buf, size_t *buf_size) | |
303 | { | |
304 | FILE *f; | |
305 | long file_size; | |
306 | unsigned long offset = 0; | |
307 | unsigned char *p; | |
308 | uint8_t *compressed_buf, *firmware; | |
309 | uLongf csize, fwsize; | |
310 | const int buffer_size = 65536; | |
311 | size_t i; | |
312 | int c, ret, bit, v; | |
313 | uint32_t imm = 0x3f6df2ab; | |
314 | ||
315 | f = fopen(filename, "r"); | |
316 | if (!f) { | |
317 | g_warning("fopen(\"%s\", \"r\")", filename); | |
318 | return -1; | |
319 | } | |
320 | ||
321 | if (-1 == fseek(f, 0, SEEK_END)) { | |
322 | g_warning("fseek on %s failed", filename); | |
323 | fclose(f); | |
324 | return -1; | |
325 | } | |
326 | ||
327 | file_size = ftell(f); | |
328 | ||
329 | fseek(f, 0, SEEK_SET); | |
330 | ||
331 | compressed_buf = g_malloc(file_size); | |
332 | firmware = g_malloc(buffer_size); | |
333 | ||
334 | if (!compressed_buf || !firmware) { | |
335 | g_warning("Error allocating buffers"); | |
336 | return -1; | |
337 | } | |
338 | ||
339 | csize = 0; | |
340 | while ((c = getc(f)) != EOF) { | |
341 | imm = (imm + 0xa853753) % 177 + (imm * 0x8034052); | |
342 | compressed_buf[csize++] = c ^ imm; | |
343 | } | |
344 | fclose(f); | |
345 | ||
346 | fwsize = buffer_size; | |
347 | ret = uncompress(firmware, &fwsize, compressed_buf, csize); | |
348 | if (ret < 0) { | |
349 | g_free(compressed_buf); | |
350 | g_free(firmware); | |
351 | g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret); | |
352 | return -1; | |
353 | } | |
354 | ||
355 | g_free(compressed_buf); | |
356 | ||
357 | *buf_size = fwsize * 2 * 8; | |
358 | ||
359 | *buf = p = (unsigned char *)g_malloc(*buf_size); | |
360 | ||
361 | if (!p) { | |
362 | g_warning("Error allocating buffers"); | |
363 | return -1; | |
364 | } | |
365 | ||
366 | for (i = 0; i < fwsize; ++i) { | |
367 | for (bit = 7; bit >= 0; --bit) { | |
368 | v = firmware[i] & 1 << bit ? 0x40 : 0x00; | |
369 | p[offset++] = v | 0x01; | |
370 | p[offset++] = v; | |
371 | } | |
372 | } | |
373 | ||
374 | g_free(firmware); | |
375 | ||
376 | if (offset != *buf_size) { | |
377 | g_free(*buf); | |
378 | g_warning("Error reading firmware %s " | |
379 | "offset=%ld, file_size=%ld, buf_size=%zd\n", | |
380 | filename, offset, file_size, *buf_size); | |
381 | ||
382 | return -1; | |
383 | } | |
384 | ||
385 | return 0; | |
386 | } | |
387 | ||
388 | static int hw_init(char *deviceinfo) | |
389 | { | |
390 | struct sr_device_instance *sdi; | |
391 | struct sigma *sigma = g_malloc(sizeof(struct sigma)); | |
392 | ||
393 | deviceinfo = deviceinfo; | |
394 | ||
395 | if (!sigma) | |
396 | return 0; | |
397 | ||
398 | ftdi_init(&sigma->ftdic); | |
399 | ||
400 | /* Look for SIGMAs. */ | |
401 | if (ftdi_usb_open_desc(&sigma->ftdic, USB_VENDOR, USB_PRODUCT, | |
402 | USB_DESCRIPTION, NULL) < 0) | |
403 | goto free; | |
404 | ||
405 | sigma->cur_samplerate = 0; | |
406 | sigma->limit_msec = 0; | |
407 | sigma->cur_firmware = -1; | |
408 | sigma->num_probes = 0; | |
409 | sigma->samples_per_event = 0; | |
410 | sigma->capture_ratio = 50; | |
411 | sigma->use_triggers = 0; | |
412 | ||
413 | /* Register SIGMA device. */ | |
414 | sdi = sr_device_instance_new(0, ST_INITIALIZING, | |
415 | USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION); | |
416 | if (!sdi) | |
417 | goto free; | |
418 | ||
419 | sdi->priv = sigma; | |
420 | ||
421 | device_instances = g_slist_append(device_instances, sdi); | |
422 | ||
423 | /* We will open the device again when we need it. */ | |
424 | ftdi_usb_close(&sigma->ftdic); | |
425 | ||
426 | return 1; | |
427 | free: | |
428 | free(sigma); | |
429 | return 0; | |
430 | } | |
431 | ||
432 | static int upload_firmware(int firmware_idx, struct sigma *sigma) | |
433 | { | |
434 | int ret; | |
435 | unsigned char *buf; | |
436 | unsigned char pins; | |
437 | size_t buf_size; | |
438 | unsigned char result[32]; | |
439 | char firmware_path[128]; | |
440 | ||
441 | /* Make sure it's an ASIX SIGMA. */ | |
442 | if ((ret = ftdi_usb_open_desc(&sigma->ftdic, | |
443 | USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { | |
444 | g_warning("ftdi_usb_open failed: %s", | |
445 | ftdi_get_error_string(&sigma->ftdic)); | |
446 | return 0; | |
447 | } | |
448 | ||
449 | if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0xdf, BITMODE_BITBANG)) < 0) { | |
450 | g_warning("ftdi_set_bitmode failed: %s", | |
451 | ftdi_get_error_string(&sigma->ftdic)); | |
452 | return 0; | |
453 | } | |
454 | ||
455 | /* Four times the speed of sigmalogan - Works well. */ | |
456 | if ((ret = ftdi_set_baudrate(&sigma->ftdic, 750000)) < 0) { | |
457 | g_warning("ftdi_set_baudrate failed: %s", | |
458 | ftdi_get_error_string(&sigma->ftdic)); | |
459 | return 0; | |
460 | } | |
461 | ||
462 | /* Force the FPGA to reboot. */ | |
463 | sigma_write(suicide, sizeof(suicide), sigma); | |
464 | sigma_write(suicide, sizeof(suicide), sigma); | |
465 | sigma_write(suicide, sizeof(suicide), sigma); | |
466 | sigma_write(suicide, sizeof(suicide), sigma); | |
467 | ||
468 | /* Prepare to upload firmware (FPGA specific). */ | |
469 | sigma_write(init, sizeof(init), sigma); | |
470 | ||
471 | ftdi_usb_purge_buffers(&sigma->ftdic); | |
472 | ||
473 | /* Wait until the FPGA asserts INIT_B. */ | |
474 | while (1) { | |
475 | ret = sigma_read(result, 1, sigma); | |
476 | if (result[0] & 0x20) | |
477 | break; | |
478 | } | |
479 | ||
480 | /* Prepare firmware. */ | |
481 | snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR, | |
482 | firmware_files[firmware_idx]); | |
483 | ||
484 | if (-1 == bin2bitbang(firmware_path, &buf, &buf_size)) { | |
485 | g_warning("An error occured while reading the firmware: %s", | |
486 | firmware_path); | |
487 | return SR_ERR; | |
488 | } | |
489 | ||
490 | /* Upload firmare. */ | |
491 | sigma_write(buf, buf_size, sigma); | |
492 | ||
493 | g_free(buf); | |
494 | ||
495 | if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0x00, BITMODE_RESET)) < 0) { | |
496 | g_warning("ftdi_set_bitmode failed: %s", | |
497 | ftdi_get_error_string(&sigma->ftdic)); | |
498 | return SR_ERR; | |
499 | } | |
500 | ||
501 | ftdi_usb_purge_buffers(&sigma->ftdic); | |
502 | ||
503 | /* Discard garbage. */ | |
504 | while (1 == sigma_read(&pins, 1, sigma)) | |
505 | ; | |
506 | ||
507 | /* Initialize the logic analyzer mode. */ | |
508 | sigma_write(logic_mode_start, sizeof(logic_mode_start), sigma); | |
509 | ||
510 | /* Expect a 3 byte reply. */ | |
511 | ret = sigma_read(result, 3, sigma); | |
512 | if (ret != 3 || | |
513 | result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) { | |
514 | g_warning("Configuration failed. Invalid reply received."); | |
515 | return SR_ERR; | |
516 | } | |
517 | ||
518 | sigma->cur_firmware = firmware_idx; | |
519 | ||
520 | return SR_OK; | |
521 | } | |
522 | ||
523 | static int hw_opendev(int device_index) | |
524 | { | |
525 | struct sr_device_instance *sdi; | |
526 | struct sigma *sigma; | |
527 | int ret; | |
528 | ||
529 | if (!(sdi = sr_get_device_instance(device_instances, device_index))) | |
530 | return SR_ERR; | |
531 | ||
532 | sigma = sdi->priv; | |
533 | ||
534 | /* Make sure it's an ASIX SIGMA. */ | |
535 | if ((ret = ftdi_usb_open_desc(&sigma->ftdic, | |
536 | USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { | |
537 | ||
538 | g_warning("ftdi_usb_open failed: %s", | |
539 | ftdi_get_error_string(&sigma->ftdic)); | |
540 | ||
541 | return 0; | |
542 | } | |
543 | ||
544 | sdi->status = ST_ACTIVE; | |
545 | ||
546 | return SR_OK; | |
547 | } | |
548 | ||
549 | static int set_samplerate(struct sr_device_instance *sdi, | |
550 | uint64_t samplerate) | |
551 | { | |
552 | int i, ret; | |
553 | struct sigma *sigma = sdi->priv; | |
554 | ||
555 | for (i = 0; supported_samplerates[i]; i++) { | |
556 | if (supported_samplerates[i] == samplerate) | |
557 | break; | |
558 | } | |
559 | if (supported_samplerates[i] == 0) | |
560 | return SR_ERR_SAMPLERATE; | |
561 | ||
562 | if (samplerate <= MHZ(50)) { | |
563 | ret = upload_firmware(0, sigma); | |
564 | sigma->num_probes = 16; | |
565 | } | |
566 | if (samplerate == MHZ(100)) { | |
567 | ret = upload_firmware(1, sigma); | |
568 | sigma->num_probes = 8; | |
569 | } | |
570 | else if (samplerate == MHZ(200)) { | |
571 | ret = upload_firmware(2, sigma); | |
572 | sigma->num_probes = 4; | |
573 | } | |
574 | ||
575 | sigma->cur_samplerate = samplerate; | |
576 | sigma->samples_per_event = 16 / sigma->num_probes; | |
577 | sigma->state.state = SIGMA_IDLE; | |
578 | ||
579 | g_message("Firmware uploaded"); | |
580 | ||
581 | return ret; | |
582 | } | |
583 | ||
584 | /* | |
585 | * In 100 and 200 MHz mode, only a single pin rising/falling can be | |
586 | * set as trigger. In other modes, two rising/falling triggers can be set, | |
587 | * in addition to value/mask trigger for any number of probes. | |
588 | * | |
589 | * The Sigma supports complex triggers using boolean expressions, but this | |
590 | * has not been implemented yet. | |
591 | */ | |
592 | static int configure_probes(struct sr_device_instance *sdi, GSList *probes) | |
593 | { | |
594 | struct sigma *sigma = sdi->priv; | |
595 | struct probe *probe; | |
596 | GSList *l; | |
597 | int trigger_set = 0; | |
598 | int probebit; | |
599 | ||
600 | memset(&sigma->trigger, 0, sizeof(struct sigma_trigger)); | |
601 | ||
602 | for (l = probes; l; l = l->next) { | |
603 | probe = (struct probe *)l->data; | |
604 | probebit = 1 << (probe->index - 1); | |
605 | ||
606 | if (!probe->enabled || !probe->trigger) | |
607 | continue; | |
608 | ||
609 | if (sigma->cur_samplerate >= MHZ(100)) { | |
610 | /* Fast trigger support. */ | |
611 | if (trigger_set) { | |
612 | g_warning("Asix Sigma only supports a single " | |
613 | "pin trigger in 100 and 200 " | |
614 | "MHz mode."); | |
615 | return SR_ERR; | |
616 | } | |
617 | if (probe->trigger[0] == 'f') | |
618 | sigma->trigger.fallingmask |= probebit; | |
619 | else if (probe->trigger[0] == 'r') | |
620 | sigma->trigger.risingmask |= probebit; | |
621 | else { | |
622 | g_warning("Asix Sigma only supports " | |
623 | "rising/falling trigger in 100 " | |
624 | "and 200 MHz mode."); | |
625 | return SR_ERR; | |
626 | } | |
627 | ||
628 | ++trigger_set; | |
629 | } else { | |
630 | /* Simple trigger support (event). */ | |
631 | if (probe->trigger[0] == '1') { | |
632 | sigma->trigger.simplevalue |= probebit; | |
633 | sigma->trigger.simplemask |= probebit; | |
634 | } | |
635 | else if (probe->trigger[0] == '0') { | |
636 | sigma->trigger.simplevalue &= ~probebit; | |
637 | sigma->trigger.simplemask |= probebit; | |
638 | } | |
639 | else if (probe->trigger[0] == 'f') { | |
640 | sigma->trigger.fallingmask |= probebit; | |
641 | ++trigger_set; | |
642 | } | |
643 | else if (probe->trigger[0] == 'r') { | |
644 | sigma->trigger.risingmask |= probebit; | |
645 | ++trigger_set; | |
646 | } | |
647 | ||
648 | /* | |
649 | * Actually, Sigma supports 2 rising/falling triggers, | |
650 | * but they are ORed and the current trigger syntax | |
651 | * does not permit ORed triggers. | |
652 | */ | |
653 | if (trigger_set > 1) { | |
654 | g_warning("Asix Sigma only supports 1 rising/" | |
655 | "falling triggers."); | |
656 | return SR_ERR; | |
657 | } | |
658 | } | |
659 | ||
660 | if (trigger_set) | |
661 | sigma->use_triggers = 1; | |
662 | } | |
663 | ||
664 | return SR_OK; | |
665 | } | |
666 | ||
667 | static void hw_closedev(int device_index) | |
668 | { | |
669 | struct sr_device_instance *sdi; | |
670 | struct sigma *sigma; | |
671 | ||
672 | if ((sdi = sr_get_device_instance(device_instances, device_index))) | |
673 | { | |
674 | sigma = sdi->priv; | |
675 | if (sdi->status == ST_ACTIVE) | |
676 | ftdi_usb_close(&sigma->ftdic); | |
677 | ||
678 | sdi->status = ST_INACTIVE; | |
679 | } | |
680 | } | |
681 | ||
682 | static void hw_cleanup(void) | |
683 | { | |
684 | GSList *l; | |
685 | struct sr_device_instance *sdi; | |
686 | ||
687 | /* Properly close all devices. */ | |
688 | for (l = device_instances; l; l = l->next) { | |
689 | sdi = l->data; | |
690 | if (sdi->priv != NULL) | |
691 | free(sdi->priv); | |
692 | sr_device_instance_free(sdi); | |
693 | } | |
694 | g_slist_free(device_instances); | |
695 | device_instances = NULL; | |
696 | } | |
697 | ||
698 | static void *hw_get_device_info(int device_index, int device_info_id) | |
699 | { | |
700 | struct sr_device_instance *sdi; | |
701 | struct sigma *sigma; | |
702 | void *info = NULL; | |
703 | ||
704 | if (!(sdi = sr_get_device_instance(device_instances, device_index))) { | |
705 | fprintf(stderr, "It's NULL.\n"); | |
706 | return NULL; | |
707 | } | |
708 | ||
709 | sigma = sdi->priv; | |
710 | ||
711 | switch (device_info_id) { | |
712 | case DI_INSTANCE: | |
713 | info = sdi; | |
714 | break; | |
715 | case DI_NUM_PROBES: | |
716 | info = GINT_TO_POINTER(16); | |
717 | break; | |
718 | case DI_SAMPLERATES: | |
719 | info = &samplerates; | |
720 | break; | |
721 | case DI_TRIGGER_TYPES: | |
722 | info = (char *)TRIGGER_TYPES; | |
723 | break; | |
724 | case DI_CUR_SAMPLERATE: | |
725 | info = &sigma->cur_samplerate; | |
726 | break; | |
727 | } | |
728 | ||
729 | return info; | |
730 | } | |
731 | ||
732 | static int hw_get_status(int device_index) | |
733 | { | |
734 | struct sr_device_instance *sdi; | |
735 | ||
736 | sdi = sr_get_device_instance(device_instances, device_index); | |
737 | if (sdi) | |
738 | return sdi->status; | |
739 | else | |
740 | return ST_NOT_FOUND; | |
741 | } | |
742 | ||
743 | static int *hw_get_capabilities(void) | |
744 | { | |
745 | return capabilities; | |
746 | } | |
747 | ||
748 | static int hw_set_configuration(int device_index, int capability, void *value) | |
749 | { | |
750 | struct sr_device_instance *sdi; | |
751 | struct sigma *sigma; | |
752 | int ret; | |
753 | ||
754 | if (!(sdi = sr_get_device_instance(device_instances, device_index))) | |
755 | return SR_ERR; | |
756 | ||
757 | sigma = sdi->priv; | |
758 | ||
759 | if (capability == HWCAP_SAMPLERATE) { | |
760 | ret = set_samplerate(sdi, *(uint64_t*) value); | |
761 | } else if (capability == HWCAP_PROBECONFIG) { | |
762 | ret = configure_probes(sdi, value); | |
763 | } else if (capability == HWCAP_LIMIT_MSEC) { | |
764 | sigma->limit_msec = *(uint64_t*) value; | |
765 | if (sigma->limit_msec > 0) | |
766 | ret = SR_OK; | |
767 | else | |
768 | ret = SR_ERR; | |
769 | } else if (capability == HWCAP_CAPTURE_RATIO) { | |
770 | sigma->capture_ratio = *(uint64_t*) value; | |
771 | if (sigma->capture_ratio < 0 || sigma->capture_ratio > 100) | |
772 | ret = SR_ERR; | |
773 | else | |
774 | ret = SR_OK; | |
775 | } else { | |
776 | ret = SR_ERR; | |
777 | } | |
778 | ||
779 | return ret; | |
780 | } | |
781 | ||
782 | /* Software trigger to determine exact trigger position. */ | |
783 | static int get_trigger_offset(uint16_t *samples, uint16_t last_sample, | |
784 | struct sigma_trigger *t) | |
785 | { | |
786 | int i; | |
787 | ||
788 | for (i = 0; i < 8; ++i) { | |
789 | if (i > 0) | |
790 | last_sample = samples[i-1]; | |
791 | ||
792 | /* Simple triggers. */ | |
793 | if ((samples[i] & t->simplemask) != t->simplevalue) | |
794 | continue; | |
795 | ||
796 | /* Rising edge. */ | |
797 | if ((last_sample & t->risingmask) != 0 || (samples[i] & | |
798 | t->risingmask) != t->risingmask) | |
799 | continue; | |
800 | ||
801 | /* Falling edge. */ | |
802 | if ((last_sample & t->fallingmask) != t->fallingmask || | |
803 | (samples[i] & t->fallingmask) != 0) | |
804 | continue; | |
805 | ||
806 | break; | |
807 | } | |
808 | ||
809 | /* If we did not match, return original trigger pos. */ | |
810 | return i & 0x7; | |
811 | } | |
812 | ||
813 | /* | |
814 | * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster. | |
815 | * Each event is 20ns apart, and can contain multiple samples. | |
816 | * | |
817 | * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart. | |
818 | * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart. | |
819 | * For 50 MHz and below, events contain one sample for each channel, | |
820 | * spread 20 ns apart. | |
821 | */ | |
822 | static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts, | |
823 | uint16_t *lastsample, int triggerpos, | |
824 | uint16_t limit_chunk, void *user_data) | |
825 | { | |
826 | struct sr_device_instance *sdi = user_data; | |
827 | struct sigma *sigma = sdi->priv; | |
828 | uint16_t tsdiff, ts; | |
829 | uint16_t samples[65536 * sigma->samples_per_event]; | |
830 | struct sr_datafeed_packet packet; | |
831 | int i, j, k, l, numpad, tosend; | |
832 | size_t n = 0, sent = 0; | |
833 | int clustersize = EVENTS_PER_CLUSTER * sigma->samples_per_event; | |
834 | uint16_t *event; | |
835 | uint16_t cur_sample; | |
836 | int triggerts = -1; | |
837 | ||
838 | /* Check if trigger is in this chunk. */ | |
839 | if (triggerpos != -1) { | |
840 | if (sigma->cur_samplerate <= MHZ(50)) | |
841 | triggerpos -= EVENTS_PER_CLUSTER - 1; | |
842 | ||
843 | if (triggerpos < 0) | |
844 | triggerpos = 0; | |
845 | ||
846 | /* Find in which cluster the trigger occured. */ | |
847 | triggerts = triggerpos / 7; | |
848 | } | |
849 | ||
850 | /* For each ts. */ | |
851 | for (i = 0; i < 64; ++i) { | |
852 | ts = *(uint16_t *) &buf[i * 16]; | |
853 | tsdiff = ts - *lastts; | |
854 | *lastts = ts; | |
855 | ||
856 | /* Decode partial chunk. */ | |
857 | if (limit_chunk && ts > limit_chunk) | |
858 | return SR_OK; | |
859 | ||
860 | /* Pad last sample up to current point. */ | |
861 | numpad = tsdiff * sigma->samples_per_event - clustersize; | |
862 | if (numpad > 0) { | |
863 | for (j = 0; j < numpad; ++j) | |
864 | samples[j] = *lastsample; | |
865 | ||
866 | n = numpad; | |
867 | } | |
868 | ||
869 | /* Send samples between previous and this timestamp to sigrok. */ | |
870 | sent = 0; | |
871 | while (sent < n) { | |
872 | tosend = MIN(2048, n - sent); | |
873 | ||
874 | packet.type = DF_LOGIC; | |
875 | packet.length = tosend * sizeof(uint16_t); | |
876 | packet.unitsize = 2; | |
877 | packet.payload = samples + sent; | |
878 | session_bus(sigma->session_id, &packet); | |
879 | ||
880 | sent += tosend; | |
881 | } | |
882 | n = 0; | |
883 | ||
884 | event = (uint16_t *) &buf[i * 16 + 2]; | |
885 | cur_sample = 0; | |
886 | ||
887 | /* For each event in cluster. */ | |
888 | for (j = 0; j < 7; ++j) { | |
889 | ||
890 | /* For each sample in event. */ | |
891 | for (k = 0; k < sigma->samples_per_event; ++k) { | |
892 | cur_sample = 0; | |
893 | ||
894 | /* For each probe. */ | |
895 | for (l = 0; l < sigma->num_probes; ++l) | |
896 | cur_sample |= (!!(event[j] & (1 << (l * | |
897 | sigma->samples_per_event | |
898 | + k)))) | |
899 | << l; | |
900 | ||
901 | samples[n++] = cur_sample; | |
902 | } | |
903 | } | |
904 | ||
905 | /* Send data up to trigger point (if triggered). */ | |
906 | sent = 0; | |
907 | if (i == triggerts) { | |
908 | /* | |
909 | * Trigger is not always accurate to sample because of | |
910 | * pipeline delay. However, it always triggers before | |
911 | * the actual event. We therefore look at the next | |
912 | * samples to pinpoint the exact position of the trigger. | |
913 | */ | |
914 | tosend = get_trigger_offset(samples, *lastsample, | |
915 | &sigma->trigger); | |
916 | ||
917 | if (tosend > 0) { | |
918 | packet.type = DF_LOGIC; | |
919 | packet.length = tosend * sizeof(uint16_t); | |
920 | packet.unitsize = 2; | |
921 | packet.payload = samples; | |
922 | session_bus(sigma->session_id, &packet); | |
923 | ||
924 | sent += tosend; | |
925 | } | |
926 | ||
927 | /* Only send trigger if explicitly enabled. */ | |
928 | if (sigma->use_triggers) { | |
929 | packet.type = DF_TRIGGER; | |
930 | packet.length = 0; | |
931 | packet.payload = 0; | |
932 | session_bus(sigma->session_id, &packet); | |
933 | } | |
934 | } | |
935 | ||
936 | /* Send rest of the chunk to sigrok. */ | |
937 | tosend = n - sent; | |
938 | ||
939 | if (tosend > 0) { | |
940 | packet.type = DF_LOGIC; | |
941 | packet.length = tosend * sizeof(uint16_t); | |
942 | packet.unitsize = 2; | |
943 | packet.payload = samples + sent; | |
944 | session_bus(sigma->session_id, &packet); | |
945 | } | |
946 | ||
947 | *lastsample = samples[n - 1]; | |
948 | } | |
949 | ||
950 | return SR_OK; | |
951 | } | |
952 | ||
953 | static int receive_data(int fd, int revents, void *user_data) | |
954 | { | |
955 | struct sr_device_instance *sdi = user_data; | |
956 | struct sigma *sigma = sdi->priv; | |
957 | struct sr_datafeed_packet packet; | |
958 | const int chunks_per_read = 32; | |
959 | unsigned char buf[chunks_per_read * CHUNK_SIZE]; | |
960 | int bufsz, numchunks, i, newchunks; | |
961 | uint64_t running_msec; | |
962 | struct timeval tv; | |
963 | ||
964 | fd = fd; | |
965 | revents = revents; | |
966 | ||
967 | numchunks = (sigma->state.stoppos + 511) / 512; | |
968 | ||
969 | if (sigma->state.state == SIGMA_IDLE) | |
970 | return FALSE; | |
971 | ||
972 | if (sigma->state.state == SIGMA_CAPTURE) { | |
973 | ||
974 | /* Check if the timer has expired, or memory is full. */ | |
975 | gettimeofday(&tv, 0); | |
976 | running_msec = (tv.tv_sec - sigma->start_tv.tv_sec) * 1000 + | |
977 | (tv.tv_usec - sigma->start_tv.tv_usec) / 1000; | |
978 | ||
979 | if (running_msec < sigma->limit_msec && numchunks < 32767) | |
980 | return FALSE; | |
981 | ||
982 | hw_stop_acquisition(sdi->index, user_data); | |
983 | ||
984 | return FALSE; | |
985 | ||
986 | } else if (sigma->state.state == SIGMA_DOWNLOAD) { | |
987 | if (sigma->state.chunks_downloaded >= numchunks) { | |
988 | /* End of samples. */ | |
989 | packet.type = DF_END; | |
990 | packet.length = 0; | |
991 | session_bus(sigma->session_id, &packet); | |
992 | ||
993 | sigma->state.state = SIGMA_IDLE; | |
994 | ||
995 | return TRUE; | |
996 | } | |
997 | ||
998 | newchunks = MIN(chunks_per_read, | |
999 | numchunks - sigma->state.chunks_downloaded); | |
1000 | ||
1001 | g_message("Downloading sample data: %.0f %%", | |
1002 | 100.0 * sigma->state.chunks_downloaded / numchunks); | |
1003 | ||
1004 | bufsz = sigma_read_dram(sigma->state.chunks_downloaded, | |
1005 | newchunks, buf, sigma); | |
1006 | ||
1007 | /* Find first ts. */ | |
1008 | if (sigma->state.chunks_downloaded == 0) { | |
1009 | sigma->state.lastts = *(uint16_t *) buf - 1; | |
1010 | sigma->state.lastsample = 0; | |
1011 | } | |
1012 | ||
1013 | /* Decode chunks and send them to sigrok. */ | |
1014 | for (i = 0; i < newchunks; ++i) { | |
1015 | int limit_chunk = 0; | |
1016 | ||
1017 | /* The last chunk may potentially be only in part. */ | |
1018 | if (sigma->state.chunks_downloaded == numchunks - 1) | |
1019 | { | |
1020 | /* Find the last valid timestamp */ | |
1021 | limit_chunk = sigma->state.stoppos % 512 + sigma->state.lastts; | |
1022 | } | |
1023 | ||
1024 | if (sigma->state.chunks_downloaded + i == sigma->state.triggerchunk) | |
1025 | decode_chunk_ts(buf + (i * CHUNK_SIZE), | |
1026 | &sigma->state.lastts, | |
1027 | &sigma->state.lastsample, | |
1028 | sigma->state.triggerpos & 0x1ff, | |
1029 | limit_chunk, user_data); | |
1030 | else | |
1031 | decode_chunk_ts(buf + (i * CHUNK_SIZE), | |
1032 | &sigma->state.lastts, | |
1033 | &sigma->state.lastsample, | |
1034 | -1, limit_chunk, user_data); | |
1035 | ||
1036 | ++sigma->state.chunks_downloaded; | |
1037 | } | |
1038 | } | |
1039 | ||
1040 | return TRUE; | |
1041 | } | |
1042 | ||
1043 | /* Build a LUT entry used by the trigger functions. */ | |
1044 | static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry) | |
1045 | { | |
1046 | int i, j, k, bit; | |
1047 | ||
1048 | /* For each quad probe. */ | |
1049 | for (i = 0; i < 4; ++i) { | |
1050 | entry[i] = 0xffff; | |
1051 | ||
1052 | /* For each bit in LUT. */ | |
1053 | for (j = 0; j < 16; ++j) | |
1054 | ||
1055 | /* For each probe in quad. */ | |
1056 | for (k = 0; k < 4; ++k) { | |
1057 | bit = 1 << (i * 4 + k); | |
1058 | ||
1059 | /* Set bit in entry */ | |
1060 | if ((mask & bit) && | |
1061 | ((!(value & bit)) != | |
1062 | (!(j & (1 << k))))) | |
1063 | entry[i] &= ~(1 << j); | |
1064 | } | |
1065 | } | |
1066 | } | |
1067 | ||
1068 | /* Add a logical function to LUT mask. */ | |
1069 | static void add_trigger_function(enum triggerop oper, enum triggerfunc func, | |
1070 | int index, int neg, uint16_t *mask) | |
1071 | { | |
1072 | int i, j; | |
1073 | int x[2][2], tmp, a, b, aset, bset, rset; | |
1074 | ||
1075 | memset(x, 0, 4 * sizeof(int)); | |
1076 | ||
1077 | /* Trigger detect condition. */ | |
1078 | switch (oper) { | |
1079 | case OP_LEVEL: | |
1080 | x[0][1] = 1; | |
1081 | x[1][1] = 1; | |
1082 | break; | |
1083 | case OP_NOT: | |
1084 | x[0][0] = 1; | |
1085 | x[1][0] = 1; | |
1086 | break; | |
1087 | case OP_RISE: | |
1088 | x[0][1] = 1; | |
1089 | break; | |
1090 | case OP_FALL: | |
1091 | x[1][0] = 1; | |
1092 | break; | |
1093 | case OP_RISEFALL: | |
1094 | x[0][1] = 1; | |
1095 | x[1][0] = 1; | |
1096 | break; | |
1097 | case OP_NOTRISE: | |
1098 | x[1][1] = 1; | |
1099 | x[0][0] = 1; | |
1100 | x[1][0] = 1; | |
1101 | break; | |
1102 | case OP_NOTFALL: | |
1103 | x[1][1] = 1; | |
1104 | x[0][0] = 1; | |
1105 | x[0][1] = 1; | |
1106 | break; | |
1107 | case OP_NOTRISEFALL: | |
1108 | x[1][1] = 1; | |
1109 | x[0][0] = 1; | |
1110 | break; | |
1111 | } | |
1112 | ||
1113 | /* Transpose if neg is set. */ | |
1114 | if (neg) { | |
1115 | for (i = 0; i < 2; ++i) | |
1116 | for (j = 0; j < 2; ++j) { | |
1117 | tmp = x[i][j]; | |
1118 | x[i][j] = x[1-i][1-j]; | |
1119 | x[1-i][1-j] = tmp; | |
1120 | } | |
1121 | } | |
1122 | ||
1123 | /* Update mask with function. */ | |
1124 | for (i = 0; i < 16; ++i) { | |
1125 | a = (i >> (2 * index + 0)) & 1; | |
1126 | b = (i >> (2 * index + 1)) & 1; | |
1127 | ||
1128 | aset = (*mask >> i) & 1; | |
1129 | bset = x[b][a]; | |
1130 | ||
1131 | if (func == FUNC_AND || func == FUNC_NAND) | |
1132 | rset = aset & bset; | |
1133 | else if (func == FUNC_OR || func == FUNC_NOR) | |
1134 | rset = aset | bset; | |
1135 | else if (func == FUNC_XOR || func == FUNC_NXOR) | |
1136 | rset = aset ^ bset; | |
1137 | ||
1138 | if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR) | |
1139 | rset = !rset; | |
1140 | ||
1141 | *mask &= ~(1 << i); | |
1142 | ||
1143 | if (rset) | |
1144 | *mask |= 1 << i; | |
1145 | } | |
1146 | } | |
1147 | ||
1148 | /* | |
1149 | * Build trigger LUTs used by 50 MHz and lower sample rates for supporting | |
1150 | * simple pin change and state triggers. Only two transitions (rise/fall) can be | |
1151 | * set at any time, but a full mask and value can be set (0/1). | |
1152 | */ | |
1153 | static int build_basic_trigger(struct triggerlut *lut, struct sigma *sigma) | |
1154 | { | |
1155 | int i,j; | |
1156 | uint16_t masks[2] = { 0, 0 }; | |
1157 | ||
1158 | memset(lut, 0, sizeof(struct triggerlut)); | |
1159 | ||
1160 | /* Contant for simple triggers. */ | |
1161 | lut->m4 = 0xa000; | |
1162 | ||
1163 | /* Value/mask trigger support. */ | |
1164 | build_lut_entry(sigma->trigger.simplevalue, sigma->trigger.simplemask, | |
1165 | lut->m2d); | |
1166 | ||
1167 | /* Rise/fall trigger support. */ | |
1168 | for (i = 0, j = 0; i < 16; ++i) { | |
1169 | if (sigma->trigger.risingmask & (1 << i) || | |
1170 | sigma->trigger.fallingmask & (1 << i)) | |
1171 | masks[j++] = 1 << i; | |
1172 | } | |
1173 | ||
1174 | build_lut_entry(masks[0], masks[0], lut->m0d); | |
1175 | build_lut_entry(masks[1], masks[1], lut->m1d); | |
1176 | ||
1177 | /* Add glue logic */ | |
1178 | if (masks[0] || masks[1]) { | |
1179 | /* Transition trigger. */ | |
1180 | if (masks[0] & sigma->trigger.risingmask) | |
1181 | add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3); | |
1182 | if (masks[0] & sigma->trigger.fallingmask) | |
1183 | add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3); | |
1184 | if (masks[1] & sigma->trigger.risingmask) | |
1185 | add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3); | |
1186 | if (masks[1] & sigma->trigger.fallingmask) | |
1187 | add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3); | |
1188 | } else { | |
1189 | /* Only value/mask trigger. */ | |
1190 | lut->m3 = 0xffff; | |
1191 | } | |
1192 | ||
1193 | /* Triggertype: event. */ | |
1194 | lut->params.selres = 3; | |
1195 | ||
1196 | return SR_OK; | |
1197 | } | |
1198 | ||
1199 | static int hw_start_acquisition(int device_index, gpointer session_device_id) | |
1200 | { | |
1201 | struct sr_device_instance *sdi; | |
1202 | struct sigma *sigma; | |
1203 | struct sr_datafeed_packet packet; | |
1204 | struct sr_datafeed_header header; | |
1205 | struct clockselect_50 clockselect; | |
1206 | int frac; | |
1207 | uint8_t triggerselect; | |
1208 | struct triggerinout triggerinout_conf; | |
1209 | struct triggerlut lut; | |
1210 | int triggerpin; | |
1211 | ||
1212 | session_device_id = session_device_id; | |
1213 | ||
1214 | if (!(sdi = sr_get_device_instance(device_instances, device_index))) | |
1215 | return SR_ERR; | |
1216 | ||
1217 | sigma = sdi->priv; | |
1218 | ||
1219 | /* If the samplerate has not been set, default to 200 KHz. */ | |
1220 | if (sigma->cur_firmware == -1) | |
1221 | set_samplerate(sdi, KHZ(200)); | |
1222 | ||
1223 | /* Enter trigger programming mode. */ | |
1224 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, sigma); | |
1225 | ||
1226 | /* 100 and 200 MHz mode. */ | |
1227 | if (sigma->cur_samplerate >= MHZ(100)) { | |
1228 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, sigma); | |
1229 | ||
1230 | /* Find which pin to trigger on from mask. */ | |
1231 | for (triggerpin = 0; triggerpin < 8; ++triggerpin) | |
1232 | if ((sigma->trigger.risingmask | sigma->trigger.fallingmask) & | |
1233 | (1 << triggerpin)) | |
1234 | break; | |
1235 | ||
1236 | /* Set trigger pin and light LED on trigger. */ | |
1237 | triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7); | |
1238 | ||
1239 | /* Default rising edge. */ | |
1240 | if (sigma->trigger.fallingmask) | |
1241 | triggerselect |= 1 << 3; | |
1242 | ||
1243 | /* All other modes. */ | |
1244 | } else if (sigma->cur_samplerate <= MHZ(50)) { | |
1245 | build_basic_trigger(&lut, sigma); | |
1246 | ||
1247 | sigma_write_trigger_lut(&lut, sigma); | |
1248 | ||
1249 | triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0); | |
1250 | } | |
1251 | ||
1252 | /* Setup trigger in and out pins to default values. */ | |
1253 | memset(&triggerinout_conf, 0, sizeof(struct triggerinout)); | |
1254 | triggerinout_conf.trgout_bytrigger = 1; | |
1255 | triggerinout_conf.trgout_enable = 1; | |
1256 | ||
1257 | sigma_write_register(WRITE_TRIGGER_OPTION, | |
1258 | (uint8_t *) &triggerinout_conf, | |
1259 | sizeof(struct triggerinout), sigma); | |
1260 | ||
1261 | /* Go back to normal mode. */ | |
1262 | sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, sigma); | |
1263 | ||
1264 | /* Set clock select register. */ | |
1265 | if (sigma->cur_samplerate == MHZ(200)) | |
1266 | /* Enable 4 probes. */ | |
1267 | sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, sigma); | |
1268 | else if (sigma->cur_samplerate == MHZ(100)) | |
1269 | /* Enable 8 probes. */ | |
1270 | sigma_set_register(WRITE_CLOCK_SELECT, 0x00, sigma); | |
1271 | else { | |
1272 | /* | |
1273 | * 50 MHz mode (or fraction thereof). Any fraction down to | |
1274 | * 50 MHz / 256 can be used, but is not supported by sigrok API. | |
1275 | */ | |
1276 | frac = MHZ(50) / sigma->cur_samplerate - 1; | |
1277 | ||
1278 | clockselect.async = 0; | |
1279 | clockselect.fraction = frac; | |
1280 | clockselect.disabled_probes = 0; | |
1281 | ||
1282 | sigma_write_register(WRITE_CLOCK_SELECT, | |
1283 | (uint8_t *) &clockselect, | |
1284 | sizeof(clockselect), sigma); | |
1285 | } | |
1286 | ||
1287 | /* Setup maximum post trigger time. */ | |
1288 | sigma_set_register(WRITE_POST_TRIGGER, | |
1289 | (sigma->capture_ratio * 255) / 100, sigma); | |
1290 | ||
1291 | /* Start acqusition. */ | |
1292 | gettimeofday(&sigma->start_tv, 0); | |
1293 | sigma_set_register(WRITE_MODE, 0x0d, sigma); | |
1294 | ||
1295 | sigma->session_id = session_device_id; | |
1296 | ||
1297 | /* Send header packet to the session bus. */ | |
1298 | packet.type = DF_HEADER; | |
1299 | packet.length = sizeof(struct sr_datafeed_header); | |
1300 | packet.payload = &header; | |
1301 | header.feed_version = 1; | |
1302 | gettimeofday(&header.starttime, NULL); | |
1303 | header.samplerate = sigma->cur_samplerate; | |
1304 | header.protocol_id = PROTO_RAW; | |
1305 | header.num_logic_probes = sigma->num_probes; | |
1306 | header.num_analog_probes = 0; | |
1307 | session_bus(session_device_id, &packet); | |
1308 | ||
1309 | /* Add capture source. */ | |
1310 | source_add(0, G_IO_IN, 10, receive_data, sdi); | |
1311 | ||
1312 | sigma->state.state = SIGMA_CAPTURE; | |
1313 | ||
1314 | return SR_OK; | |
1315 | } | |
1316 | ||
1317 | static void hw_stop_acquisition(int device_index, gpointer session_device_id) | |
1318 | { | |
1319 | struct sr_device_instance *sdi; | |
1320 | struct sigma *sigma; | |
1321 | uint8_t modestatus; | |
1322 | ||
1323 | if (!(sdi = sr_get_device_instance(device_instances, device_index))) | |
1324 | return; | |
1325 | ||
1326 | sigma = sdi->priv; | |
1327 | ||
1328 | session_device_id = session_device_id; | |
1329 | ||
1330 | /* Stop acquisition. */ | |
1331 | sigma_set_register(WRITE_MODE, 0x11, sigma); | |
1332 | ||
1333 | /* Set SDRAM Read Enable. */ | |
1334 | sigma_set_register(WRITE_MODE, 0x02, sigma); | |
1335 | ||
1336 | /* Get the current position. */ | |
1337 | sigma_read_pos(&sigma->state.stoppos, &sigma->state.triggerpos, sigma); | |
1338 | ||
1339 | /* Check if trigger has fired. */ | |
1340 | modestatus = sigma_get_register(READ_MODE, sigma); | |
1341 | if (modestatus & 0x20) { | |
1342 | sigma->state.triggerchunk = sigma->state.triggerpos / 512; | |
1343 | ||
1344 | } else | |
1345 | sigma->state.triggerchunk = -1; | |
1346 | ||
1347 | sigma->state.chunks_downloaded = 0; | |
1348 | ||
1349 | sigma->state.state = SIGMA_DOWNLOAD; | |
1350 | } | |
1351 | ||
1352 | struct device_plugin asix_sigma_plugin_info = { | |
1353 | "asix-sigma", | |
1354 | 1, | |
1355 | hw_init, | |
1356 | hw_cleanup, | |
1357 | hw_opendev, | |
1358 | hw_closedev, | |
1359 | hw_get_device_info, | |
1360 | hw_get_status, | |
1361 | hw_get_capabilities, | |
1362 | hw_set_configuration, | |
1363 | hw_start_acquisition, | |
1364 | hw_stop_acquisition, | |
1365 | }; |