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Commit | Line | Data |
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1 | ## | |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 3 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | ## | |
19 | ||
20 | ''' | |
21 | Instruction tuple: (d, i, ro, wo, rep, format string) | |
22 | ||
23 | The placeholders d and i are the number of bytes in the instruction | |
24 | used for the displacement and the immediate operand, respectively. An | |
25 | operand consisting of more than one byte is assembled in little endian | |
26 | order. | |
27 | The placeholders ro and wo are the number of bytes the instruction | |
28 | is expected to read or write, respectively. These counts are used | |
29 | for both memory and I/O access, but not for immediate operands. | |
30 | A negative value indicates that the operand byte order is big endian | |
31 | rather than the usual little endian. | |
32 | The placeholder rep is a boolean used to mark repeating instructions. | |
33 | The format string should refer to the {d} and {i} operands by name. | |
34 | Displacements are interpreted as signed integers, whereas immediate | |
35 | operands are always read as unsigned. The tables for instructions | |
36 | operating on the IX/IY index registers additionally use {r} in the | |
37 | format string as a placeholder for the register name. | |
38 | Relative jump instructions may specify {j} instead of {d} to output | |
39 | the displacement relative to the start of the instruction. | |
40 | ''' | |
41 | ||
42 | # Instructions without a prefix | |
43 | main_instructions = { | |
44 | 0x00: (0, 0, 0, 0, False, 'NOP'), | |
45 | 0x01: (0, 2, 0, 0, False, 'LD BC,{i:04H}h'), | |
46 | 0x02: (0, 0, 0, 1, False, 'LD (BC),A'), | |
47 | 0x03: (0, 0, 0, 0, False, 'INC BC'), | |
48 | 0x04: (0, 0, 0, 0, False, 'INC B'), | |
49 | 0x05: (0, 0, 0, 0, False, 'DEC B'), | |
50 | 0x06: (0, 1, 0, 0, False, 'LD B,{i:02H}h'), | |
51 | 0x07: (0, 0, 0, 0, False, 'RLCA'), | |
52 | 0x08: (0, 0, 0, 0, False, 'EX AF,AF\''), | |
53 | 0x09: (0, 0, 0, 0, False, 'ADD HL,BC'), | |
54 | 0x0A: (0, 0, 1, 0, False, 'LD A,(BC)'), | |
55 | 0x0B: (0, 0, 0, 0, False, 'DEC BC'), | |
56 | 0x0C: (0, 0, 0, 0, False, 'INC C'), | |
57 | 0x0D: (0, 0, 0, 0, False, 'DEC C'), | |
58 | 0x0E: (0, 1, 0, 0, False, 'LD C,{i:02H}h'), | |
59 | 0x0F: (0, 0, 0, 0, False, 'RRCA'), | |
60 | ||
61 | 0x10: (1, 0, 0, 0, False, 'DJNZ ${j:+d}'), | |
62 | 0x11: (0, 2, 0, 0, False, 'LD DE,{i:04H}h'), | |
63 | 0x12: (0, 0, 0, 1, False, 'LD (DE),A'), | |
64 | 0x13: (0, 0, 0, 0, False, 'INC DE'), | |
65 | 0x14: (0, 0, 0, 0, False, 'INC D'), | |
66 | 0x15: (0, 0, 0, 0, False, 'DEC D'), | |
67 | 0x16: (0, 1, 0, 0, False, 'LD D,{i:02H}h'), | |
68 | 0x17: (0, 0, 0, 0, False, 'RLA'), | |
69 | 0x18: (1, 0, 0, 0, False, 'JR ${j:+d}'), | |
70 | 0x19: (0, 0, 0, 0, False, 'ADD HL,DE'), | |
71 | 0x1A: (0, 0, 1, 0, False, 'LD A,(DE)'), | |
72 | 0x1B: (0, 0, 0, 0, False, 'DEC DE'), | |
73 | 0x1C: (0, 0, 0, 0, False, 'INC E'), | |
74 | 0x1D: (0, 0, 0, 0, False, 'DEC E'), | |
75 | 0x1E: (0, 1, 0, 0, False, 'LD E,{i:02H}h'), | |
76 | 0x1F: (0, 0, 0, 0, False, 'RRA'), | |
77 | ||
78 | 0x20: (1, 0, 0, 0, False, 'JR NZ,${j:+d}'), | |
79 | 0x21: (0, 2, 0, 0, False, 'LD HL,{i:04H}h'), | |
80 | 0x22: (0, 2, 0, 2, False, 'LD ({i:04H}h),HL'), | |
81 | 0x23: (0, 0, 0, 0, False, 'INC HL'), | |
82 | 0x24: (0, 0, 0, 0, False, 'INC H'), | |
83 | 0x25: (0, 0, 0, 0, False, 'DEC H'), | |
84 | 0x26: (0, 1, 0, 0, False, 'LD H,{i:02H}h'), | |
85 | 0x27: (0, 0, 0, 0, False, 'DAA'), | |
86 | 0x28: (1, 0, 0, 0, False, 'JR Z,${j:+d}'), | |
87 | 0x29: (0, 0, 0, 0, False, 'ADD HL,HL'), | |
88 | 0x2A: (0, 2, 2, 0, False, 'LD HL,({i:04H}h)'), | |
89 | 0x2B: (0, 0, 0, 0, False, 'DEC HL'), | |
90 | 0x2C: (0, 0, 0, 0, False, 'INC L'), | |
91 | 0x2D: (0, 0, 0, 0, False, 'DEC L'), | |
92 | 0x2E: (0, 1, 0, 0, False, 'LD L,{i:02H}h'), | |
93 | 0x2F: (0, 0, 0, 0, False, 'CPL'), | |
94 | ||
95 | 0x30: (1, 0, 0, 0, False, 'JR NC,${j:+d}'), | |
96 | 0x31: (0, 2, 0, 0, False, 'LD SP,{i:04H}h'), | |
97 | 0x32: (0, 2, 0, 1, False, 'LD ({i:04H}h),A'), | |
98 | 0x33: (0, 0, 0, 0, False, 'INC SP'), | |
99 | 0x34: (0, 0, 1, 1, False, 'INC (HL)'), | |
100 | 0x35: (0, 0, 1, 1, False, 'DEC (HL)'), | |
101 | 0x36: (0, 1, 0, 1, False, 'LD (HL),{i:02H}h'), | |
102 | 0x37: (0, 0, 0, 0, False, 'SCF'), | |
103 | 0x38: (1, 0, 0, 0, False, 'JR C,${j:+d}'), | |
104 | 0x39: (0, 0, 0, 0, False, 'ADD HL,SP'), | |
105 | 0x3A: (0, 2, 1, 0, False, 'LD A,({i:04H}h)'), | |
106 | 0x3B: (0, 0, 0, 0, False, 'DEC SP'), | |
107 | 0x3C: (0, 0, 0, 0, False, 'INC A'), | |
108 | 0x3D: (0, 0, 0, 0, False, 'DEC A'), | |
109 | 0x3E: (0, 1, 0, 0, False, 'LD A,{i:02H}h'), | |
110 | 0x3F: (0, 0, 0, 0, False, 'CCF'), | |
111 | ||
112 | 0x40: (0, 0, 0, 0, False, 'LD B,B'), | |
113 | 0x41: (0, 0, 0, 0, False, 'LD B,C'), | |
114 | 0x42: (0, 0, 0, 0, False, 'LD B,D'), | |
115 | 0x43: (0, 0, 0, 0, False, 'LD B,E'), | |
116 | 0x44: (0, 0, 0, 0, False, 'LD B,H'), | |
117 | 0x45: (0, 0, 0, 0, False, 'LD B,L'), | |
118 | 0x46: (0, 0, 1, 0, False, 'LD B,(HL)'), | |
119 | 0x47: (0, 0, 0, 0, False, 'LD B,A'), | |
120 | 0x48: (0, 0, 0, 0, False, 'LD C,B'), | |
121 | 0x49: (0, 0, 0, 0, False, 'LD C,C'), | |
122 | 0x4A: (0, 0, 0, 0, False, 'LD C,D'), | |
123 | 0x4B: (0, 0, 0, 0, False, 'LD C,E'), | |
124 | 0x4C: (0, 0, 0, 0, False, 'LD C,H'), | |
125 | 0x4D: (0, 0, 0, 0, False, 'LD C,L'), | |
126 | 0x4E: (0, 0, 1, 0, False, 'LD C,(HL)'), | |
127 | 0x4F: (0, 0, 0, 0, False, 'LD C,A'), | |
128 | ||
129 | 0x50: (0, 0, 0, 0, False, 'LD D,B'), | |
130 | 0x51: (0, 0, 0, 0, False, 'LD D,C'), | |
131 | 0x52: (0, 0, 0, 0, False, 'LD D,D'), | |
132 | 0x53: (0, 0, 0, 0, False, 'LD D,E'), | |
133 | 0x54: (0, 0, 0, 0, False, 'LD D,H'), | |
134 | 0x55: (0, 0, 0, 0, False, 'LD D,L'), | |
135 | 0x56: (0, 0, 1, 0, False, 'LD D,(HL)'), | |
136 | 0x57: (0, 0, 0, 0, False, 'LD D,A'), | |
137 | 0x58: (0, 0, 0, 0, False, 'LD E,B'), | |
138 | 0x59: (0, 0, 0, 0, False, 'LD E,C'), | |
139 | 0x5A: (0, 0, 0, 0, False, 'LD E,D'), | |
140 | 0x5B: (0, 0, 0, 0, False, 'LD E,E'), | |
141 | 0x5C: (0, 0, 0, 0, False, 'LD E,H'), | |
142 | 0x5D: (0, 0, 0, 0, False, 'LD E,L'), | |
143 | 0x5E: (0, 0, 1, 0, False, 'LD E,(HL)'), | |
144 | 0x5F: (0, 0, 0, 0, False, 'LD E,A'), | |
145 | ||
146 | 0x60: (0, 0, 0, 0, False, 'LD H,B'), | |
147 | 0x61: (0, 0, 0, 0, False, 'LD H,C'), | |
148 | 0x62: (0, 0, 0, 0, False, 'LD H,D'), | |
149 | 0x63: (0, 0, 0, 0, False, 'LD H,E'), | |
150 | 0x64: (0, 0, 0, 0, False, 'LD H,H'), | |
151 | 0x65: (0, 0, 0, 0, False, 'LD H,L'), | |
152 | 0x66: (0, 0, 1, 0, False, 'LD H,(HL)'), | |
153 | 0x67: (0, 0, 0, 0, False, 'LD H,A'), | |
154 | 0x68: (0, 0, 0, 0, False, 'LD L,B'), | |
155 | 0x69: (0, 0, 0, 0, False, 'LD L,C'), | |
156 | 0x6A: (0, 0, 0, 0, False, 'LD L,D'), | |
157 | 0x6B: (0, 0, 0, 0, False, 'LD L,E'), | |
158 | 0x6C: (0, 0, 0, 0, False, 'LD L,H'), | |
159 | 0x6D: (0, 0, 0, 0, False, 'LD L,L'), | |
160 | 0x6E: (0, 0, 1, 0, False, 'LD L,(HL)'), | |
161 | 0x6F: (0, 0, 0, 0, False, 'LD L,A'), | |
162 | ||
163 | 0x70: (0, 0, 0, 1, False, 'LD (HL),B'), | |
164 | 0x71: (0, 0, 0, 1, False, 'LD (HL),C'), | |
165 | 0x72: (0, 0, 0, 1, False, 'LD (HL),D'), | |
166 | 0x73: (0, 0, 0, 1, False, 'LD (HL),E'), | |
167 | 0x74: (0, 0, 0, 1, False, 'LD (HL),H'), | |
168 | 0x75: (0, 0, 0, 1, False, 'LD (HL),L'), | |
169 | 0x76: (0, 0, 0, 0, False, 'HALT'), | |
170 | 0x77: (0, 0, 0, 1, False, 'LD (HL),A'), | |
171 | 0x78: (0, 0, 0, 0, False, 'LD A,B'), | |
172 | 0x79: (0, 0, 0, 0, False, 'LD A,C'), | |
173 | 0x7A: (0, 0, 0, 0, False, 'LD A,D'), | |
174 | 0x7B: (0, 0, 0, 0, False, 'LD A,E'), | |
175 | 0x7C: (0, 0, 0, 0, False, 'LD A,H'), | |
176 | 0x7D: (0, 0, 0, 0, False, 'LD A,L'), | |
177 | 0x7E: (0, 0, 1, 0, False, 'LD A,(HL)'), | |
178 | 0x7F: (0, 0, 0, 0, False, 'LD A,A'), | |
179 | ||
180 | 0x80: (0, 0, 0, 0, False, 'ADD A,B'), | |
181 | 0x81: (0, 0, 0, 0, False, 'ADD A,C'), | |
182 | 0x82: (0, 0, 0, 0, False, 'ADD A,D'), | |
183 | 0x83: (0, 0, 0, 0, False, 'ADD A,E'), | |
184 | 0x84: (0, 0, 0, 0, False, 'ADD A,H'), | |
185 | 0x85: (0, 0, 0, 0, False, 'ADD A,L'), | |
186 | 0x86: (0, 0, 1, 0, False, 'ADD A,(HL)'), | |
187 | 0x87: (0, 0, 0, 0, False, 'ADD A,A'), | |
188 | 0x88: (0, 0, 0, 0, False, 'ADC A,B'), | |
189 | 0x89: (0, 0, 0, 0, False, 'ADC A,C'), | |
190 | 0x8A: (0, 0, 0, 0, False, 'ADC A,D'), | |
191 | 0x8B: (0, 0, 0, 0, False, 'ADC A,E'), | |
192 | 0x8C: (0, 0, 0, 0, False, 'ADC A,H'), | |
193 | 0x8D: (0, 0, 0, 0, False, 'ADC A,L'), | |
194 | 0x8E: (0, 0, 1, 0, False, 'ADC A,(HL)'), | |
195 | 0x8F: (0, 0, 0, 0, False, 'ADC A,A'), | |
196 | ||
197 | 0x90: (0, 0, 0, 0, False, 'SUB B'), | |
198 | 0x91: (0, 0, 0, 0, False, 'SUB C'), | |
199 | 0x92: (0, 0, 0, 0, False, 'SUB D'), | |
200 | 0x93: (0, 0, 0, 0, False, 'SUB E'), | |
201 | 0x94: (0, 0, 0, 0, False, 'SUB H'), | |
202 | 0x95: (0, 0, 0, 0, False, 'SUB L'), | |
203 | 0x96: (0, 0, 1, 0, False, 'SUB (HL)'), | |
204 | 0x97: (0, 0, 0, 0, False, 'SUB A'), | |
205 | 0x98: (0, 0, 0, 0, False, 'SBC A,B'), | |
206 | 0x99: (0, 0, 0, 0, False, 'SBC A,C'), | |
207 | 0x9A: (0, 0, 0, 0, False, 'SBC A,D'), | |
208 | 0x9B: (0, 0, 0, 0, False, 'SBC A,E'), | |
209 | 0x9C: (0, 0, 0, 0, False, 'SBC A,H'), | |
210 | 0x9D: (0, 0, 0, 0, False, 'SBC A,L'), | |
211 | 0x9E: (0, 0, 1, 0, False, 'SBC A,(HL)'), | |
212 | 0x9F: (0, 0, 0, 0, False, 'SBC A,A'), | |
213 | ||
214 | 0xA0: (0, 0, 0, 0, False, 'AND B'), | |
215 | 0xA1: (0, 0, 0, 0, False, 'AND C'), | |
216 | 0xA2: (0, 0, 0, 0, False, 'AND D'), | |
217 | 0xA3: (0, 0, 0, 0, False, 'AND E'), | |
218 | 0xA4: (0, 0, 0, 0, False, 'AND H'), | |
219 | 0xA5: (0, 0, 0, 0, False, 'AND L'), | |
220 | 0xA6: (0, 0, 1, 0, False, 'AND (HL)'), | |
221 | 0xA7: (0, 0, 0, 0, False, 'AND A'), | |
222 | 0xA8: (0, 0, 0, 0, False, 'XOR B'), | |
223 | 0xA9: (0, 0, 0, 0, False, 'XOR C'), | |
224 | 0xAA: (0, 0, 0, 0, False, 'XOR D'), | |
225 | 0xAB: (0, 0, 0, 0, False, 'XOR E'), | |
226 | 0xAC: (0, 0, 0, 0, False, 'XOR H'), | |
227 | 0xAD: (0, 0, 0, 0, False, 'XOR L'), | |
228 | 0xAE: (0, 0, 1, 0, False, 'XOR (HL)'), | |
229 | 0xAF: (0, 0, 0, 0, False, 'XOR A'), | |
230 | ||
231 | 0xB0: (0, 0, 0, 0, False, 'OR B'), | |
232 | 0xB1: (0, 0, 0, 0, False, 'OR C'), | |
233 | 0xB2: (0, 0, 0, 0, False, 'OR D'), | |
234 | 0xB3: (0, 0, 0, 0, False, 'OR E'), | |
235 | 0xB4: (0, 0, 0, 0, False, 'OR H'), | |
236 | 0xB5: (0, 0, 0, 0, False, 'OR L'), | |
237 | 0xB6: (0, 0, 1, 0, False, 'OR (HL)'), | |
238 | 0xB7: (0, 0, 0, 0, False, 'OR A'), | |
239 | 0xB8: (0, 0, 0, 0, False, 'CP B'), | |
240 | 0xB9: (0, 0, 0, 0, False, 'CP C'), | |
241 | 0xBA: (0, 0, 0, 0, False, 'CP D'), | |
242 | 0xBB: (0, 0, 0, 0, False, 'CP E'), | |
243 | 0xBC: (0, 0, 0, 0, False, 'CP H'), | |
244 | 0xBD: (0, 0, 0, 0, False, 'CP L'), | |
245 | 0xBE: (0, 0, 1, 0, False, 'CP (HL)'), | |
246 | 0xBF: (0, 0, 0, 0, False, 'CP A'), | |
247 | ||
248 | 0xC0: (0, 0, 2, 0, False, 'RET NZ'), | |
249 | 0xC1: (0, 0, 2, 0, False, 'POP BC'), | |
250 | 0xC2: (0, 2, 0, 0, False, 'JP NZ,{i:04H}h'), | |
251 | 0xC3: (0, 2, 0, 0, False, 'JP {i:04H}h'), | |
252 | 0xC4: (0, 2, 0,-2, False, 'CALL NZ,{i:04H}h'), | |
253 | 0xC5: (0, 0, 0,-2, False, 'PUSH BC'), | |
254 | 0xC6: (0, 1, 0, 0, False, 'ADD A,{i:02H}h'), | |
255 | 0xC7: (0, 0, 0,-2, False, 'RST 00h'), | |
256 | 0xC8: (0, 0, 2, 0, False, 'RET Z'), | |
257 | 0xC9: (0, 0, 2, 0, False, 'RET'), | |
258 | 0xCA: (0, 2, 0, 0, False, 'JP Z,{i:04H}h'), | |
259 | ||
260 | 0xCC: (0, 2, 0,-2, False, 'CALL Z,{i:04H}h'), | |
261 | 0xCD: (0, 2, 0,-2, False, 'CALL {i:04H}h'), | |
262 | 0xCE: (0, 1, 0, 0, False, 'ADC A,{i:02H}h'), | |
263 | 0xCF: (0, 0, 0,-2, False, 'RST 08h'), | |
264 | ||
265 | 0xD0: (0, 0, 2, 0, False, 'RET NC'), | |
266 | 0xD1: (0, 0, 2, 0, False, 'POP DE'), | |
267 | 0xD2: (0, 2, 0, 0, False, 'JP NC,{i:04H}h'), | |
268 | 0xD3: (0, 1, 0, 1, False, 'OUT ({i:02H}h),A'), | |
269 | 0xD4: (0, 2, 0,-2, False, 'CALL NC,{i:04H}h'), | |
270 | 0xD5: (0, 0, 0,-2, False, 'PUSH DE'), | |
271 | 0xD6: (0, 1, 0, 0, False, 'SUB {i:02H}h'), | |
272 | 0xD7: (0, 0, 0,-2, False, 'RST 10h'), | |
273 | 0xD8: (0, 0, 2, 0, False, 'RET C'), | |
274 | 0xD9: (0, 0, 0, 0, False, 'EXX'), | |
275 | 0xDA: (0, 2, 0, 0, False, 'JP C,{i:04H}h'), | |
276 | 0xDB: (0, 1, 1, 0, False, 'IN A,({i:02H}h)'), | |
277 | 0xDC: (0, 2, 0,-2, False, 'CALL C,{i:04H}h'), | |
278 | ||
279 | 0xDE: (0, 1, 0, 0, False, 'SBC A,{i:02H}h'), | |
280 | 0xDF: (0, 0, 0,-2, False, 'RST 18h'), | |
281 | ||
282 | 0xE0: (0, 0, 2, 0, False, 'RET PO'), | |
283 | 0xE1: (0, 0, 2, 0, False, 'POP HL'), | |
284 | 0xE2: (0, 2, 0, 0, False, 'JP PO,{i:04H}h'), | |
285 | 0xE3: (0, 0, 2, 2, False, 'EX (SP),HL'), | |
286 | 0xE4: (0, 2, 0,-2, False, 'CALL PO,{i:04H}h'), | |
287 | 0xE5: (0, 0, 0,-2, False, 'PUSH HL'), | |
288 | 0xE6: (0, 1, 0, 0, False, 'AND {i:02H}h'), | |
289 | 0xE7: (0, 0, 0,-2, False, 'RST 20h'), | |
290 | 0xE8: (0, 0, 2, 0, False, 'RET PE'), | |
291 | 0xE9: (0, 0, 0, 0, False, 'JP (HL)'), | |
292 | 0xEA: (0, 2, 0, 0, False, 'JP PE,{i:04H}h'), | |
293 | 0xEB: (0, 0, 0, 0, False, 'EX DE,HL'), | |
294 | 0xEC: (0, 2, 0,-2, False, 'CALL PE,{i:04H}h'), | |
295 | ||
296 | 0xEE: (0, 1, 0, 0, False, 'XOR {i:02H}h'), | |
297 | 0xEF: (0, 0, 0,-2, False, 'RST 28h'), | |
298 | ||
299 | 0xF0: (0, 0, 2, 0, False, 'RET P'), | |
300 | 0xF1: (0, 0, 2, 0, False, 'POP AF'), | |
301 | 0xF2: (0, 2, 0, 0, False, 'JP P,{i:04H}h'), | |
302 | 0xF3: (0, 0, 0, 0, False, 'DI'), | |
303 | 0xF4: (0, 2, 0,-2, False, 'CALL P,{i:04H}h'), | |
304 | 0xF5: (0, 0, 0,-2, False, 'PUSH AF'), | |
305 | 0xF6: (0, 1, 0, 0, False, 'OR {i:02H}h'), | |
306 | 0xF7: (0, 0, 0,-2, False, 'RST 30h'), | |
307 | 0xF8: (0, 0, 2, 0, False, 'RET M'), | |
308 | 0xF9: (0, 0, 0, 0, False, 'LD SP,HL'), | |
309 | 0xFA: (0, 2, 0, 0, False, 'JP M,{i:04H}h'), | |
310 | 0xFB: (0, 0, 0, 0, False, 'EI'), | |
311 | 0xFC: (0, 2, 0,-2, False, 'CALL M,{i:04H}h'), | |
312 | ||
313 | 0xFE: (0, 1, 0, 0, False, 'CP {i:02H}h'), | |
314 | 0xFF: (0, 0, 0,-2, False, 'RST 38h') | |
315 | } | |
316 | ||
317 | # Instructions with ED prefix | |
318 | extended_instructions = { | |
319 | 0x40: (0, 0, 1, 0, False, 'IN B,(C)'), | |
320 | 0x41: (0, 0, 0, 1, False, 'OUT (C),B'), | |
321 | 0x42: (0, 0, 0, 0, False, 'SBC HL,BC'), | |
322 | 0x43: (0, 2, 0, 2, False, 'LD ({i:04H}h),BC'), | |
323 | 0x44: (0, 0, 0, 0, False, 'NEG'), | |
324 | 0x45: (0, 0, 2, 0, False, 'RETN'), | |
325 | 0x46: (0, 0, 0, 0, False, 'IM 0'), | |
326 | 0x47: (0, 0, 0, 0, False, 'LD I,A'), | |
327 | 0x48: (0, 0, 1, 0, False, 'IN C,(C)'), | |
328 | 0x49: (0, 0, 0, 1, False, 'OUT (C),C'), | |
329 | 0x4A: (0, 0, 0, 0, False, 'ADC HL,BC'), | |
330 | 0x4B: (0, 2, 2, 0, False, 'LD BC,({i:04H}h)'), | |
331 | 0x4C: (0, 0, 0, 0, False, 'NEG'), | |
332 | 0x4D: (0, 0, 2, 0, False, 'RETI'), | |
333 | 0x4E: (0, 0, 0, 0, False, 'IM 0/1'), | |
334 | 0x4F: (0, 0, 0, 0, False, 'LD R,A'), | |
335 | ||
336 | 0x50: (0, 0, 1, 0, False, 'IN D,(C)'), | |
337 | 0x51: (0, 0, 0, 1, False, 'OUT (C),D'), | |
338 | 0x52: (0, 0, 0, 0, False, 'SBC HL,DE'), | |
339 | 0x53: (0, 2, 0, 2, False, 'LD ({i:04H}h),DE'), | |
340 | 0x54: (0, 0, 0, 0, False, 'NEG'), | |
341 | 0x55: (0, 0, 2, 0, False, 'RETN'), | |
342 | 0x56: (0, 0, 0, 0, False, 'IM 1'), | |
343 | 0x57: (0, 0, 0, 0, False, 'LD A,I'), | |
344 | 0x58: (0, 0, 1, 0, False, 'IN E,(C)'), | |
345 | 0x59: (0, 0, 0, 1, False, 'OUT (C),E'), | |
346 | 0x5A: (0, 0, 0, 0, False, 'ADC HL,DE'), | |
347 | 0x5B: (0, 2, 2, 0, False, 'LD DE,({i:04H}h)'), | |
348 | 0x5C: (0, 0, 0, 0, False, 'NEG'), | |
349 | 0x5D: (0, 0, 2, 0, False, 'RETN'), | |
350 | 0x5E: (0, 0, 0, 0, False, 'IM 2'), | |
351 | 0x5F: (0, 0, 0, 0, False, 'LD A,R'), | |
352 | ||
353 | 0x60: (0, 0, 1, 0, False, 'IN H,(C)'), | |
354 | 0x61: (0, 0, 0, 1, False, 'OUT (C),H'), | |
355 | 0x62: (0, 0, 0, 0, False, 'SBC HL,HL'), | |
356 | 0x63: (0, 2, 0, 2, False, 'LD ({i:04H}h),HL'), | |
357 | 0x64: (0, 0, 0, 0, False, 'NEG'), | |
358 | 0x65: (0, 0, 2, 0, False, 'RETN'), | |
359 | 0x66: (0, 0, 0, 0, False, 'IM 0'), | |
360 | 0x67: (0, 0, 1, 1, False, 'RRD'), | |
361 | 0x68: (0, 0, 1, 0, False, 'IN L,(C)'), | |
362 | 0x69: (0, 0, 0, 1, False, 'OUT (C),L'), | |
363 | 0x6A: (0, 0, 0, 0, False, 'ADC HL,HL'), | |
364 | 0x6B: (0, 2, 2, 0, False, 'LD HL,({i:04H}h)'), | |
365 | 0x6C: (0, 0, 0, 0, False, 'NEG'), | |
366 | 0x6D: (0, 0, 2, 0, False, 'RETN'), | |
367 | 0x6E: (0, 0, 0, 0, False, 'IM 0/1'), | |
368 | 0x6F: (0, 0, 1, 1, False, 'RLD'), | |
369 | ||
370 | 0x70: (0, 0, 1, 0, False, 'IN (C)'), | |
371 | 0x71: (0, 0, 0, 1, False, 'OUT (C),0'), | |
372 | 0x72: (0, 0, 0, 0, False, 'SBC HL,SP'), | |
373 | 0x73: (0, 2, 0, 2, False, 'LD ({i:04H}h),SP'), | |
374 | 0x74: (0, 0, 0, 0, False, 'NEG'), | |
375 | 0x75: (0, 0, 2, 0, False, 'RETN'), | |
376 | 0x76: (0, 0, 0, 0, False, 'IM 1'), | |
377 | ||
378 | 0x78: (0, 0, 1, 0, False, 'IN A,(C)'), | |
379 | 0x79: (0, 0, 0, 1, False, 'OUT (C),A'), | |
380 | 0x7A: (0, 0, 0, 0, False, 'ADC HL,SP'), | |
381 | 0x7B: (0, 2, 2, 0, False, 'LD SP,({i:04H}h)'), | |
382 | 0x7C: (0, 0, 0, 0, False, 'NEG'), | |
383 | 0x7D: (0, 0, 2, 0, False, 'RETN'), | |
384 | 0x7E: (0, 0, 0, 0, False, 'IM 2'), | |
385 | ||
386 | 0xA0: (0, 0, 1, 1, False, 'LDI'), | |
387 | 0xA1: (0, 0, 1, 0, False, 'CPI'), | |
388 | 0xA2: (0, 0, 1, 1, False, 'INI'), | |
389 | 0xA3: (0, 0, 1, 1, False, 'OUTI'), | |
390 | ||
391 | 0xA8: (0, 0, 1, 1, False, 'LDD'), | |
392 | 0xA9: (0, 0, 1, 0, False, 'CPD'), | |
393 | 0xAA: (0, 0, 1, 1, False, 'IND'), | |
394 | 0xAB: (0, 0, 1, 1, False, 'OUTD'), | |
395 | ||
396 | 0xB0: (0, 0, 1, 1, True, 'LDIR'), | |
397 | 0xB1: (0, 0, 1, 0, True, 'CPIR'), | |
398 | 0xB2: (0, 0, 1, 1, True, 'INIR'), | |
399 | 0xB3: (0, 0, 1, 1, True, 'OTIR'), | |
400 | ||
401 | 0xB8: (0, 0, 1, 1, True, 'LDDR'), | |
402 | 0xB9: (0, 0, 1, 0, True, 'CPDR'), | |
403 | 0xBA: (0, 0, 1, 1, True, 'INDR'), | |
404 | 0xBB: (0, 0, 1, 1, True, 'OTDR') | |
405 | } | |
406 | ||
407 | # Instructions with CB prefix | |
408 | bit_instructions = { | |
409 | 0x00: (0, 0, 0, 0, False, 'RLC B'), | |
410 | 0x01: (0, 0, 0, 0, False, 'RLC C'), | |
411 | 0x02: (0, 0, 0, 0, False, 'RLC D'), | |
412 | 0x03: (0, 0, 0, 0, False, 'RLC E'), | |
413 | 0x04: (0, 0, 0, 0, False, 'RLC H'), | |
414 | 0x05: (0, 0, 0, 0, False, 'RLC L'), | |
415 | 0x06: (0, 0, 1, 1, False, 'RLC (HL)'), | |
416 | 0x07: (0, 0, 0, 0, False, 'RLC A'), | |
417 | 0x08: (0, 0, 0, 0, False, 'RRC B'), | |
418 | 0x09: (0, 0, 0, 0, False, 'RRC C'), | |
419 | 0x0A: (0, 0, 0, 0, False, 'RRC D'), | |
420 | 0x0B: (0, 0, 0, 0, False, 'RRC E'), | |
421 | 0x0C: (0, 0, 0, 0, False, 'RRC H'), | |
422 | 0x0D: (0, 0, 0, 0, False, 'RRC L'), | |
423 | 0x0E: (0, 0, 1, 1, False, 'RRC (HL)'), | |
424 | 0x0F: (0, 0, 0, 0, False, 'RRC A'), | |
425 | ||
426 | 0x10: (0, 0, 0, 0, False, 'RL B'), | |
427 | 0x11: (0, 0, 0, 0, False, 'RL C'), | |
428 | 0x12: (0, 0, 0, 0, False, 'RL D'), | |
429 | 0x13: (0, 0, 0, 0, False, 'RL E'), | |
430 | 0x14: (0, 0, 0, 0, False, 'RL H'), | |
431 | 0x15: (0, 0, 0, 0, False, 'RL L'), | |
432 | 0x16: (0, 0, 1, 1, False, 'RL (HL)'), | |
433 | 0x17: (0, 0, 0, 0, False, 'RL A'), | |
434 | 0x18: (0, 0, 0, 0, False, 'RR B'), | |
435 | 0x19: (0, 0, 0, 0, False, 'RR C'), | |
436 | 0x1A: (0, 0, 0, 0, False, 'RR D'), | |
437 | 0x1B: (0, 0, 0, 0, False, 'RR E'), | |
438 | 0x1C: (0, 0, 0, 0, False, 'RR H'), | |
439 | 0x1D: (0, 0, 0, 0, False, 'RR L'), | |
440 | 0x1E: (0, 0, 1, 1, False, 'RR (HL)'), | |
441 | 0x1F: (0, 0, 0, 0, False, 'RR A'), | |
442 | ||
443 | 0x20: (0, 0, 0, 0, False, 'SLA B'), | |
444 | 0x21: (0, 0, 0, 0, False, 'SLA C'), | |
445 | 0x22: (0, 0, 0, 0, False, 'SLA D'), | |
446 | 0x23: (0, 0, 0, 0, False, 'SLA E'), | |
447 | 0x24: (0, 0, 0, 0, False, 'SLA H'), | |
448 | 0x25: (0, 0, 0, 0, False, 'SLA L'), | |
449 | 0x26: (0, 0, 1, 1, False, 'SLA (HL)'), | |
450 | 0x27: (0, 0, 0, 0, False, 'SLA A'), | |
451 | 0x28: (0, 0, 0, 0, False, 'SRA B'), | |
452 | 0x29: (0, 0, 0, 0, False, 'SRA C'), | |
453 | 0x2A: (0, 0, 0, 0, False, 'SRA D'), | |
454 | 0x2B: (0, 0, 0, 0, False, 'SRA E'), | |
455 | 0x2C: (0, 0, 0, 0, False, 'SRA H'), | |
456 | 0x2D: (0, 0, 0, 0, False, 'SRA L'), | |
457 | 0x2E: (0, 0, 1, 1, False, 'SRA (HL)'), | |
458 | 0x2F: (0, 0, 0, 0, False, 'SRA A'), | |
459 | ||
460 | 0x30: (0, 0, 0, 0, False, 'SLL B'), | |
461 | 0x31: (0, 0, 0, 0, False, 'SLL C'), | |
462 | 0x32: (0, 0, 0, 0, False, 'SLL D'), | |
463 | 0x33: (0, 0, 0, 0, False, 'SLL E'), | |
464 | 0x34: (0, 0, 0, 0, False, 'SLL H'), | |
465 | 0x35: (0, 0, 0, 0, False, 'SLL L'), | |
466 | 0x36: (0, 0, 1, 1, False, 'SLL (HL)'), | |
467 | 0x37: (0, 0, 0, 0, False, 'SLL A'), | |
468 | 0x38: (0, 0, 0, 0, False, 'SRL B'), | |
469 | 0x39: (0, 0, 0, 0, False, 'SRL C'), | |
470 | 0x3A: (0, 0, 0, 0, False, 'SRL D'), | |
471 | 0x3B: (0, 0, 0, 0, False, 'SRL E'), | |
472 | 0x3C: (0, 0, 0, 0, False, 'SRL H'), | |
473 | 0x3D: (0, 0, 0, 0, False, 'SRL L'), | |
474 | 0x3E: (0, 0, 1, 1, False, 'SRL (HL)'), | |
475 | 0x3F: (0, 0, 0, 0, False, 'SRL A'), | |
476 | ||
477 | 0x40: (0, 0, 0, 0, False, 'BIT 0,B'), | |
478 | 0x41: (0, 0, 0, 0, False, 'BIT 0,C'), | |
479 | 0x42: (0, 0, 0, 0, False, 'BIT 0,D'), | |
480 | 0x43: (0, 0, 0, 0, False, 'BIT 0,E'), | |
481 | 0x44: (0, 0, 0, 0, False, 'BIT 0,H'), | |
482 | 0x45: (0, 0, 0, 0, False, 'BIT 0,L'), | |
483 | 0x46: (0, 0, 1, 0, False, 'BIT 0,(HL)'), | |
484 | 0x47: (0, 0, 0, 0, False, 'BIT 0,A'), | |
485 | 0x48: (0, 0, 0, 0, False, 'BIT 1,B'), | |
486 | 0x49: (0, 0, 0, 0, False, 'BIT 1,C'), | |
487 | 0x4A: (0, 0, 0, 0, False, 'BIT 1,D'), | |
488 | 0x4B: (0, 0, 0, 0, False, 'BIT 1,E'), | |
489 | 0x4C: (0, 0, 0, 0, False, 'BIT 1,H'), | |
490 | 0x4D: (0, 0, 0, 0, False, 'BIT 1,L'), | |
491 | 0x4E: (0, 0, 1, 0, False, 'BIT 1,(HL)'), | |
492 | 0x4F: (0, 0, 0, 0, False, 'BIT 1,A'), | |
493 | ||
494 | 0x50: (0, 0, 0, 0, False, 'BIT 2,B'), | |
495 | 0x51: (0, 0, 0, 0, False, 'BIT 2,C'), | |
496 | 0x52: (0, 0, 0, 0, False, 'BIT 2,D'), | |
497 | 0x53: (0, 0, 0, 0, False, 'BIT 2,E'), | |
498 | 0x54: (0, 0, 0, 0, False, 'BIT 2,H'), | |
499 | 0x55: (0, 0, 0, 0, False, 'BIT 2,L'), | |
500 | 0x56: (0, 0, 1, 0, False, 'BIT 2,(HL)'), | |
501 | 0x57: (0, 0, 0, 0, False, 'BIT 2,A'), | |
502 | 0x58: (0, 0, 0, 0, False, 'BIT 3,B'), | |
503 | 0x59: (0, 0, 0, 0, False, 'BIT 3,C'), | |
504 | 0x5A: (0, 0, 0, 0, False, 'BIT 3,D'), | |
505 | 0x5B: (0, 0, 0, 0, False, 'BIT 3,E'), | |
506 | 0x5C: (0, 0, 0, 0, False, 'BIT 3,H'), | |
507 | 0x5D: (0, 0, 0, 0, False, 'BIT 3,L'), | |
508 | 0x5E: (0, 0, 1, 0, False, 'BIT 3,(HL)'), | |
509 | 0x5F: (0, 0, 0, 0, False, 'BIT 3,A'), | |
510 | ||
511 | 0x60: (0, 0, 0, 0, False, 'BIT 4,B'), | |
512 | 0x61: (0, 0, 0, 0, False, 'BIT 4,C'), | |
513 | 0x62: (0, 0, 0, 0, False, 'BIT 4,D'), | |
514 | 0x63: (0, 0, 0, 0, False, 'BIT 4,E'), | |
515 | 0x64: (0, 0, 0, 0, False, 'BIT 4,H'), | |
516 | 0x65: (0, 0, 0, 0, False, 'BIT 4,L'), | |
517 | 0x66: (0, 0, 1, 0, False, 'BIT 4,(HL)'), | |
518 | 0x67: (0, 0, 0, 0, False, 'BIT 4,A'), | |
519 | 0x68: (0, 0, 0, 0, False, 'BIT 5,B'), | |
520 | 0x69: (0, 0, 0, 0, False, 'BIT 5,C'), | |
521 | 0x6A: (0, 0, 0, 0, False, 'BIT 5,D'), | |
522 | 0x6B: (0, 0, 0, 0, False, 'BIT 5,E'), | |
523 | 0x6C: (0, 0, 0, 0, False, 'BIT 5,H'), | |
524 | 0x6D: (0, 0, 0, 0, False, 'BIT 5,L'), | |
525 | 0x6E: (0, 0, 1, 0, False, 'BIT 5,(HL)'), | |
526 | 0x6F: (0, 0, 0, 0, False, 'BIT 5,A'), | |
527 | ||
528 | 0x70: (0, 0, 0, 0, False, 'BIT 6,B'), | |
529 | 0x71: (0, 0, 0, 0, False, 'BIT 6,C'), | |
530 | 0x72: (0, 0, 0, 0, False, 'BIT 6,D'), | |
531 | 0x73: (0, 0, 0, 0, False, 'BIT 6,E'), | |
532 | 0x74: (0, 0, 0, 0, False, 'BIT 6,H'), | |
533 | 0x75: (0, 0, 0, 0, False, 'BIT 6,L'), | |
534 | 0x76: (0, 0, 1, 0, False, 'BIT 6,(HL)'), | |
535 | 0x77: (0, 0, 0, 0, False, 'BIT 6,A'), | |
536 | 0x78: (0, 0, 0, 0, False, 'BIT 7,B'), | |
537 | 0x79: (0, 0, 0, 0, False, 'BIT 7,C'), | |
538 | 0x7A: (0, 0, 0, 0, False, 'BIT 7,D'), | |
539 | 0x7B: (0, 0, 0, 0, False, 'BIT 7,E'), | |
540 | 0x7C: (0, 0, 0, 0, False, 'BIT 7,H'), | |
541 | 0x7D: (0, 0, 0, 0, False, 'BIT 7,L'), | |
542 | 0x7E: (0, 0, 1, 0, False, 'BIT 7,(HL)'), | |
543 | 0x7F: (0, 0, 0, 0, False, 'BIT 7,A'), | |
544 | ||
545 | 0x80: (0, 0, 0, 0, False, 'RES 0,B'), | |
546 | 0x81: (0, 0, 0, 0, False, 'RES 0,C'), | |
547 | 0x82: (0, 0, 0, 0, False, 'RES 0,D'), | |
548 | 0x83: (0, 0, 0, 0, False, 'RES 0,E'), | |
549 | 0x84: (0, 0, 0, 0, False, 'RES 0,H'), | |
550 | 0x85: (0, 0, 0, 0, False, 'RES 0,L'), | |
551 | 0x86: (0, 0, 1, 1, False, 'RES 0,(HL)'), | |
552 | 0x87: (0, 0, 0, 0, False, 'RES 0,A'), | |
553 | 0x88: (0, 0, 0, 0, False, 'RES 1,B'), | |
554 | 0x89: (0, 0, 0, 0, False, 'RES 1,C'), | |
555 | 0x8A: (0, 0, 0, 0, False, 'RES 1,D'), | |
556 | 0x8B: (0, 0, 0, 0, False, 'RES 1,E'), | |
557 | 0x8C: (0, 0, 0, 0, False, 'RES 1,H'), | |
558 | 0x8D: (0, 0, 0, 0, False, 'RES 1,L'), | |
559 | 0x8E: (0, 0, 1, 1, False, 'RES 1,(HL)'), | |
560 | 0x8F: (0, 0, 0, 0, False, 'RES 1,A'), | |
561 | ||
562 | 0x90: (0, 0, 0, 0, False, 'RES 2,B'), | |
563 | 0x91: (0, 0, 0, 0, False, 'RES 2,C'), | |
564 | 0x92: (0, 0, 0, 0, False, 'RES 2,D'), | |
565 | 0x93: (0, 0, 0, 0, False, 'RES 2,E'), | |
566 | 0x94: (0, 0, 0, 0, False, 'RES 2,H'), | |
567 | 0x95: (0, 0, 0, 0, False, 'RES 2,L'), | |
568 | 0x96: (0, 0, 1, 1, False, 'RES 2,(HL)'), | |
569 | 0x97: (0, 0, 0, 0, False, 'RES 2,A'), | |
570 | 0x98: (0, 0, 0, 0, False, 'RES 3,B'), | |
571 | 0x99: (0, 0, 0, 0, False, 'RES 3,C'), | |
572 | 0x9A: (0, 0, 0, 0, False, 'RES 3,D'), | |
573 | 0x9B: (0, 0, 0, 0, False, 'RES 3,E'), | |
574 | 0x9C: (0, 0, 0, 0, False, 'RES 3,H'), | |
575 | 0x9D: (0, 0, 0, 0, False, 'RES 3,L'), | |
576 | 0x9E: (0, 0, 1, 1, False, 'RES 3,(HL)'), | |
577 | 0x9F: (0, 0, 0, 0, False, 'RES 3,A'), | |
578 | ||
579 | 0xA0: (0, 0, 0, 0, False, 'RES 4,B'), | |
580 | 0xA1: (0, 0, 0, 0, False, 'RES 4,C'), | |
581 | 0xA2: (0, 0, 0, 0, False, 'RES 4,D'), | |
582 | 0xA3: (0, 0, 0, 0, False, 'RES 4,E'), | |
583 | 0xA4: (0, 0, 0, 0, False, 'RES 4,H'), | |
584 | 0xA5: (0, 0, 0, 0, False, 'RES 4,L'), | |
585 | 0xA6: (0, 0, 1, 1, False, 'RES 4,(HL)'), | |
586 | 0xA7: (0, 0, 0, 0, False, 'RES 4,A'), | |
587 | 0xA8: (0, 0, 0, 0, False, 'RES 5,B'), | |
588 | 0xA9: (0, 0, 0, 0, False, 'RES 5,C'), | |
589 | 0xAA: (0, 0, 0, 0, False, 'RES 5,D'), | |
590 | 0xAB: (0, 0, 0, 0, False, 'RES 5,E'), | |
591 | 0xAC: (0, 0, 0, 0, False, 'RES 5,H'), | |
592 | 0xAD: (0, 0, 0, 0, False, 'RES 5,L'), | |
593 | 0xAE: (0, 0, 1, 1, False, 'RES 5,(HL)'), | |
594 | 0xAF: (0, 0, 0, 0, False, 'RES 5,A'), | |
595 | ||
596 | 0xB0: (0, 0, 0, 0, False, 'RES 6,B'), | |
597 | 0xB1: (0, 0, 0, 0, False, 'RES 6,C'), | |
598 | 0xB2: (0, 0, 0, 0, False, 'RES 6,D'), | |
599 | 0xB3: (0, 0, 0, 0, False, 'RES 6,E'), | |
600 | 0xB4: (0, 0, 0, 0, False, 'RES 6,H'), | |
601 | 0xB5: (0, 0, 0, 0, False, 'RES 6,L'), | |
602 | 0xB6: (0, 0, 1, 1, False, 'RES 6,(HL)'), | |
603 | 0xB7: (0, 0, 0, 0, False, 'RES 6,A'), | |
604 | 0xB8: (0, 0, 0, 0, False, 'RES 7,B'), | |
605 | 0xB9: (0, 0, 0, 0, False, 'RES 7,C'), | |
606 | 0xBA: (0, 0, 0, 0, False, 'RES 7,D'), | |
607 | 0xBB: (0, 0, 0, 0, False, 'RES 7,E'), | |
608 | 0xBC: (0, 0, 0, 0, False, 'RES 7,H'), | |
609 | 0xBD: (0, 0, 0, 0, False, 'RES 7,L'), | |
610 | 0xBE: (0, 0, 1, 1, False, 'RES 7,(HL)'), | |
611 | 0xBF: (0, 0, 0, 0, False, 'RES 7,A'), | |
612 | ||
613 | 0xC0: (0, 0, 0, 0, False, 'SET 0,B'), | |
614 | 0xC1: (0, 0, 0, 0, False, 'SET 0,C'), | |
615 | 0xC2: (0, 0, 0, 0, False, 'SET 0,D'), | |
616 | 0xC3: (0, 0, 0, 0, False, 'SET 0,E'), | |
617 | 0xC4: (0, 0, 0, 0, False, 'SET 0,H'), | |
618 | 0xC5: (0, 0, 0, 0, False, 'SET 0,L'), | |
619 | 0xC6: (0, 0, 1, 1, False, 'SET 0,(HL)'), | |
620 | 0xC7: (0, 0, 0, 0, False, 'SET 0,A'), | |
621 | 0xC8: (0, 0, 0, 0, False, 'SET 1,B'), | |
622 | 0xC9: (0, 0, 0, 0, False, 'SET 1,C'), | |
623 | 0xCA: (0, 0, 0, 0, False, 'SET 1,D'), | |
624 | 0xCB: (0, 0, 0, 0, False, 'SET 1,E'), | |
625 | 0xCC: (0, 0, 0, 0, False, 'SET 1,H'), | |
626 | 0xCD: (0, 0, 0, 0, False, 'SET 1,L'), | |
627 | 0xCE: (0, 0, 1, 1, False, 'SET 1,(HL)'), | |
628 | 0xCF: (0, 0, 0, 0, False, 'SET 1,A'), | |
629 | ||
630 | 0xD0: (0, 0, 0, 0, False, 'SET 2,B'), | |
631 | 0xD1: (0, 0, 0, 0, False, 'SET 2,C'), | |
632 | 0xD2: (0, 0, 0, 0, False, 'SET 2,D'), | |
633 | 0xD3: (0, 0, 0, 0, False, 'SET 2,E'), | |
634 | 0xD4: (0, 0, 0, 0, False, 'SET 2,H'), | |
635 | 0xD5: (0, 0, 0, 0, False, 'SET 2,L'), | |
636 | 0xD6: (0, 0, 1, 1, False, 'SET 2,(HL)'), | |
637 | 0xD7: (0, 0, 0, 0, False, 'SET 2,A'), | |
638 | 0xD8: (0, 0, 0, 0, False, 'SET 3,B'), | |
639 | 0xD9: (0, 0, 0, 0, False, 'SET 3,C'), | |
640 | 0xDA: (0, 0, 0, 0, False, 'SET 3,D'), | |
641 | 0xDB: (0, 0, 0, 0, False, 'SET 3,E'), | |
642 | 0xDC: (0, 0, 0, 0, False, 'SET 3,H'), | |
643 | 0xDD: (0, 0, 0, 0, False, 'SET 3,L'), | |
644 | 0xDE: (0, 0, 1, 1, False, 'SET 3,(HL)'), | |
645 | 0xDF: (0, 0, 0, 0, False, 'SET 3,A'), | |
646 | ||
647 | 0xE0: (0, 0, 0, 0, False, 'SET 4,B'), | |
648 | 0xE1: (0, 0, 0, 0, False, 'SET 4,C'), | |
649 | 0xE2: (0, 0, 0, 0, False, 'SET 4,D'), | |
650 | 0xE3: (0, 0, 0, 0, False, 'SET 4,E'), | |
651 | 0xE4: (0, 0, 0, 0, False, 'SET 4,H'), | |
652 | 0xE5: (0, 0, 0, 0, False, 'SET 4,L'), | |
653 | 0xE6: (0, 0, 1, 1, False, 'SET 4,(HL)'), | |
654 | 0xE7: (0, 0, 0, 0, False, 'SET 4,A'), | |
655 | 0xE8: (0, 0, 0, 0, False, 'SET 5,B'), | |
656 | 0xE9: (0, 0, 0, 0, False, 'SET 5,C'), | |
657 | 0xEA: (0, 0, 0, 0, False, 'SET 5,D'), | |
658 | 0xEB: (0, 0, 0, 0, False, 'SET 5,E'), | |
659 | 0xEC: (0, 0, 0, 0, False, 'SET 5,H'), | |
660 | 0xED: (0, 0, 0, 0, False, 'SET 5,L'), | |
661 | 0xEE: (0, 0, 1, 1, False, 'SET 5,(HL)'), | |
662 | 0xEF: (0, 0, 0, 0, False, 'SET 5,A'), | |
663 | ||
664 | 0xF0: (0, 0, 0, 0, False, 'SET 6,B'), | |
665 | 0xF1: (0, 0, 0, 0, False, 'SET 6,C'), | |
666 | 0xF2: (0, 0, 0, 0, False, 'SET 6,D'), | |
667 | 0xF3: (0, 0, 0, 0, False, 'SET 6,E'), | |
668 | 0xF4: (0, 0, 0, 0, False, 'SET 6,H'), | |
669 | 0xF5: (0, 0, 0, 0, False, 'SET 6,L'), | |
670 | 0xF6: (0, 0, 1, 1, False, 'SET 6,(HL)'), | |
671 | 0xF7: (0, 0, 0, 0, False, 'SET 6,A'), | |
672 | 0xF8: (0, 0, 0, 0, False, 'SET 7,B'), | |
673 | 0xF9: (0, 0, 0, 0, False, 'SET 7,C'), | |
674 | 0xFA: (0, 0, 0, 0, False, 'SET 7,D'), | |
675 | 0xFB: (0, 0, 0, 0, False, 'SET 7,E'), | |
676 | 0xFC: (0, 0, 0, 0, False, 'SET 7,H'), | |
677 | 0xFD: (0, 0, 0, 0, False, 'SET 7,L'), | |
678 | 0xFE: (0, 0, 1, 1, False, 'SET 7,(HL)'), | |
679 | 0xFF: (0, 0, 0, 0, False, 'SET 7,A') | |
680 | } | |
681 | ||
682 | # Instructions with DD or FD prefix | |
683 | index_instructions = { | |
684 | 0x09: (0, 0, 0, 0, False, 'ADD {r},BC'), | |
685 | ||
686 | 0x19: (0, 0, 0, 0, False, 'ADD {r},DE'), | |
687 | ||
688 | 0x21: (0, 2, 0, 0, False, 'LD {r},{i:04H}h'), | |
689 | 0x22: (0, 2, 0, 2, False, 'LD ({i:04H}h),{r}'), | |
690 | 0x23: (0, 0, 0, 0, False, 'INC {r}'), | |
691 | 0x24: (0, 0, 0, 0, False, 'INC {r}h'), | |
692 | 0x25: (0, 0, 0, 0, False, 'DEC {r}h'), | |
693 | 0x26: (0, 1, 0, 0, False, 'LD {r}h,{i:02H}h'), | |
694 | ||
695 | 0x29: (0, 0, 0, 0, False, 'ADD {r},{r}'), | |
696 | 0x2A: (0, 2, 2, 0, False, 'LD {r},({i:04H}h)'), | |
697 | 0x2B: (0, 0, 0, 0, False, 'DEC {r}'), | |
698 | 0x2C: (0, 0, 0, 0, False, 'INC {r}l'), | |
699 | 0x2D: (0, 0, 0, 0, False, 'DEC {r}l'), | |
700 | 0x2E: (0, 1, 0, 0, False, 'LD {r}l,{i:02H}h'), | |
701 | ||
702 | 0x34: (1, 0, 1, 1, False, 'INC ({r}{d:+d})'), | |
703 | 0x35: (1, 0, 1, 1, False, 'DEC ({r}{d:+d})'), | |
704 | 0x36: (1, 1, 0, 1, False, 'LD ({r}{d:+d}),{i:02H}h'), | |
705 | ||
706 | 0x39: (0, 0, 0, 0, False, 'ADD {r},SP'), | |
707 | ||
708 | 0x44: (0, 0, 0, 0, False, 'LD B,{r}h'), | |
709 | 0x45: (0, 0, 0, 0, False, 'LD B,{r}l'), | |
710 | 0x46: (1, 0, 1, 0, False, 'LD B,({r}{d:+d})'), | |
711 | ||
712 | 0x4C: (0, 0, 0, 0, False, 'LD C,{r}h'), | |
713 | 0x4D: (0, 0, 0, 0, False, 'LD C,{r}l'), | |
714 | 0x4E: (1, 0, 1, 0, False, 'LD C,({r}{d:+d})'), | |
715 | ||
716 | 0x54: (0, 0, 0, 0, False, 'LD D,{r}h'), | |
717 | 0x55: (0, 0, 0, 0, False, 'LD D,{r}l'), | |
718 | 0x56: (1, 0, 1, 0, False, 'LD D,({r}{d:+d})'), | |
719 | ||
720 | 0x5C: (0, 0, 0, 0, False, 'LD E,{r}h'), | |
721 | 0x5D: (0, 0, 0, 0, False, 'LD E,{r}l'), | |
722 | 0x5E: (1, 0, 1, 0, False, 'LD E,({r}{d:+d})'), | |
723 | ||
724 | 0x60: (0, 0, 0, 0, False, 'LD {r}h,B'), | |
725 | 0x61: (0, 0, 0, 0, False, 'LD {r}h,C'), | |
726 | 0x62: (0, 0, 0, 0, False, 'LD {r}h,D'), | |
727 | 0x63: (0, 0, 0, 0, False, 'LD {r}h,E'), | |
728 | 0x64: (0, 0, 0, 0, False, 'LD {r}h,{r}h'), | |
729 | 0x65: (0, 0, 0, 0, False, 'LD {r}h,{r}l'), | |
730 | 0x66: (1, 0, 1, 0, False, 'LD H,({r}{d:+d})'), | |
731 | 0x67: (0, 0, 0, 0, False, 'LD {r}h,A'), | |
732 | 0x68: (0, 0, 0, 0, False, 'LD {r}l,B'), | |
733 | 0x69: (0, 0, 0, 0, False, 'LD {r}l,C'), | |
734 | 0x6A: (0, 0, 0, 0, False, 'LD {r}l,D'), | |
735 | 0x6B: (0, 0, 0, 0, False, 'LD {r}l,E'), | |
736 | 0x6C: (0, 0, 0, 0, False, 'LD {r}l,{r}h'), | |
737 | 0x6D: (0, 0, 0, 0, False, 'LD {r}l,{r}l'), | |
738 | 0x6E: (1, 0, 1, 0, False, 'LD L,({r}{d:+d})'), | |
739 | 0x6F: (0, 0, 0, 0, False, 'LD {r}l,A'), | |
740 | ||
741 | 0x70: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),B'), | |
742 | 0x71: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),C'), | |
743 | 0x72: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),D'), | |
744 | 0x73: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),E'), | |
745 | 0x74: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),H'), | |
746 | 0x75: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),L'), | |
747 | ||
748 | 0x77: (1, 0, 0, 1, False, 'LD ({r}{d:+d}),A'), | |
749 | ||
750 | 0x7C: (0, 0, 0, 0, False, 'LD A,{r}h'), | |
751 | 0x7D: (0, 0, 0, 0, False, 'LD A,{r}l'), | |
752 | 0x7E: (1, 0, 1, 0, False, 'LD A,({r}{d:+d})'), | |
753 | ||
754 | 0x84: (0, 0, 0, 0, False, 'ADD A,{r}h'), | |
755 | 0x85: (0, 0, 0, 0, False, 'ADD A,{r}l'), | |
756 | 0x86: (1, 0, 1, 0, False, 'ADD A,({r}{d:+d})'), | |
757 | ||
758 | 0x8C: (0, 0, 0, 0, False, 'ADC A,{r}h'), | |
759 | 0x8D: (0, 0, 0, 0, False, 'ADC A,{r}l'), | |
760 | 0x8E: (1, 0, 1, 0, False, 'ADC A,({r}{d:+d})'), | |
761 | ||
762 | 0x94: (0, 0, 0, 0, False, 'SUB {r}h'), | |
763 | 0x95: (0, 0, 0, 0, False, 'SUB {r}l'), | |
764 | 0x96: (1, 0, 1, 0, False, 'SUB ({r}{d:+d})'), | |
765 | ||
766 | 0x9C: (0, 0, 0, 0, False, 'SBC A,{r}h'), | |
767 | 0x9D: (0, 0, 0, 0, False, 'SBC A,{r}l'), | |
768 | 0x9E: (1, 0, 1, 0, False, 'SBC A,({r}{d:+d})'), | |
769 | ||
770 | 0xA4: (0, 0, 0, 0, False, 'AND {r}h'), | |
771 | 0xA5: (0, 0, 0, 0, False, 'AND {r}l'), | |
772 | 0xA6: (1, 0, 1, 0, False, 'AND ({r}{d:+d})'), | |
773 | ||
774 | 0xAC: (0, 0, 0, 0, False, 'XOR {r}h'), | |
775 | 0xAD: (0, 0, 0, 0, False, 'XOR {r}l'), | |
776 | 0xAE: (1, 0, 1, 0, False, 'XOR ({r}{d:+d})'), | |
777 | ||
778 | 0xB4: (0, 0, 0, 0, False, 'OR {r}h'), | |
779 | 0xB5: (0, 0, 0, 0, False, 'OR {r}l'), | |
780 | 0xB6: (1, 0, 1, 0, False, 'OR ({r}{d:+d})'), | |
781 | ||
782 | 0xBC: (0, 0, 0, 0, False, 'CP {r}h'), | |
783 | 0xBD: (0, 0, 0, 0, False, 'CP {r}l'), | |
784 | 0xBE: (1, 0, 1, 0, False, 'CP ({r}{d:+d})'), | |
785 | ||
786 | 0xE1: (0, 0, 2, 0, False, 'POP {r}'), | |
787 | ||
788 | 0xE3: (0, 0, 2, 2, False, 'EX (SP),{r}'), | |
789 | ||
790 | 0xE5: (0, 0, 0,-2, False, 'PUSH {r}'), | |
791 | ||
792 | 0xE9: (0, 0, 0, 0, False, 'JP ({r})'), | |
793 | ||
794 | 0xF9: (0, 0, 0, 0, False, 'LD SP,{r}') | |
795 | } | |
796 | ||
797 | # Instructions with DD CB or FD CB prefix. | |
798 | # For these instructions, the displacement precedes the opcode byte. | |
799 | # This is handled as a special case in the code, and thus the entries | |
800 | # in this table specify 0 for the displacement length. | |
801 | index_bit_instructions = { | |
802 | 0x00: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),B'), | |
803 | 0x01: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),C'), | |
804 | 0x02: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),D'), | |
805 | 0x03: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),E'), | |
806 | 0x04: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),H'), | |
807 | 0x05: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),L'), | |
808 | 0x06: (0, 0, 1, 1, False, 'RLC ({r}{d:+d})'), | |
809 | 0x07: (0, 0, 1, 1, False, 'RLC ({r}{d:+d}),A'), | |
810 | 0x08: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),B'), | |
811 | 0x09: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),C'), | |
812 | 0x0A: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),D'), | |
813 | 0x0B: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),E'), | |
814 | 0x0C: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),H'), | |
815 | 0x0D: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),L'), | |
816 | 0x0E: (0, 0, 1, 1, False, 'RRC ({r}{d:+d})'), | |
817 | 0x0F: (0, 0, 1, 1, False, 'RRC ({r}{d:+d}),A'), | |
818 | ||
819 | 0x10: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),B'), | |
820 | 0x11: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),C'), | |
821 | 0x12: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),D'), | |
822 | 0x13: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),E'), | |
823 | 0x14: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),H'), | |
824 | 0x15: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),L'), | |
825 | 0x16: (0, 0, 1, 1, False, 'RL ({r}{d:+d})'), | |
826 | 0x17: (0, 0, 1, 1, False, 'RL ({r}{d:+d}),A'), | |
827 | 0x18: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),B'), | |
828 | 0x19: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),C'), | |
829 | 0x1A: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),D'), | |
830 | 0x1B: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),E'), | |
831 | 0x1C: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),H'), | |
832 | 0x1D: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),L'), | |
833 | 0x1E: (0, 0, 1, 1, False, 'RR ({r}{d:+d})'), | |
834 | 0x1F: (0, 0, 1, 1, False, 'RR ({r}{d:+d}),A'), | |
835 | ||
836 | 0x20: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),B'), | |
837 | 0x21: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),C'), | |
838 | 0x22: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),D'), | |
839 | 0x23: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),E'), | |
840 | 0x24: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),H'), | |
841 | 0x25: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),L'), | |
842 | 0x26: (0, 0, 1, 1, False, 'SLA ({r}{d:+d})'), | |
843 | 0x27: (0, 0, 1, 1, False, 'SLA ({r}{d:+d}),A'), | |
844 | 0x28: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),B'), | |
845 | 0x29: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),C'), | |
846 | 0x2A: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),D'), | |
847 | 0x2B: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),E'), | |
848 | 0x2C: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),H'), | |
849 | 0x2D: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),L'), | |
850 | 0x2E: (0, 0, 1, 1, False, 'SRA ({r}{d:+d})'), | |
851 | 0x2F: (0, 0, 1, 1, False, 'SRA ({r}{d:+d}),A'), | |
852 | ||
853 | 0x30: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),B'), | |
854 | 0x31: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),C'), | |
855 | 0x32: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),D'), | |
856 | 0x33: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),E'), | |
857 | 0x34: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),H'), | |
858 | 0x35: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),L'), | |
859 | 0x36: (0, 0, 1, 1, False, 'SLL ({r}{d:+d})'), | |
860 | 0x37: (0, 0, 1, 1, False, 'SLL ({r}{d:+d}),A'), | |
861 | 0x38: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),B'), | |
862 | 0x39: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),C'), | |
863 | 0x3A: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),D'), | |
864 | 0x3B: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),E'), | |
865 | 0x3C: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),H'), | |
866 | 0x3D: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),L'), | |
867 | 0x3E: (0, 0, 1, 1, False, 'SRL ({r}{d:+d})'), | |
868 | 0x3F: (0, 0, 1, 1, False, 'SRL ({r}{d:+d}),A'), | |
869 | ||
870 | 0x40: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), | |
871 | 0x41: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), | |
872 | 0x42: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), | |
873 | 0x43: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), | |
874 | 0x44: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), | |
875 | 0x45: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), | |
876 | 0x46: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), | |
877 | 0x47: (0, 0, 1, 0, False, 'BIT 0,({r}{d:+d})'), | |
878 | 0x48: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), | |
879 | 0x49: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), | |
880 | 0x4A: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), | |
881 | 0x4B: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), | |
882 | 0x4C: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), | |
883 | 0x4D: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), | |
884 | 0x4E: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), | |
885 | 0x4F: (0, 0, 1, 0, False, 'BIT 1,({r}{d:+d})'), | |
886 | ||
887 | 0x50: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), | |
888 | 0x51: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), | |
889 | 0x52: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), | |
890 | 0x53: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), | |
891 | 0x54: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), | |
892 | 0x55: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), | |
893 | 0x56: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), | |
894 | 0x57: (0, 0, 1, 0, False, 'BIT 2,({r}{d:+d})'), | |
895 | 0x58: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), | |
896 | 0x59: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), | |
897 | 0x5A: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), | |
898 | 0x5B: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), | |
899 | 0x5C: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), | |
900 | 0x5D: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), | |
901 | 0x5E: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), | |
902 | 0x5F: (0, 0, 1, 0, False, 'BIT 3,({r}{d:+d})'), | |
903 | ||
904 | 0x60: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), | |
905 | 0x61: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), | |
906 | 0x62: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), | |
907 | 0x63: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), | |
908 | 0x64: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), | |
909 | 0x65: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), | |
910 | 0x66: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), | |
911 | 0x67: (0, 0, 1, 0, False, 'BIT 4,({r}{d:+d})'), | |
912 | 0x68: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), | |
913 | 0x69: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), | |
914 | 0x6A: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), | |
915 | 0x6B: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), | |
916 | 0x6C: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), | |
917 | 0x6D: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), | |
918 | 0x6E: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), | |
919 | 0x6F: (0, 0, 1, 0, False, 'BIT 5,({r}{d:+d})'), | |
920 | ||
921 | 0x70: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), | |
922 | 0x71: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), | |
923 | 0x72: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), | |
924 | 0x73: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), | |
925 | 0x74: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), | |
926 | 0x75: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), | |
927 | 0x76: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), | |
928 | 0x77: (0, 0, 1, 0, False, 'BIT 6,({r}{d:+d})'), | |
929 | 0x78: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), | |
930 | 0x79: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), | |
931 | 0x7A: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), | |
932 | 0x7B: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), | |
933 | 0x7C: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), | |
934 | 0x7D: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), | |
935 | 0x7E: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), | |
936 | 0x7F: (0, 0, 1, 0, False, 'BIT 7,({r}{d:+d})'), | |
937 | ||
938 | 0x80: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),B'), | |
939 | 0x81: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),C'), | |
940 | 0x82: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),D'), | |
941 | 0x83: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),E'), | |
942 | 0x84: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),H'), | |
943 | 0x85: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),L'), | |
944 | 0x86: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d})'), | |
945 | 0x87: (0, 0, 1, 1, False, 'RES 0,({r}{d:+d}),A'), | |
946 | 0x88: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),B'), | |
947 | 0x89: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),C'), | |
948 | 0x8A: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),D'), | |
949 | 0x8B: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),E'), | |
950 | 0x8C: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),H'), | |
951 | 0x8D: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),L'), | |
952 | 0x8E: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d})'), | |
953 | 0x8F: (0, 0, 1, 1, False, 'RES 1,({r}{d:+d}),A'), | |
954 | ||
955 | 0x90: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),B'), | |
956 | 0x91: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),C'), | |
957 | 0x92: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),D'), | |
958 | 0x93: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),E'), | |
959 | 0x94: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),H'), | |
960 | 0x95: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),L'), | |
961 | 0x96: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d})'), | |
962 | 0x97: (0, 0, 1, 1, False, 'RES 2,({r}{d:+d}),A'), | |
963 | 0x98: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),B'), | |
964 | 0x99: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),C'), | |
965 | 0x9A: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),D'), | |
966 | 0x9B: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),E'), | |
967 | 0x9C: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),H'), | |
968 | 0x9D: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),L'), | |
969 | 0x9E: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d})'), | |
970 | 0x9F: (0, 0, 1, 1, False, 'RES 3,({r}{d:+d}),A'), | |
971 | ||
972 | 0xA0: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),B'), | |
973 | 0xA1: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),C'), | |
974 | 0xA2: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),D'), | |
975 | 0xA3: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),E'), | |
976 | 0xA4: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),H'), | |
977 | 0xA5: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),L'), | |
978 | 0xA6: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d})'), | |
979 | 0xA7: (0, 0, 1, 1, False, 'RES 4,({r}{d:+d}),A'), | |
980 | 0xA8: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),B'), | |
981 | 0xA9: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),C'), | |
982 | 0xAA: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),D'), | |
983 | 0xAB: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),E'), | |
984 | 0xAC: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),H'), | |
985 | 0xAD: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),L'), | |
986 | 0xAE: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d})'), | |
987 | 0xAF: (0, 0, 1, 1, False, 'RES 5,({r}{d:+d}),A'), | |
988 | ||
989 | 0xB0: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),B'), | |
990 | 0xB1: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),C'), | |
991 | 0xB2: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),D'), | |
992 | 0xB3: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),E'), | |
993 | 0xB4: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),H'), | |
994 | 0xB5: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),L'), | |
995 | 0xB6: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d})'), | |
996 | 0xB7: (0, 0, 1, 1, False, 'RES 6,({r}{d:+d}),A'), | |
997 | 0xB8: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),B'), | |
998 | 0xB9: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),C'), | |
999 | 0xBA: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),D'), | |
1000 | 0xBB: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),E'), | |
1001 | 0xBC: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),H'), | |
1002 | 0xBD: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),L'), | |
1003 | 0xBE: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d})'), | |
1004 | 0xBF: (0, 0, 1, 1, False, 'RES 7,({r}{d:+d}),A'), | |
1005 | ||
1006 | 0xC0: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),B'), | |
1007 | 0xC1: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),C'), | |
1008 | 0xC2: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),D'), | |
1009 | 0xC3: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),E'), | |
1010 | 0xC4: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),H'), | |
1011 | 0xC5: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),L'), | |
1012 | 0xC6: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d})'), | |
1013 | 0xC7: (0, 0, 1, 1, False, 'SET 0,({r}{d:+d}),A'), | |
1014 | 0xC8: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),B'), | |
1015 | 0xC9: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),C'), | |
1016 | 0xCA: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),D'), | |
1017 | 0xCB: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),E'), | |
1018 | 0xCC: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),H'), | |
1019 | 0xCD: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),L'), | |
1020 | 0xCE: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d})'), | |
1021 | 0xCF: (0, 0, 1, 1, False, 'SET 1,({r}{d:+d}),A'), | |
1022 | ||
1023 | 0xD0: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),B'), | |
1024 | 0xD1: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),C'), | |
1025 | 0xD2: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),D'), | |
1026 | 0xD3: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),E'), | |
1027 | 0xD4: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),H'), | |
1028 | 0xD5: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),L'), | |
1029 | 0xD6: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d})'), | |
1030 | 0xD7: (0, 0, 1, 1, False, 'SET 2,({r}{d:+d}),A'), | |
1031 | 0xD8: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),B'), | |
1032 | 0xD9: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),C'), | |
1033 | 0xDA: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),D'), | |
1034 | 0xDB: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),E'), | |
1035 | 0xDC: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),H'), | |
1036 | 0xDD: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),L'), | |
1037 | 0xDE: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d})'), | |
1038 | 0xDF: (0, 0, 1, 1, False, 'SET 3,({r}{d:+d}),A'), | |
1039 | ||
1040 | 0xE0: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),B'), | |
1041 | 0xE1: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),C'), | |
1042 | 0xE2: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),D'), | |
1043 | 0xE3: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),E'), | |
1044 | 0xE4: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),H'), | |
1045 | 0xE5: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),L'), | |
1046 | 0xE6: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d})'), | |
1047 | 0xE7: (0, 0, 1, 1, False, 'SET 4,({r}{d:+d}),A'), | |
1048 | 0xE8: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),B'), | |
1049 | 0xE9: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),C'), | |
1050 | 0xEA: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),D'), | |
1051 | 0xEB: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),E'), | |
1052 | 0xEC: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),H'), | |
1053 | 0xED: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),L'), | |
1054 | 0xEE: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d})'), | |
1055 | 0xEF: (0, 0, 1, 1, False, 'SET 5,({r}{d:+d}),A'), | |
1056 | ||
1057 | 0xF0: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),B'), | |
1058 | 0xF1: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),C'), | |
1059 | 0xF2: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),D'), | |
1060 | 0xF3: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),E'), | |
1061 | 0xF4: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),H'), | |
1062 | 0xF5: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),L'), | |
1063 | 0xF6: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d})'), | |
1064 | 0xF7: (0, 0, 1, 1, False, 'SET 6,({r}{d:+d}),A'), | |
1065 | 0xF8: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),B'), | |
1066 | 0xF9: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),C'), | |
1067 | 0xFA: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),D'), | |
1068 | 0xFB: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),E'), | |
1069 | 0xFC: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),H'), | |
1070 | 0xFD: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),L'), | |
1071 | 0xFE: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d})'), | |
1072 | 0xFF: (0, 0, 1, 1, False, 'SET 7,({r}{d:+d}),A') | |
1073 | } | |
1074 | ||
1075 | instr_table_by_prefix = { | |
1076 | 0: (main_instructions, ''), | |
1077 | 0xED: (extended_instructions, ''), | |
1078 | 0xCB: (bit_instructions, ''), | |
1079 | 0xDD: (index_instructions, 'IX'), | |
1080 | 0xFD: (index_instructions, 'IY'), | |
1081 | 0xDDCB: (index_bit_instructions, 'IX'), | |
1082 | 0xFDCB: (index_bit_instructions, 'IY') | |
1083 | } |