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1 | ## | |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2010-2014 Uwe Hermann <uwe@hermann-uwe.de> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, write to the Free Software | |
18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | ## | |
20 | ||
21 | # TODO: Look into arbitration, collision detection, clock synchronisation, etc. | |
22 | # TODO: Implement support for 10bit slave addresses. | |
23 | # TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0). | |
24 | # TODO: Implement support for detecting various bus errors. | |
25 | ||
26 | import sigrokdecode as srd | |
27 | ||
28 | ''' | |
29 | OUTPUT_PYTHON format: | |
30 | ||
31 | Packet: | |
32 | [<ptype>, <pdata>] | |
33 | ||
34 | <ptype>: | |
35 | - 'START' (START condition) | |
36 | - 'START REPEAT' (Repeated START condition) | |
37 | - 'ADDRESS READ' (Slave address, read) | |
38 | - 'ADDRESS WRITE' (Slave address, write) | |
39 | - 'DATA READ' (Data, read) | |
40 | - 'DATA WRITE' (Data, write) | |
41 | - 'STOP' (STOP condition) | |
42 | - 'ACK' (ACK bit) | |
43 | - 'NACK' (NACK bit) | |
44 | - 'BITS' (<pdata>: list of data/address bits and their ss/es numbers) | |
45 | ||
46 | <pdata> is the data or address byte associated with the 'ADDRESS*' and 'DATA*' | |
47 | command. Slave addresses do not include bit 0 (the READ/WRITE indication bit). | |
48 | For example, a slave address field could be 0x51 (instead of 0xa2). | |
49 | For 'START', 'START REPEAT', 'STOP', 'ACK', and 'NACK' <pdata> is None. | |
50 | ''' | |
51 | ||
52 | # CMD: [annotation-type-index, long annotation, short annotation] | |
53 | proto = { | |
54 | 'START': [0, 'Start', 'S'], | |
55 | 'START REPEAT': [1, 'Start repeat', 'Sr'], | |
56 | 'STOP': [2, 'Stop', 'P'], | |
57 | 'ACK': [3, 'ACK', 'A'], | |
58 | 'NACK': [4, 'NACK', 'N'], | |
59 | 'BIT': [5, 'Bit', 'B'], | |
60 | 'ADDRESS READ': [6, 'Address read', 'AR'], | |
61 | 'ADDRESS WRITE': [7, 'Address write', 'AW'], | |
62 | 'DATA READ': [8, 'Data read', 'DR'], | |
63 | 'DATA WRITE': [9, 'Data write', 'DW'], | |
64 | } | |
65 | ||
66 | class SamplerateError(Exception): | |
67 | pass | |
68 | ||
69 | class Decoder(srd.Decoder): | |
70 | api_version = 2 | |
71 | id = 'i2c' | |
72 | name = 'I²C' | |
73 | longname = 'Inter-Integrated Circuit' | |
74 | desc = 'Two-wire, multi-master, serial bus.' | |
75 | license = 'gplv2+' | |
76 | inputs = ['logic'] | |
77 | outputs = ['i2c'] | |
78 | channels = ( | |
79 | {'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'}, | |
80 | {'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'}, | |
81 | ) | |
82 | options = ( | |
83 | {'id': 'address_format', 'desc': 'Displayed slave address format', | |
84 | 'default': 'shifted', 'values': ('shifted', 'unshifted')}, | |
85 | ) | |
86 | annotations = ( | |
87 | ('start', 'Start condition'), | |
88 | ('repeat-start', 'Repeat start condition'), | |
89 | ('stop', 'Stop condition'), | |
90 | ('ack', 'ACK'), | |
91 | ('nack', 'NACK'), | |
92 | ('bit', 'Data/address bit'), | |
93 | ('address-read', 'Address read'), | |
94 | ('address-write', 'Address write'), | |
95 | ('data-read', 'Data read'), | |
96 | ('data-write', 'Data write'), | |
97 | ('warnings', 'Human-readable warnings'), | |
98 | ) | |
99 | annotation_rows = ( | |
100 | ('bits', 'Bits', (5,)), | |
101 | ('addr-data', 'Address/Data', (0, 1, 2, 3, 4, 6, 7, 8, 9)), | |
102 | ('warnings', 'Warnings', (10,)), | |
103 | ) | |
104 | binary = ( | |
105 | ('address-read', 'Address read'), | |
106 | ('address-write', 'Address write'), | |
107 | ('data-read', 'Data read'), | |
108 | ('data-write', 'Data write'), | |
109 | ) | |
110 | ||
111 | def __init__(self, **kwargs): | |
112 | self.samplerate = None | |
113 | self.ss = self.es = self.byte_ss = -1 | |
114 | self.samplenum = None | |
115 | self.bitcount = 0 | |
116 | self.databyte = 0 | |
117 | self.wr = -1 | |
118 | self.is_repeat_start = 0 | |
119 | self.state = 'FIND START' | |
120 | self.oldscl = self.oldsda = 1 | |
121 | self.oldpins = [1, 1] | |
122 | self.pdu_start = None | |
123 | self.pdu_bits = 0 | |
124 | self.bits = [] | |
125 | ||
126 | def metadata(self, key, value): | |
127 | if key == srd.SRD_CONF_SAMPLERATE: | |
128 | self.samplerate = value | |
129 | ||
130 | def start(self): | |
131 | self.out_python = self.register(srd.OUTPUT_PYTHON) | |
132 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
133 | self.out_binary = self.register(srd.OUTPUT_BINARY) | |
134 | self.out_bitrate = self.register(srd.OUTPUT_META, | |
135 | meta=(int, 'Bitrate', 'Bitrate from Start bit to Stop bit')) | |
136 | ||
137 | def putx(self, data): | |
138 | self.put(self.ss, self.es, self.out_ann, data) | |
139 | ||
140 | def putp(self, data): | |
141 | self.put(self.ss, self.es, self.out_python, data) | |
142 | ||
143 | def putb(self, data): | |
144 | self.put(self.ss, self.es, self.out_binary, data) | |
145 | ||
146 | def is_start_condition(self, scl, sda): | |
147 | # START condition (S): SDA = falling, SCL = high | |
148 | if (self.oldsda == 1 and sda == 0) and scl == 1: | |
149 | return True | |
150 | return False | |
151 | ||
152 | def is_data_bit(self, scl, sda): | |
153 | # Data sampling of receiver: SCL = rising | |
154 | if self.oldscl == 0 and scl == 1: | |
155 | return True | |
156 | return False | |
157 | ||
158 | def is_stop_condition(self, scl, sda): | |
159 | # STOP condition (P): SDA = rising, SCL = high | |
160 | if (self.oldsda == 0 and sda == 1) and scl == 1: | |
161 | return True | |
162 | return False | |
163 | ||
164 | def found_start(self, scl, sda): | |
165 | self.ss, self.es = self.samplenum, self.samplenum | |
166 | self.pdu_start = self.samplenum | |
167 | self.pdu_bits = 0 | |
168 | cmd = 'START REPEAT' if (self.is_repeat_start == 1) else 'START' | |
169 | self.putp([cmd, None]) | |
170 | self.putx([proto[cmd][0], proto[cmd][1:]]) | |
171 | self.state = 'FIND ADDRESS' | |
172 | self.bitcount = self.databyte = 0 | |
173 | self.is_repeat_start = 1 | |
174 | self.wr = -1 | |
175 | self.bits = [] | |
176 | ||
177 | # Gather 8 bits of data plus the ACK/NACK bit. | |
178 | def found_address_or_data(self, scl, sda): | |
179 | # Address and data are transmitted MSB-first. | |
180 | self.databyte <<= 1 | |
181 | self.databyte |= sda | |
182 | ||
183 | # Remember the start of the first data/address bit. | |
184 | if self.bitcount == 0: | |
185 | self.byte_ss = self.samplenum | |
186 | ||
187 | # Store individual bits and their start/end samplenumbers. | |
188 | # In the list, index 0 represents the LSB (I²C transmits MSB-first). | |
189 | self.bits.insert(0, [sda, self.samplenum, self.samplenum]) | |
190 | if self.bitcount > 0: | |
191 | self.bits[1][2] = self.samplenum | |
192 | if self.bitcount == 7: | |
193 | self.bitwidth = self.bits[1][2] - self.bits[2][2] | |
194 | self.bits[0][2] += self.bitwidth | |
195 | ||
196 | # Return if we haven't collected all 8 + 1 bits, yet. | |
197 | if self.bitcount < 7: | |
198 | self.bitcount += 1 | |
199 | return | |
200 | ||
201 | d = self.databyte | |
202 | if self.state == 'FIND ADDRESS': | |
203 | # The READ/WRITE bit is only in address bytes, not data bytes. | |
204 | self.wr = 0 if (self.databyte & 1) else 1 | |
205 | if self.options['address_format'] == 'shifted': | |
206 | d = d >> 1 | |
207 | ||
208 | bin_class = -1 | |
209 | if self.state == 'FIND ADDRESS' and self.wr == 1: | |
210 | cmd = 'ADDRESS WRITE' | |
211 | bin_class = 1 | |
212 | elif self.state == 'FIND ADDRESS' and self.wr == 0: | |
213 | cmd = 'ADDRESS READ' | |
214 | bin_class = 0 | |
215 | elif self.state == 'FIND DATA' and self.wr == 1: | |
216 | cmd = 'DATA WRITE' | |
217 | bin_class = 3 | |
218 | elif self.state == 'FIND DATA' and self.wr == 0: | |
219 | cmd = 'DATA READ' | |
220 | bin_class = 2 | |
221 | ||
222 | self.ss, self.es = self.byte_ss, self.samplenum + self.bitwidth | |
223 | ||
224 | self.putp(['BITS', self.bits]) | |
225 | self.putp([cmd, d]) | |
226 | ||
227 | self.putb((bin_class, bytes([d]))) | |
228 | ||
229 | for bit in self.bits: | |
230 | self.put(bit[1], bit[2], self.out_ann, [5, ['%d' % bit[0]]]) | |
231 | ||
232 | if cmd.startswith('ADDRESS'): | |
233 | self.ss, self.es = self.samplenum, self.samplenum + self.bitwidth | |
234 | w = ['Write', 'Wr', 'W'] if self.wr else ['Read', 'Rd', 'R'] | |
235 | self.putx([proto[cmd][0], w]) | |
236 | self.ss, self.es = self.byte_ss, self.samplenum | |
237 | ||
238 | self.putx([proto[cmd][0], ['%s: %02X' % (proto[cmd][1], d), | |
239 | '%s: %02X' % (proto[cmd][2], d), '%02X' % d]]) | |
240 | ||
241 | # Done with this packet. | |
242 | self.bitcount = self.databyte = 0 | |
243 | self.bits = [] | |
244 | self.state = 'FIND ACK' | |
245 | ||
246 | def get_ack(self, scl, sda): | |
247 | self.ss, self.es = self.samplenum, self.samplenum + self.bitwidth | |
248 | cmd = 'NACK' if (sda == 1) else 'ACK' | |
249 | self.putp([cmd, None]) | |
250 | self.putx([proto[cmd][0], proto[cmd][1:]]) | |
251 | # There could be multiple data bytes in a row, so either find | |
252 | # another data byte or a STOP condition next. | |
253 | self.state = 'FIND DATA' | |
254 | ||
255 | def found_stop(self, scl, sda): | |
256 | # Meta bitrate | |
257 | elapsed = 1 / float(self.samplerate) * (self.samplenum - self.pdu_start + 1) | |
258 | bitrate = int(1 / elapsed * self.pdu_bits) | |
259 | self.put(self.byte_ss, self.samplenum, self.out_bitrate, bitrate) | |
260 | ||
261 | cmd = 'STOP' | |
262 | self.ss, self.es = self.samplenum, self.samplenum | |
263 | self.putp([cmd, None]) | |
264 | self.putx([proto[cmd][0], proto[cmd][1:]]) | |
265 | self.state = 'FIND START' | |
266 | self.is_repeat_start = 0 | |
267 | self.wr = -1 | |
268 | self.bits = [] | |
269 | ||
270 | def decode(self, ss, es, data): | |
271 | if not self.samplerate: | |
272 | raise SamplerateError("Cannot decode without samplerate.") | |
273 | for (self.samplenum, pins) in data: | |
274 | ||
275 | # Ignore identical samples early on (for performance reasons). | |
276 | if self.oldpins == pins: | |
277 | continue | |
278 | self.oldpins, (scl, sda) = pins, pins | |
279 | ||
280 | self.pdu_bits += 1 | |
281 | ||
282 | # State machine. | |
283 | if self.state == 'FIND START': | |
284 | if self.is_start_condition(scl, sda): | |
285 | self.found_start(scl, sda) | |
286 | elif self.state == 'FIND ADDRESS': | |
287 | if self.is_data_bit(scl, sda): | |
288 | self.found_address_or_data(scl, sda) | |
289 | elif self.state == 'FIND DATA': | |
290 | if self.is_data_bit(scl, sda): | |
291 | self.found_address_or_data(scl, sda) | |
292 | elif self.is_start_condition(scl, sda): | |
293 | self.found_start(scl, sda) | |
294 | elif self.is_stop_condition(scl, sda): | |
295 | self.found_stop(scl, sda) | |
296 | elif self.state == 'FIND ACK': | |
297 | if self.is_data_bit(scl, sda): | |
298 | self.get_ack(scl, sda) | |
299 | ||
300 | # Save current SDA/SCL values for the next round. | |
301 | self.oldscl, self.oldsda = scl, sda | |
302 |