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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM
38};
39
40static const uint32_t drvopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42};
43
44static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54};
55
56static const uint32_t analog_devopts[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61};
62
63static const uint64_t timebases[][2] = {
64 /* nanoseconds */
65 { 1, 1000000000 },
66 { 2, 1000000000 },
67 { 5, 1000000000 },
68 { 10, 1000000000 },
69 { 20, 1000000000 },
70 { 50, 1000000000 },
71 { 100, 1000000000 },
72 { 500, 1000000000 },
73 /* microseconds */
74 { 1, 1000000 },
75 { 2, 1000000 },
76 { 5, 1000000 },
77 { 10, 1000000 },
78 { 20, 1000000 },
79 { 50, 1000000 },
80 { 100, 1000000 },
81 { 200, 1000000 },
82 { 500, 1000000 },
83 /* milliseconds */
84 { 1, 1000 },
85 { 2, 1000 },
86 { 5, 1000 },
87 { 10, 1000 },
88 { 20, 1000 },
89 { 50, 1000 },
90 { 100, 1000 },
91 { 200, 1000 },
92 { 500, 1000 },
93 /* seconds */
94 { 1, 1 },
95 { 2, 1 },
96 { 5, 1 },
97 { 10, 1 },
98 { 20, 1 },
99 { 50, 1 },
100 { 100, 1 },
101 { 200, 1 },
102 { 500, 1 },
103 { 1000, 1 },
104};
105
106static const uint64_t vdivs[][2] = {
107 /* microvolts */
108 { 500, 1000000 },
109 /* millivolts */
110 { 1, 1000 },
111 { 2, 1000 },
112 { 5, 1000 },
113 { 10, 1000 },
114 { 20, 1000 },
115 { 50, 1000 },
116 { 100, 1000 },
117 { 200, 1000 },
118 { 500, 1000 },
119 /* volts */
120 { 1, 1 },
121 { 2, 1 },
122 { 5, 1 },
123 { 10, 1 },
124 { 20, 1 },
125 { 50, 1 },
126 { 100, 1 },
127};
128
129#define NUM_TIMEBASE ARRAY_SIZE(timebases)
130#define NUM_VDIV ARRAY_SIZE(vdivs)
131
132static const char *trigger_sources[] = {
133 "CH1",
134 "CH2",
135 "CH3",
136 "CH4",
137 "EXT",
138 "AC Line",
139 "D0",
140 "D1",
141 "D2",
142 "D3",
143 "D4",
144 "D5",
145 "D6",
146 "D7",
147 "D8",
148 "D9",
149 "D10",
150 "D11",
151 "D12",
152 "D13",
153 "D14",
154 "D15",
155};
156
157static const char *trigger_slopes[] = {
158 "r",
159 "f",
160};
161
162static const char *coupling[] = {
163 "AC",
164 "DC",
165 "GND",
166};
167
168static const uint64_t probe_factor[] = {
169 1,
170 2,
171 5,
172 10,
173 20,
174 50,
175 100,
176 200,
177 500,
178 1000,
179};
180
181/* Do not change the order of entries */
182static const char *data_sources[] = {
183 "Live",
184 "Memory",
185 "Segmented",
186};
187
188enum vendor {
189 RIGOL,
190 AGILENT,
191};
192
193enum series {
194 VS5000,
195 DS1000,
196 DS2000,
197 DS2000A,
198 DSO1000,
199 DS1000Z,
200};
201
202/* short name, full name */
203static const struct rigol_ds_vendor supported_vendors[] = {
204 [RIGOL] = {"Rigol", "Rigol Technologies"},
205 [AGILENT] = {"Agilent", "Agilent Technologies"},
206};
207
208#define VENDOR(x) &supported_vendors[x]
209/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
210 * live waveform samples, memory buffer samples */
211static const struct rigol_ds_series supported_series[] = {
212 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
213 {50, 1}, {2, 1000}, 14, 2048, 0},
214 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
215 {50, 1}, {2, 1000}, 12, 600, 1048576},
216 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
217 {500, 1}, {500, 1000000}, 14, 1400, 14000},
218 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
219 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
220 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
221 {50, 1}, {2, 1000}, 12, 600, 20480},
222 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
223 {50, 1}, {1, 1000}, 12, 1200, 12000000},
224};
225
226#define SERIES(x) &supported_series[x]
227/* series, model, min timebase, analog channels, digital */
228static const struct rigol_ds_model supported_models[] = {
229 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
230 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
231 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
232 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
233 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
234 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
235 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
236 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
237 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
238 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
239 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
240 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
241 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
242 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
243 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
244 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
245 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
246 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
247 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
248 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
249 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
250 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
251 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
252 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
253 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, 2, true},
254 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, 2, true},
255 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, 2, true},
256 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, 2, true},
257 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
258 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
259 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
260 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
261 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
262 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
263 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
264 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
265 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
266 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
267 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
268 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
269 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
270 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
271 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
272 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
273 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
274};
275
276static struct sr_dev_driver rigol_ds_driver_info;
277
278static void clear_helper(void *priv)
279{
280 struct dev_context *devc;
281 unsigned int i;
282
283 devc = priv;
284 g_free(devc->data);
285 g_free(devc->buffer);
286 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
287 g_free(devc->coupling[i]);
288 g_free(devc->trigger_source);
289 g_free(devc->trigger_slope);
290 g_free(devc->analog_groups);
291 g_free(devc);
292}
293
294static int dev_clear(const struct sr_dev_driver *di)
295{
296 return std_dev_clear(di, clear_helper);
297}
298
299static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
300{
301 struct dev_context *devc;
302 struct sr_dev_inst *sdi;
303 struct sr_scpi_hw_info *hw_info;
304 struct sr_channel *ch;
305 long n[3];
306 unsigned int i;
307 const struct rigol_ds_model *model = NULL;
308 gchar *channel_name, **version;
309
310 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
311 sr_info("Couldn't get IDN response, retrying.");
312 sr_scpi_close(scpi);
313 sr_scpi_open(scpi);
314 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
315 sr_info("Couldn't get IDN response.");
316 return NULL;
317 }
318 }
319
320 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
321 if (!g_ascii_strcasecmp(hw_info->manufacturer,
322 supported_models[i].series->vendor->full_name) &&
323 !strcmp(hw_info->model, supported_models[i].name)) {
324 model = &supported_models[i];
325 break;
326 }
327 }
328
329 if (!model) {
330 sr_scpi_hw_info_free(hw_info);
331 return NULL;
332 }
333
334 sdi = g_malloc0(sizeof(struct sr_dev_inst));
335 sdi->vendor = g_strdup(model->series->vendor->name);
336 sdi->model = g_strdup(model->name);
337 sdi->version = g_strdup(hw_info->firmware_version);
338 sdi->conn = scpi;
339 sdi->driver = &rigol_ds_driver_info;
340 sdi->inst_type = SR_INST_SCPI;
341 sdi->serial_num = g_strdup(hw_info->serial_number);
342 devc = g_malloc0(sizeof(struct dev_context));
343 devc->limit_frames = 0;
344 devc->model = model;
345 devc->format = model->series->format;
346
347 /* DS1000 models with firmware before 0.2.4 used the old data format. */
348 if (model->series == SERIES(DS1000)) {
349 version = g_strsplit(hw_info->firmware_version, ".", 0);
350 do {
351 if (!version[0] || !version[1] || !version[2])
352 break;
353 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
354 break;
355 for (i = 0; i < 3; i++) {
356 if (sr_atol(version[i], &n[i]) != SR_OK)
357 break;
358 }
359 if (i != 3)
360 break;
361 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
362 if (scpi->firmware_version < 24) {
363 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
364 devc->format = FORMAT_RAW;
365 }
366 break;
367 } while (0);
368 g_strfreev(version);
369 }
370
371 sr_scpi_hw_info_free(hw_info);
372
373 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
374 model->analog_channels);
375
376 for (i = 0; i < model->analog_channels; i++) {
377 channel_name = g_strdup_printf("CH%d", i + 1);
378 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
379
380 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
381
382 devc->analog_groups[i]->name = channel_name;
383 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
384 sdi->channel_groups = g_slist_append(sdi->channel_groups,
385 devc->analog_groups[i]);
386 }
387
388 if (devc->model->has_digital) {
389 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
390
391 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
392 channel_name = g_strdup_printf("D%d", i);
393 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
394 g_free(channel_name);
395 devc->digital_group->channels = g_slist_append(
396 devc->digital_group->channels, ch);
397 }
398 devc->digital_group->name = g_strdup("LA");
399 sdi->channel_groups = g_slist_append(sdi->channel_groups,
400 devc->digital_group);
401 }
402
403 for (i = 0; i < NUM_TIMEBASE; i++) {
404 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
405 devc->timebases = &timebases[i];
406 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
407 devc->num_timebases = &timebases[i] - devc->timebases + 1;
408 }
409
410 for (i = 0; i < NUM_VDIV; i++) {
411 if (!memcmp(&devc->model->series->min_vdiv,
412 &vdivs[i], sizeof(uint64_t[2]))) {
413 devc->vdivs = &vdivs[i];
414 devc->num_vdivs = NUM_VDIV - i;
415 }
416 }
417
418 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
419 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
420
421 devc->data_source = DATA_SOURCE_LIVE;
422
423 sdi->priv = devc;
424
425 return sdi;
426}
427
428static GSList *scan(struct sr_dev_driver *di, GSList *options)
429{
430 return sr_scpi_scan(di->context, options, probe_device);
431}
432
433static int dev_open(struct sr_dev_inst *sdi)
434{
435 int ret;
436 struct sr_scpi_dev_inst *scpi = sdi->conn;
437
438 if ((ret = sr_scpi_open(scpi)) < 0) {
439 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
440 return SR_ERR;
441 }
442
443 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
444 sr_err("Failed to get device config: %s.", sr_strerror(ret));
445 return SR_ERR;
446 }
447
448 sdi->status = SR_ST_ACTIVE;
449
450 return SR_OK;
451}
452
453static int dev_close(struct sr_dev_inst *sdi)
454{
455 struct sr_scpi_dev_inst *scpi;
456 struct dev_context *devc;
457
458 if (sdi->status != SR_ST_ACTIVE)
459 return SR_ERR_DEV_CLOSED;
460
461 scpi = sdi->conn;
462 devc = sdi->priv;
463
464 if (devc->model->series->protocol == PROTOCOL_V2)
465 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
466
467 if (scpi) {
468 if (sr_scpi_close(scpi) < 0)
469 return SR_ERR;
470 sdi->status = SR_ST_INACTIVE;
471 }
472
473 return SR_OK;
474}
475
476static int analog_frame_size(const struct sr_dev_inst *sdi)
477{
478 struct dev_context *devc = sdi->priv;
479 struct sr_channel *ch;
480 int analog_channels = 0;
481 GSList *l;
482
483 for (l = sdi->channels; l; l = l->next) {
484 ch = l->data;
485 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
486 analog_channels++;
487 }
488
489 if (analog_channels == 0)
490 return 0;
491
492 switch (devc->data_source) {
493 case DATA_SOURCE_LIVE:
494 return devc->model->series->live_samples;
495 case DATA_SOURCE_MEMORY:
496 return devc->model->series->buffer_samples / analog_channels;
497 default:
498 return 0;
499 }
500}
501
502static int digital_frame_size(const struct sr_dev_inst *sdi)
503{
504 struct dev_context *devc = sdi->priv;
505
506 switch (devc->data_source) {
507 case DATA_SOURCE_LIVE:
508 return devc->model->series->live_samples * 2;
509 case DATA_SOURCE_MEMORY:
510 return devc->model->series->buffer_samples * 2;
511 default:
512 return 0;
513 }
514}
515
516static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
517 const struct sr_channel_group *cg)
518{
519 struct dev_context *devc;
520 struct sr_channel *ch;
521 const char *tmp_str;
522 uint64_t samplerate;
523 int analog_channel = -1;
524 float smallest_diff = INFINITY;
525 int idx = -1;
526 unsigned i;
527
528 if (!sdi)
529 return SR_ERR_ARG;
530
531 devc = sdi->priv;
532
533 /* If a channel group is specified, it must be a valid one. */
534 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
535 sr_err("Invalid channel group specified.");
536 return SR_ERR;
537 }
538
539 if (cg) {
540 ch = g_slist_nth_data(cg->channels, 0);
541 if (!ch)
542 return SR_ERR;
543 if (ch->type == SR_CHANNEL_ANALOG) {
544 if (ch->name[2] < '1' || ch->name[2] > '4')
545 return SR_ERR;
546 analog_channel = ch->name[2] - '1';
547 }
548 }
549
550 switch (key) {
551 case SR_CONF_NUM_HDIV:
552 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
553 break;
554 case SR_CONF_NUM_VDIV:
555 *data = g_variant_new_int32(devc->num_vdivs);
556 break;
557 case SR_CONF_DATA_SOURCE:
558 if (devc->data_source == DATA_SOURCE_LIVE)
559 *data = g_variant_new_string("Live");
560 else if (devc->data_source == DATA_SOURCE_MEMORY)
561 *data = g_variant_new_string("Memory");
562 else
563 *data = g_variant_new_string("Segmented");
564 break;
565 case SR_CONF_SAMPLERATE:
566 if (devc->data_source == DATA_SOURCE_LIVE) {
567 samplerate = analog_frame_size(sdi) /
568 (devc->timebase * devc->model->series->num_horizontal_divs);
569 *data = g_variant_new_uint64(samplerate);
570 } else {
571 sr_dbg("Unknown data source: %d.", devc->data_source);
572 return SR_ERR_NA;
573 }
574 break;
575 case SR_CONF_TRIGGER_SOURCE:
576 if (!strcmp(devc->trigger_source, "ACL"))
577 tmp_str = "AC Line";
578 else if (!strcmp(devc->trigger_source, "CHAN1"))
579 tmp_str = "CH1";
580 else if (!strcmp(devc->trigger_source, "CHAN2"))
581 tmp_str = "CH2";
582 else if (!strcmp(devc->trigger_source, "CHAN3"))
583 tmp_str = "CH3";
584 else if (!strcmp(devc->trigger_source, "CHAN4"))
585 tmp_str = "CH4";
586 else
587 tmp_str = devc->trigger_source;
588 *data = g_variant_new_string(tmp_str);
589 break;
590 case SR_CONF_TRIGGER_SLOPE:
591 if (!strncmp(devc->trigger_slope, "POS", 3)) {
592 tmp_str = "r";
593 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
594 tmp_str = "f";
595 } else {
596 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
597 return SR_ERR_NA;
598 }
599 *data = g_variant_new_string(tmp_str);
600 break;
601 case SR_CONF_TRIGGER_LEVEL:
602 *data = g_variant_new_double(devc->trigger_level);
603 break;
604 case SR_CONF_TIMEBASE:
605 for (i = 0; i < devc->num_timebases; i++) {
606 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
607 float diff = fabs(devc->timebase - tb);
608 if (diff < smallest_diff) {
609 smallest_diff = diff;
610 idx = i;
611 }
612 }
613 if (idx < 0) {
614 sr_dbg("Negative timebase index: %d.", idx);
615 return SR_ERR_NA;
616 }
617 *data = g_variant_new("(tt)", devc->timebases[idx][0],
618 devc->timebases[idx][1]);
619 break;
620 case SR_CONF_VDIV:
621 if (analog_channel < 0) {
622 sr_dbg("Negative analog channel: %d.", analog_channel);
623 return SR_ERR_NA;
624 }
625 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
626 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
627 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
628 if (diff < smallest_diff) {
629 smallest_diff = diff;
630 idx = i;
631 }
632 }
633 if (idx < 0) {
634 sr_dbg("Negative vdiv index: %d.", idx);
635 return SR_ERR_NA;
636 }
637 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
638 break;
639 case SR_CONF_COUPLING:
640 if (analog_channel < 0) {
641 sr_dbg("Negative analog channel: %d.", analog_channel);
642 return SR_ERR_NA;
643 }
644 *data = g_variant_new_string(devc->coupling[analog_channel]);
645 break;
646 case SR_CONF_PROBE_FACTOR:
647 if (analog_channel < 0) {
648 sr_dbg("Negative analog channel: %d.", analog_channel);
649 return SR_ERR_NA;
650 }
651 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
652 break;
653 default:
654 return SR_ERR_NA;
655 }
656
657 return SR_OK;
658}
659
660static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
661 const struct sr_channel_group *cg)
662{
663 struct dev_context *devc;
664 uint64_t p, q;
665 double t_dbl;
666 unsigned int i, j;
667 int ret;
668 const char *tmp_str;
669 char buffer[16];
670
671 devc = sdi->priv;
672
673 /* If a channel group is specified, it must be a valid one. */
674 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
675 sr_err("Invalid channel group specified.");
676 return SR_ERR;
677 }
678
679 ret = SR_OK;
680 switch (key) {
681 case SR_CONF_LIMIT_FRAMES:
682 devc->limit_frames = g_variant_get_uint64(data);
683 break;
684 case SR_CONF_TRIGGER_SLOPE:
685 tmp_str = g_variant_get_string(data, NULL);
686
687 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
688 sr_err("Unknown trigger slope: '%s'.",
689 (tmp_str) ? tmp_str : "NULL");
690 return SR_ERR_ARG;
691 }
692
693 g_free(devc->trigger_slope);
694 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
695 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
696 break;
697 case SR_CONF_HORIZ_TRIGGERPOS:
698 t_dbl = g_variant_get_double(data);
699 if (t_dbl < 0.0 || t_dbl > 1.0) {
700 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
701 return SR_ERR;
702 }
703 devc->horiz_triggerpos = t_dbl;
704 /* We have the trigger offset as a percentage of the frame, but
705 * need to express this in seconds. */
706 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
707 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
708 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
709 break;
710 case SR_CONF_TRIGGER_LEVEL:
711 t_dbl = g_variant_get_double(data);
712 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
713 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
714 if (ret == SR_OK)
715 devc->trigger_level = t_dbl;
716 break;
717 case SR_CONF_TIMEBASE:
718 g_variant_get(data, "(tt)", &p, &q);
719 for (i = 0; i < devc->num_timebases; i++) {
720 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
721 devc->timebase = (float)p / q;
722 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
723 devc->timebase);
724 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
725 break;
726 }
727 }
728 if (i == devc->num_timebases) {
729 sr_err("Invalid timebase index: %d.", i);
730 ret = SR_ERR_ARG;
731 }
732 break;
733 case SR_CONF_TRIGGER_SOURCE:
734 tmp_str = g_variant_get_string(data, NULL);
735 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
736 if (!strcmp(trigger_sources[i], tmp_str)) {
737 g_free(devc->trigger_source);
738 devc->trigger_source = g_strdup(trigger_sources[i]);
739 if (!strcmp(devc->trigger_source, "AC Line"))
740 tmp_str = "ACL";
741 else if (!strcmp(devc->trigger_source, "CH1"))
742 tmp_str = "CHAN1";
743 else if (!strcmp(devc->trigger_source, "CH2"))
744 tmp_str = "CHAN2";
745 else if (!strcmp(devc->trigger_source, "CH3"))
746 tmp_str = "CHAN3";
747 else if (!strcmp(devc->trigger_source, "CH4"))
748 tmp_str = "CHAN4";
749 else
750 tmp_str = (char *)devc->trigger_source;
751 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
752 break;
753 }
754 }
755 if (i == ARRAY_SIZE(trigger_sources)) {
756 sr_err("Invalid trigger source index: %d.", i);
757 ret = SR_ERR_ARG;
758 }
759 break;
760 case SR_CONF_VDIV:
761 if (!cg) {
762 sr_err("No channel group specified.");
763 return SR_ERR_CHANNEL_GROUP;
764 }
765 g_variant_get(data, "(tt)", &p, &q);
766 for (i = 0; i < devc->model->analog_channels; i++) {
767 if (cg == devc->analog_groups[i]) {
768 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
769 if (vdivs[j][0] != p || vdivs[j][1] != q)
770 continue;
771 devc->vdiv[i] = (float)p / q;
772 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
773 devc->vdiv[i]);
774 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
775 buffer);
776 }
777 sr_err("Invalid vdiv index: %d.", j);
778 return SR_ERR_ARG;
779 }
780 }
781 sr_dbg("Didn't set vdiv, unknown channel(group).");
782 return SR_ERR_NA;
783 case SR_CONF_COUPLING:
784 if (!cg) {
785 sr_err("No channel group specified.");
786 return SR_ERR_CHANNEL_GROUP;
787 }
788 tmp_str = g_variant_get_string(data, NULL);
789 for (i = 0; i < devc->model->analog_channels; i++) {
790 if (cg == devc->analog_groups[i]) {
791 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
792 if (!strcmp(tmp_str, coupling[j])) {
793 g_free(devc->coupling[i]);
794 devc->coupling[i] = g_strdup(coupling[j]);
795 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
796 devc->coupling[i]);
797 }
798 }
799 sr_err("Invalid coupling index: %d.", j);
800 return SR_ERR_ARG;
801 }
802 }
803 sr_dbg("Didn't set coupling, unknown channel(group).");
804 return SR_ERR_NA;
805 case SR_CONF_PROBE_FACTOR:
806 if (!cg) {
807 sr_err("No channel group specified.");
808 return SR_ERR_CHANNEL_GROUP;
809 }
810 p = g_variant_get_uint64(data);
811 for (i = 0; i < devc->model->analog_channels; i++) {
812 if (cg == devc->analog_groups[i]) {
813 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
814 if (p == probe_factor[j]) {
815 devc->attenuation[i] = p;
816 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
817 i + 1, p);
818 if (ret == SR_OK)
819 rigol_ds_get_dev_cfg_vertical(sdi);
820 return ret;
821 }
822 }
823 sr_err("Invalid probe factor: %"PRIu64".", p);
824 return SR_ERR_ARG;
825 }
826 }
827 sr_dbg("Didn't set probe factor, unknown channel(group).");
828 return SR_ERR_NA;
829 case SR_CONF_DATA_SOURCE:
830 tmp_str = g_variant_get_string(data, NULL);
831 if (!strcmp(tmp_str, "Live"))
832 devc->data_source = DATA_SOURCE_LIVE;
833 else if (devc->model->series->protocol >= PROTOCOL_V2
834 && !strcmp(tmp_str, "Memory"))
835 devc->data_source = DATA_SOURCE_MEMORY;
836 else if (devc->model->series->protocol >= PROTOCOL_V3
837 && !strcmp(tmp_str, "Segmented"))
838 devc->data_source = DATA_SOURCE_SEGMENTED;
839 else {
840 sr_err("Unknown data source: '%s'.", tmp_str);
841 return SR_ERR;
842 }
843 break;
844 default:
845 return SR_ERR_NA;
846 }
847
848 return ret;
849}
850
851static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
852 const struct sr_channel_group *cg)
853{
854 GVariant *tuple, *rational[2];
855 GVariantBuilder gvb;
856 unsigned int i;
857 struct dev_context *devc = NULL;
858
859 /* SR_CONF_SCAN_OPTIONS is always valid, regardless of sdi or channel group. */
860 if (key == SR_CONF_SCAN_OPTIONS) {
861 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
862 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
863 return SR_OK;
864 }
865
866 /* If sdi is NULL, nothing except SR_CONF_DEVICE_OPTIONS can be provided. */
867 if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
868 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
869 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
870 return SR_OK;
871 }
872
873 /* Every other option requires a valid device instance. */
874 if (!sdi)
875 return SR_ERR_ARG;
876 devc = sdi->priv;
877
878 /* If a channel group is specified, it must be a valid one. */
879 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
880 sr_err("Invalid channel group specified.");
881 return SR_ERR;
882 }
883
884 switch (key) {
885 case SR_CONF_DEVICE_OPTIONS:
886 if (!cg) {
887 /* If cg is NULL, only the SR_CONF_DEVICE_OPTIONS that are not
888 * specific to a channel group must be returned. */
889 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
890 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
891 return SR_OK;
892 }
893 if (cg == devc->digital_group) {
894 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
895 NULL, 0, sizeof(uint32_t));
896 return SR_OK;
897 } else {
898 for (i = 0; i < devc->model->analog_channels; i++) {
899 if (cg == devc->analog_groups[i]) {
900 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
901 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
902 return SR_OK;
903 }
904 }
905 return SR_ERR_NA;
906 }
907 break;
908 case SR_CONF_COUPLING:
909 if (!cg) {
910 sr_err("No channel group specified.");
911 return SR_ERR_CHANNEL_GROUP;
912 }
913 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
914 break;
915 case SR_CONF_PROBE_FACTOR:
916 if (!cg) {
917 sr_err("No channel group specified.");
918 return SR_ERR_CHANNEL_GROUP;
919 }
920 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
921 probe_factor, ARRAY_SIZE(probe_factor), sizeof(uint64_t));
922 break;
923 case SR_CONF_VDIV:
924 if (!devc)
925 /* Can't know this until we have the exact model. */
926 return SR_ERR_ARG;
927 if (!cg) {
928 sr_err("No channel group specified.");
929 return SR_ERR_CHANNEL_GROUP;
930 }
931 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
932 for (i = 0; i < devc->num_vdivs; i++) {
933 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
934 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
935 tuple = g_variant_new_tuple(rational, 2);
936 g_variant_builder_add_value(&gvb, tuple);
937 }
938 *data = g_variant_builder_end(&gvb);
939 break;
940 case SR_CONF_TIMEBASE:
941 if (!devc)
942 /* Can't know this until we have the exact model. */
943 return SR_ERR_ARG;
944 if (devc->num_timebases <= 0)
945 return SR_ERR_NA;
946 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
947 for (i = 0; i < devc->num_timebases; i++) {
948 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
949 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
950 tuple = g_variant_new_tuple(rational, 2);
951 g_variant_builder_add_value(&gvb, tuple);
952 }
953 *data = g_variant_builder_end(&gvb);
954 break;
955 case SR_CONF_TRIGGER_SOURCE:
956 if (!devc)
957 /* Can't know this until we have the exact model. */
958 return SR_ERR_ARG;
959 *data = g_variant_new_strv(trigger_sources,
960 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
961 break;
962 case SR_CONF_TRIGGER_SLOPE:
963 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
964 break;
965 case SR_CONF_DATA_SOURCE:
966 if (!devc)
967 /* Can't know this until we have the exact model. */
968 return SR_ERR_ARG;
969 switch (devc->model->series->protocol) {
970 case PROTOCOL_V1:
971 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
972 break;
973 case PROTOCOL_V2:
974 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
975 break;
976 default:
977 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
978 break;
979 }
980 break;
981 default:
982 return SR_ERR_NA;
983 }
984
985 return SR_OK;
986}
987
988static int dev_acquisition_start(const struct sr_dev_inst *sdi)
989{
990 struct sr_scpi_dev_inst *scpi;
991 struct dev_context *devc;
992 struct sr_channel *ch;
993 struct sr_datafeed_packet packet;
994 gboolean some_digital;
995 GSList *l;
996
997 scpi = sdi->conn;
998 devc = sdi->priv;
999
1000 devc->num_frames = 0;
1001
1002 some_digital = FALSE;
1003 for (l = sdi->channels; l; l = l->next) {
1004 ch = l->data;
1005 sr_dbg("handling channel %s", ch->name);
1006 if (ch->type == SR_CHANNEL_ANALOG) {
1007 if (ch->enabled)
1008 devc->enabled_channels = g_slist_append(
1009 devc->enabled_channels, ch);
1010 if (ch->enabled != devc->analog_channels[ch->index]) {
1011 /* Enabled channel is currently disabled, or vice versa. */
1012 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
1013 ch->enabled ? "ON" : "OFF") != SR_OK)
1014 return SR_ERR;
1015 devc->analog_channels[ch->index] = ch->enabled;
1016 }
1017 } else if (ch->type == SR_CHANNEL_LOGIC) {
1018 /* Only one list entry for older protocols. All channels are
1019 * retrieved together when this entry is processed. */
1020 if (ch->enabled && (
1021 devc->model->series->protocol > PROTOCOL_V3 ||
1022 !some_digital))
1023 devc->enabled_channels = g_slist_append(
1024 devc->enabled_channels, ch);
1025 if (ch->enabled) {
1026 some_digital = TRUE;
1027 /* Turn on LA module if currently off. */
1028 if (!devc->la_enabled) {
1029 if (rigol_ds_config_set(sdi,
1030 devc->model->series->protocol >= PROTOCOL_V3 ?
1031 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
1032 return SR_ERR;
1033 devc->la_enabled = TRUE;
1034 }
1035 }
1036 if (ch->enabled != devc->digital_channels[ch->index]) {
1037 /* Enabled channel is currently disabled, or vice versa. */
1038 if (rigol_ds_config_set(sdi,
1039 devc->model->series->protocol >= PROTOCOL_V3 ?
1040 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
1041 ch->enabled ? "ON" : "OFF") != SR_OK)
1042 return SR_ERR;
1043 devc->digital_channels[ch->index] = ch->enabled;
1044 }
1045 }
1046 }
1047
1048 if (!devc->enabled_channels)
1049 return SR_ERR;
1050
1051 /* Turn off LA module if on and no digital channels selected. */
1052 if (devc->la_enabled && !some_digital)
1053 if (rigol_ds_config_set(sdi,
1054 devc->model->series->protocol >= PROTOCOL_V3 ?
1055 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
1056 return SR_ERR;
1057
1058 /* Set memory mode. */
1059 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1060 sr_err("Data source 'Segmented' not yet supported");
1061 return SR_ERR;
1062 }
1063
1064 devc->analog_frame_size = analog_frame_size(sdi);
1065 devc->digital_frame_size = digital_frame_size(sdi);
1066
1067 switch (devc->model->series->protocol) {
1068 case PROTOCOL_V2:
1069 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1070 return SR_ERR;
1071 break;
1072 case PROTOCOL_V3:
1073 /* Apparently for the DS2000 the memory
1074 * depth can only be set in Running state -
1075 * this matches the behaviour of the UI. */
1076 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1077 return SR_ERR;
1078 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1079 devc->analog_frame_size) != SR_OK)
1080 return SR_ERR;
1081 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1082 return SR_ERR;
1083 break;
1084 default:
1085 break;
1086 }
1087
1088 if (devc->data_source == DATA_SOURCE_LIVE)
1089 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1090 return SR_ERR;
1091
1092 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1093 rigol_ds_receive, (void *)sdi);
1094
1095 std_session_send_df_header(sdi);
1096
1097 devc->channel_entry = devc->enabled_channels;
1098
1099 if (rigol_ds_capture_start(sdi) != SR_OK)
1100 return SR_ERR;
1101
1102 /* Start of first frame. */
1103 packet.type = SR_DF_FRAME_BEGIN;
1104 sr_session_send(sdi, &packet);
1105
1106 return SR_OK;
1107}
1108
1109static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1110{
1111 struct dev_context *devc;
1112 struct sr_scpi_dev_inst *scpi;
1113
1114 devc = sdi->priv;
1115
1116 std_session_send_df_end(sdi);
1117
1118 g_slist_free(devc->enabled_channels);
1119 devc->enabled_channels = NULL;
1120 scpi = sdi->conn;
1121 sr_scpi_source_remove(sdi->session, scpi);
1122
1123 return SR_OK;
1124}
1125
1126static struct sr_dev_driver rigol_ds_driver_info = {
1127 .name = "rigol-ds",
1128 .longname = "Rigol DS",
1129 .api_version = 1,
1130 .init = std_init,
1131 .cleanup = std_cleanup,
1132 .scan = scan,
1133 .dev_list = std_dev_list,
1134 .dev_clear = dev_clear,
1135 .config_get = config_get,
1136 .config_set = config_set,
1137 .config_list = config_list,
1138 .dev_open = dev_open,
1139 .dev_close = dev_close,
1140 .dev_acquisition_start = dev_acquisition_start,
1141 .dev_acquisition_stop = dev_acquisition_stop,
1142 .context = NULL,
1143};
1144SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);
Hardware access and backend lib