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5874e88d DE |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_LWLA_H | |
21 | #define LIBSIGROK_HARDWARE_SYSCLK_LWLA_LWLA_H | |
22 | ||
5874e88d DE |
23 | #include <stdint.h> |
24 | #include <libusb.h> | |
25 | #include <glib.h> | |
c1aae900 | 26 | #include <libsigrok/libsigrok.h> |
5874e88d DE |
27 | |
28 | struct sr_usb_dev_inst; | |
29 | ||
e0df15d4 DE |
30 | /* Rotate argument n bits to the left. |
31 | * This construct is an idiom recognized by GCC as bit rotation. | |
32 | */ | |
33 | #define LROTATE(a, n) (((a) << (n)) | ((a) >> (CHAR_BIT * sizeof(a) - (n)))) | |
34 | ||
35 | /* Convert 16-bit little endian LWLA protocol word to machine word order. */ | |
36 | #define LWLA_TO_UINT16(val) GUINT16_FROM_LE(val) | |
37 | ||
38 | /* Convert 32-bit mixed endian LWLA protocol word to machine word order. */ | |
39 | #define LWLA_TO_UINT32(val) LROTATE(GUINT32_FROM_LE(val), 16) | |
40 | ||
41 | /* Convert 16-bit argument to LWLA protocol word. */ | |
5874e88d DE |
42 | #define LWLA_WORD(val) GUINT16_TO_LE(val) |
43 | ||
e0df15d4 DE |
44 | /* Extract 16-bit units in mixed endian order from 32/64-bit value. */ |
45 | #define LWLA_WORD_0(val) GUINT16_TO_LE(((val) >> 16) & 0xFFFF) | |
46 | #define LWLA_WORD_1(val) GUINT16_TO_LE((val) & 0xFFFF) | |
47 | #define LWLA_WORD_2(val) GUINT16_TO_LE(((val) >> 48) & 0xFFFF) | |
48 | #define LWLA_WORD_3(val) GUINT16_TO_LE(((val) >> 32) & 0xFFFF) | |
5874e88d | 49 | |
be64f90b | 50 | /* Maximum number of 16-bit words sent at a time during acquisition. |
7ed80817 DE |
51 | * Used for allocating the libusb transfer buffer. Keep this even so that |
52 | * subsequent members are always 32-bit aligned. | |
be64f90b DE |
53 | */ |
54 | #define MAX_ACQ_SEND_LEN16 64 /* 43 for capture setup plus stuffing */ | |
55 | ||
56 | /* Maximum number of 32-bit words received at a time during acquisition. | |
57 | * This is a multiple of the endpoint buffer size to avoid transfer overflow | |
58 | * conditions. | |
59 | */ | |
60 | #define MAX_ACQ_RECV_LEN32 (2 * 512 / 4) | |
61 | ||
62 | /* Maximum length of a register read/write sequence. | |
63 | */ | |
04f24283 | 64 | #define MAX_REG_SEQ_LEN 8 |
be64f90b DE |
65 | |
66 | /* Logic datafeed packet size in bytes. | |
67 | * This is a multiple of both 4 and 5 to match any model's unit size | |
68 | * and memory granularity. | |
69 | */ | |
70 | #define PACKET_SIZE (5000 * 4 * 5) | |
71 | ||
ca314e06 | 72 | /** LWLA protocol command ID codes. */ |
be64f90b | 73 | enum command_id { |
5874e88d DE |
74 | CMD_READ_REG = 1, |
75 | CMD_WRITE_REG = 2, | |
be64f90b DE |
76 | CMD_READ_MEM32 = 3, |
77 | CMD_READ_MEM36 = 6, | |
78 | CMD_WRITE_LREGS = 7, | |
79 | CMD_READ_LREGS = 8, | |
5874e88d DE |
80 | }; |
81 | ||
82 | /** LWLA capture state flags. | |
be64f90b | 83 | * The bit positions are the same as in the LWLA1016 control register. |
5874e88d | 84 | */ |
407b6e2c | 85 | enum status_flag { |
be64f90b DE |
86 | STATUS_CAPTURING = 1 << 2, |
87 | STATUS_TRIGGERED = 1 << 5, | |
88 | STATUS_MEM_AVAIL = 1 << 6, | |
5874e88d DE |
89 | }; |
90 | ||
ca314e06 | 91 | /** LWLA1034 run-length encoding states. */ |
be64f90b DE |
92 | enum rle_state { |
93 | RLE_STATE_DATA, | |
94 | RLE_STATE_LEN | |
586ff70a DE |
95 | }; |
96 | ||
ca314e06 | 97 | /** Register address/value pair. */ |
be64f90b DE |
98 | struct regval { |
99 | unsigned int reg; | |
100 | uint32_t val; | |
30f34dbd DE |
101 | }; |
102 | ||
ca314e06 | 103 | /** LWLA sample acquisition and decompression state. */ |
be64f90b DE |
104 | struct acquisition_state { |
105 | uint64_t samples_max; /* maximum number of samples to process */ | |
106 | uint64_t samples_done; /* number of samples sent to the session bus */ | |
107 | uint64_t duration_max; /* maximum capture duration in milliseconds */ | |
108 | uint64_t duration_now; /* running capture duration since trigger */ | |
109 | ||
110 | uint64_t sample; /* last sample read from capture memory */ | |
111 | uint64_t run_len; /* remaining run length of current sample */ | |
112 | ||
113 | struct libusb_transfer *xfer_in; /* USB in transfer record */ | |
114 | struct libusb_transfer *xfer_out; /* USB out transfer record */ | |
115 | ||
7ed80817 DE |
116 | unsigned int mem_addr_fill; /* capture memory fill level */ |
117 | unsigned int mem_addr_done; /* next address to be processed */ | |
118 | unsigned int mem_addr_next; /* start address for next async read */ | |
119 | unsigned int mem_addr_stop; /* end of memory range to be read */ | |
120 | unsigned int in_index; /* position in read transfer buffer */ | |
121 | unsigned int out_index; /* position in logic packet buffer */ | |
122 | enum rle_state rle; /* RLE decoding state */ | |
be64f90b DE |
123 | |
124 | gboolean rle_enabled; /* capturing in timing-state mode */ | |
125 | gboolean clock_boost; /* switch to faster clock during capture */ | |
126 | unsigned int status; /* last received device status */ | |
127 | ||
128 | unsigned int reg_seq_pos; /* index of next register/value pair */ | |
129 | unsigned int reg_seq_len; /* length of register/value sequence */ | |
130 | ||
131 | struct regval reg_sequence[MAX_REG_SEQ_LEN]; /* register buffer */ | |
132 | uint32_t xfer_buf_in[MAX_ACQ_RECV_LEN32]; /* USB in buffer */ | |
133 | uint16_t xfer_buf_out[MAX_ACQ_SEND_LEN16]; /* USB out buffer */ | |
134 | uint8_t out_packet[PACKET_SIZE]; /* logic payload */ | |
30f34dbd DE |
135 | }; |
136 | ||
be64f90b DE |
137 | static inline void lwla_queue_regval(struct acquisition_state *acq, |
138 | unsigned int reg, uint32_t value) | |
139 | { | |
140 | acq->reg_sequence[acq->reg_seq_len].reg = reg; | |
141 | acq->reg_sequence[acq->reg_seq_len].val = value; | |
142 | acq->reg_seq_len++; | |
143 | } | |
5874e88d | 144 | |
8e2d6c9d DE |
145 | SR_PRIV int lwla_send_bitstream(struct sr_context *ctx, |
146 | const struct sr_usb_dev_inst *usb, | |
147 | const char *name); | |
5874e88d DE |
148 | |
149 | SR_PRIV int lwla_send_command(const struct sr_usb_dev_inst *usb, | |
150 | const uint16_t *command, int cmd_len); | |
151 | ||
152 | SR_PRIV int lwla_receive_reply(const struct sr_usb_dev_inst *usb, | |
78648577 | 153 | void *reply, int buf_size, int *xfer_len); |
5874e88d DE |
154 | |
155 | SR_PRIV int lwla_read_reg(const struct sr_usb_dev_inst *usb, | |
156 | uint16_t reg, uint32_t *value); | |
157 | ||
158 | SR_PRIV int lwla_write_reg(const struct sr_usb_dev_inst *usb, | |
159 | uint16_t reg, uint32_t value); | |
160 | ||
161 | SR_PRIV int lwla_write_regs(const struct sr_usb_dev_inst *usb, | |
be64f90b | 162 | const struct regval *regvals, int count); |
5874e88d | 163 | |
db24496a | 164 | #endif |