]>
Commit | Line | Data |
---|---|---|
d4eabea8 BV |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2014 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
22c18b03 | 20 | #include <string.h> |
d4eabea8 BV |
21 | #include "protocol.h" |
22 | ||
23 | #define CH_IDX(x) (1 << x) | |
24 | ||
22c18b03 BV |
25 | const char *pps_vendors[][2] = { |
26 | { "RIGOL TECHNOLOGIES", "Rigol" }, | |
d4eabea8 BV |
27 | }; |
28 | ||
22c18b03 BV |
29 | const char *get_vendor(const char *raw_vendor) |
30 | { | |
31 | unsigned int i; | |
32 | ||
33 | for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) { | |
34 | if (!strcasecmp(raw_vendor, pps_vendors[i][0])) | |
35 | return pps_vendors[i][1]; | |
36 | } | |
37 | ||
38 | return raw_vendor; | |
39 | } | |
40 | ||
d4eabea8 | 41 | /* Rigol DP800 series */ |
3222ee10 | 42 | static const int32_t rigol_dp800_devopts[] = { |
d4eabea8 BV |
43 | SR_CONF_POWER_SUPPLY, |
44 | SR_CONF_CONTINUOUS, | |
45 | SR_CONF_OVER_TEMPERATURE_PROTECTION, | |
46 | }; | |
47 | ||
3222ee10 | 48 | static const int32_t rigol_dp800_devopts_cg[] = { |
d4eabea8 BV |
49 | SR_CONF_OUTPUT_REGULATION, |
50 | SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED, | |
51 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE, | |
52 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD, | |
53 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED, | |
54 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE, | |
55 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD, | |
56 | SR_CONF_OUTPUT_VOLTAGE, | |
57 | SR_CONF_OUTPUT_VOLTAGE_MAX, | |
58 | SR_CONF_OUTPUT_CURRENT, | |
59 | SR_CONF_OUTPUT_CURRENT_MAX, | |
60 | SR_CONF_OUTPUT_ENABLED, | |
61 | }; | |
62 | ||
3222ee10 BV |
63 | struct channel_spec rigol_dp831_ch[] = { |
64 | { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 } }, | |
65 | { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 } }, | |
66 | { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 } }, | |
d4eabea8 BV |
67 | }; |
68 | ||
3222ee10 BV |
69 | struct channel_spec rigol_dp832_ch[] = { |
70 | { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 } }, | |
71 | { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 } }, | |
72 | { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 } }, | |
73 | }; | |
74 | ||
75 | struct channel_group_spec rigol_dp800_cg[] = { | |
d4eabea8 BV |
76 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, |
77 | { "2", CH_IDX(1), PPS_OVP | PPS_OCP }, | |
78 | { "3", CH_IDX(2), PPS_OVP | PPS_OCP }, | |
79 | }; | |
80 | ||
3222ee10 | 81 | struct scpi_command rigol_dp800_cmd[] = { |
d4eabea8 BV |
82 | { SCPI_CMD_KEY_UNLOCK, "SYST:KLOCK OFF" }, |
83 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT? CH%s" }, | |
84 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR? CH%s" }, | |
85 | { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE? CH%s" }, | |
86 | { SCPI_CMD_GET_VOLTAGE_MAX, ":SOUR%s:VOLT?" }, | |
87 | { SCPI_CMD_SET_VOLTAGE_MAX, ":SOUR%s:VOLT %.6f" }, | |
88 | { SCPI_CMD_GET_CURRENT_MAX, ":SOUR%s:CURR?" }, | |
89 | { SCPI_CMD_SET_CURRENT_MAX, ":SOUR%s:CURR %.6f" }, | |
90 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP? CH%s" }, | |
91 | { SCPI_CMD_SET_OUTPUT_ENABLED, ":OUTP CH%s,%s" }, | |
92 | { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE? CH%s" }, | |
93 | { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" }, | |
94 | { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP %s" }, | |
95 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP? CH%s" }, | |
96 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP CH%s,%s" }, | |
97 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES? CH%s" }, | |
98 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL? CH%s" }, | |
99 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL CH%s,%.6f" }, | |
100 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP? CH%s" }, | |
101 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP CH%s,%s" }, | |
102 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES? CH%s" }, | |
103 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL? CH%s" }, | |
104 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL CH%s,%.6f" }, | |
105 | }; | |
106 | ||
107 | SR_PRIV const struct scpi_pps pps_profiles[] = { | |
108 | /* Rigol DP800 series */ | |
3222ee10 BV |
109 | { "Rigol", "^DP831A$", PPS_OTP, |
110 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
111 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
112 | ARRAY_AND_SIZE(rigol_dp831_ch), | |
113 | ARRAY_AND_SIZE(rigol_dp800_cg), | |
114 | ARRAY_AND_SIZE(rigol_dp800_cmd), | |
115 | }, | |
116 | { "Rigol", "^(DP832|DP832A)$", PPS_OTP, | |
117 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
118 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
119 | ARRAY_AND_SIZE(rigol_dp832_ch), | |
120 | ARRAY_AND_SIZE(rigol_dp800_cg), | |
121 | ARRAY_AND_SIZE(rigol_dp800_cmd), | |
d4eabea8 BV |
122 | }, |
123 | }; | |
124 | SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles); | |
125 |