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rigol-ds: Add missing 20/50/100V vdiv entries.
[libsigrok.git] / src / hardware / rigol-ds / api.c
CommitLineData
f4816ac6
ML		 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9 5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
bafd4890 6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
f4816ac6
ML		 7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
e0b7d23c
ML		 22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
2b0e4a46 26#include <math.h>
f4816ac6
ML		 27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
a0e0bb41 32static const uint32_t scanopts[] = {
ca55277c 33 SR_CONF_CONN,
0dc7b43e 34 SR_CONF_SERIALCOMM
ca55277c
ML		 35};
36
f254bc4b 37static const uint32_t devopts[] = {
1953564a 38 SR_CONF_OSCILLOSCOPE,
5827f61b
BV		 39 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
40 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
b0c9d1d1 42 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b
BV		 43 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
44 SR_CONF_NUM_TIMEBASE | SR_CONF_GET,
45 SR_CONF_SAMPLERATE | SR_CONF_GET,
f48e0249
ML		 46};
47
f254bc4b 48static const uint32_t analog_devopts[] = {
5827f61b
BV		 49 SR_CONF_NUM_VDIV | SR_CONF_GET,
50 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
e0b7d23c
ML		 53};
54
f6a0ac9f 55static const uint64_t timebases[][2] = {
e0b7d23c 56 /* nanoseconds */
8e06edf5 57 { 1, 1000000000 },
e0b7d23c
ML		 58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
bafd4890
ML		 92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
8e06edf5 95 { 1000, 1 },
e0b7d23c
ML		 96};
97
f6a0ac9f 98static const uint64_t vdivs[][2] = {
bafd4890
ML		 99 /* microvolts */
100 { 500, 1000000 },
e0b7d23c 101 /* millivolts */
bafd4890 102 { 1, 1000 },
e0b7d23c
ML		 103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
d50725e0
UH		 116 { 20, 1 },
117 { 50, 1 },
118 { 100, 1 },
e0b7d23c
ML		 119};
120
bafd4890
ML		 121#define NUM_TIMEBASE ARRAY_SIZE(timebases)
122#define NUM_VDIV ARRAY_SIZE(vdivs)
123
e0b7d23c
ML		 124static const char *trigger_sources[] = {
125 "CH1",
126 "CH2",
821fbcad
ML		 127 "CH3",
128 "CH4",
e0b7d23c
ML		 129 "EXT",
130 "AC Line",
6bb192bc
ML		 131 "D0",
132 "D1",
133 "D2",
134 "D3",
135 "D4",
136 "D5",
137 "D6",
138 "D7",
139 "D8",
140 "D9",
141 "D10",
142 "D11",
143 "D12",
144 "D13",
145 "D14",
146 "D15",
e0b7d23c
ML		 147};
148
5d336f11
AJ		 149static const char *trigger_slopes[] = {
150 "r",
151 "f",
152};
153
e0b7d23c
ML		 154static const char *coupling[] = {
155 "AC",
156 "DC",
157 "GND",
e0b7d23c
ML		 158};
159
babab622
ML		 160/* Do not change the order of entries */
161static const char *data_sources[] = {
162 "Live",
163 "Memory",
164 "Segmented",
165};
166
569d4dbd
ML		 167enum vendor {
168 RIGOL,
169 AGILENT,
170};
171
172enum series {
173 VS5000,
174 DS1000,
175 DS2000,
176 DS2000A,
177 DSO1000,
178};
10afee13 179
569d4dbd
ML		 180/* short name, full name */
181static const struct rigol_ds_vendor supported_vendors[] = {
182 [RIGOL] = {"Rigol", "Rigol Technologies"},
14e1aa6d 183 [AGILENT] = {"Agilent", "Agilent Technologies"},
569d4dbd
ML		 184};
185
186#define VENDOR(x) &supported_vendors[x]
187/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
188 * live waveform samples, memory buffer samples */
189static const struct rigol_ds_series supported_series[] = {
190 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
191 {50, 1}, {2, 1000}, 14, 2048, 0},
192 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
193 {50, 1}, {2, 1000}, 12, 600, 1048576},
194 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
195 {500, 1}, {2, 1000}, 14, 1400, 14000},
196 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
197 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
198 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
199 {50, 1}, {2, 1000}, 12, 600, 20480},
200};
10afee13 201
569d4dbd
ML		 202#define SERIES(x) &supported_series[x]
203/* series, model, min timebase, analog channels, digital */
bafd4890 204static const struct rigol_ds_model supported_models[] = {
569d4dbd
ML		 205 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
206 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
207 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
208 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
209 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
210 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
211 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
212 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
213 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
214 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
215 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
216 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
217 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
218 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
219 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
220 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
221 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
222 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
223 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
224 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
225 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
226 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
227 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
228 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
229 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
230 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
231 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
232 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
233 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
234 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
512bb890
BV		 235};
236
3086efdd
ML		 237SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
238static struct sr_dev_driver *di = &rigol_ds_driver_info;
f4816ac6 239
fa85f376 240static void clear_helper(void *priv)
f4816ac6 241{
f4816ac6 242 struct dev_context *devc;
effb9dd1 243 unsigned int i;
f4816ac6 244
ba358ffd 245 devc = priv;
babab622
ML		 246 g_free(devc->data);
247 g_free(devc->buffer);
effb9dd1
AJ		 248 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
249 g_free(devc->coupling[i]);
fa85f376
UH		 250 g_free(devc->trigger_source);
251 g_free(devc->trigger_slope);
562b7ae5
SA		 252 g_free(devc->analog_groups);
253 g_free(devc->digital_group);
254 g_free(devc);
fa85f376 255}
f4816ac6 256
3b412e3a 257static int dev_clear(void)
fa85f376
UH		 258{
259 return std_dev_clear(di, clear_helper);
f4816ac6
ML		 260}
261
6078d2c9 262static int init(struct sr_context *sr_ctx)
f4816ac6 263{
f6beaac5 264 return std_init(sr_ctx, di, LOG_PREFIX);
f4816ac6
ML		 265}
266
9d3ae01b 267static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
f4816ac6 268{
cc9fd2d2
BV		 269 struct dev_context *devc;
270 struct sr_dev_inst *sdi;
ae1bc1cc 271 struct sr_scpi_hw_info *hw_info;
ba7dd8bb 272 struct sr_channel *ch;
8dd0b290 273 long n[3];
f6a0ac9f 274 unsigned int i;
bafd4890 275 const struct rigol_ds_model *model = NULL;
569d4dbd 276 gchar *channel_name, **version;
fb6e5ba8 277
ae1bc1cc 278 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
05238d28
ML		 279 sr_info("Couldn't get IDN response, retrying.");
280 sr_scpi_close(scpi);
281 sr_scpi_open(scpi);
282 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
283 sr_info("Couldn't get IDN response.");
284 return NULL;
285 }
ca55277c 286 }
e0b7d23c 287
ca55277c 288 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
569d4dbd
ML		 289 if (!strcasecmp(hw_info->manufacturer,
290 supported_models[i].series->vendor->full_name) &&
10afee13 291 !strcmp(hw_info->model, supported_models[i].name)) {
bafd4890 292 model = &supported_models[i];
ca55277c 293 break;
fb6e5ba8 294 }
ca55277c 295 }
fb6e5ba8 296
0af636be 297 if (!model) {
ae1bc1cc 298 sr_scpi_hw_info_free(hw_info);
9d3ae01b 299 return NULL;
ca55277c 300 }
fb6e5ba8 301
aac29cc1 302 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH		 303 sdi->status = SR_ST_ACTIVE;
304 sdi->vendor = g_strdup(model->series->vendor->name);
305 sdi->model = g_strdup(model->name);
306 sdi->version = g_strdup(hw_info->firmware_version);
ae1bc1cc 307 sdi->conn = scpi;
cc9fd2d2 308 sdi->driver = di;
ae1bc1cc 309 sdi->inst_type = SR_INST_SCPI;
b3fccc85 310 sdi->serial_num = g_strdup(hw_info->serial_number);
f57d8ffe 311 devc = g_malloc0(sizeof(struct dev_context));
cc9fd2d2 312 devc->limit_frames = 0;
bafd4890 313 devc->model = model;
569d4dbd 314 devc->format = model->series->format;
8dd0b290 315
569d4dbd
ML		 316 /* DS1000 models with firmware before 0.2.4 used the old data format. */
317 if (model->series == SERIES(DS1000)) {
8dd0b290
BV		 318 version = g_strsplit(hw_info->firmware_version, ".", 0);
319 do {
320 if (!version[0] || !version[1] || !version[2])
321 break;
322 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
323 break;
324 for (i = 0; i < 3; i++) {
325 if (sr_atol(version[i], &n[i]) != SR_OK)
326 break;
327 }
328 if (i != 3)
329 break;
330 if (n[0] != 0 || n[1] > 2)
331 break;
332 if (n[1] == 2 && n[2] > 3)
333 break;
569d4dbd
ML		 334 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
335 devc->format = FORMAT_RAW;
8dd0b290
BV		 336 } while(0);
337 g_strfreev(version);
338 }
339
340 sr_scpi_hw_info_free(hw_info);
512bb890 341
562b7ae5
SA		 342 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
343 model->analog_channels);
344
821fbcad
ML		 345 for (i = 0; i < model->analog_channels; i++) {
346 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
9d3ae01b 347 return NULL;
3f239f08 348 ch = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE, channel_name);
ba7dd8bb 349 sdi->channels = g_slist_append(sdi->channels, ch);
562b7ae5
SA		 350
351 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
352
353 devc->analog_groups[i]->name = channel_name;
354 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
660e398f 355 sdi->channel_groups = g_slist_append(sdi->channel_groups,
562b7ae5 356 devc->analog_groups[i]);
ca55277c 357 }
512bb890 358
bafd4890 359 if (devc->model->has_digital) {
562b7ae5
SA		 360 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group*));
361
effb9dd1 362 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
ca55277c 363 if (!(channel_name = g_strdup_printf("D%d", i)))
9d3ae01b 364 return NULL;
3f239f08 365 ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE, channel_name);
ca55277c 366 g_free(channel_name);
ba7dd8bb 367 sdi->channels = g_slist_append(sdi->channels, ch);
562b7ae5
SA		 368 devc->digital_group->channels = g_slist_append(
369 devc->digital_group->channels, ch);
512bb890 370 }
562b7ae5 371 devc->digital_group->name = g_strdup("LA");
660e398f 372 sdi->channel_groups = g_slist_append(sdi->channel_groups,
562b7ae5 373 devc->digital_group);
ca55277c 374 }
bafd4890
ML		 375
376 for (i = 0; i < NUM_TIMEBASE; i++) {
377 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
378 devc->timebases = &timebases[i];
569d4dbd 379 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
bafd4890
ML		 380 devc->num_timebases = &timebases[i] - devc->timebases + 1;
381 }
382
0709197d 383 for (i = 0; i < NUM_VDIV; i++)
569d4dbd 384 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
6ff1394e 385 devc->vdivs = &vdivs[i];
bafd4890 386
babab622 387 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
9d3ae01b 388 return NULL;
babab622 389 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
9d3ae01b 390 return NULL;
babab622
ML		 391
392 devc->data_source = DATA_SOURCE_LIVE;
393
cc9fd2d2
BV		 394 sdi->priv = devc;
395
9d3ae01b 396 return sdi;
ca55277c 397}
512bb890 398
6078d2c9 399static GSList *scan(GSList *options)
ca55277c 400{
9d3ae01b 401 return sr_scpi_scan(di->priv, options, probe_device);
f4816ac6
ML		 402}
403
6078d2c9 404static GSList *dev_list(void)
f4816ac6 405{
0e94d524 406 return ((struct drv_context *)(di->priv))->instances;
f4816ac6
ML		 407}
408
6078d2c9 409static int dev_open(struct sr_dev_inst *sdi)
f4816ac6 410{
e1b5b7e7 411 int ret;
ae1bc1cc 412 struct sr_scpi_dev_inst *scpi = sdi->conn;
9bd4c956 413
e1b5b7e7
UH		 414 if ((ret = sr_scpi_open(scpi)) < 0) {
415 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
e0b7d23c 416 return SR_ERR;
e1b5b7e7 417 }
e0b7d23c 418
e1b5b7e7
UH		 419 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
420 sr_err("Failed to get device config: %s.", sr_strerror(ret));
254dd102 421 return SR_ERR;
e1b5b7e7 422 }
f4816ac6 423
46a743c1 424 sdi->status = SR_ST_ACTIVE;
cc9fd2d2 425
f4816ac6
ML		 426 return SR_OK;
427}
428
6078d2c9 429static int dev_close(struct sr_dev_inst *sdi)
f4816ac6 430{
ae1bc1cc 431 struct sr_scpi_dev_inst *scpi;
22c19688 432 struct dev_context *devc;
ae1bc1cc 433
83dbd9f0
AJ		 434 if (sdi->status != SR_ST_ACTIVE)
435 return SR_ERR_DEV_CLOSED;
464d4936 436
ae1bc1cc 437 scpi = sdi->conn;
22c19688
ML		 438 devc = sdi->priv;
439
6e94eb41 440 if (devc->model->series->protocol == PROTOCOL_V2)
38354d9d 441 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
e0b7d23c 442
ae1bc1cc
ML		 443 if (scpi) {
444 if (sr_scpi_close(scpi) < 0)
445 return SR_ERR;
cc9fd2d2
BV		 446 sdi->status = SR_ST_INACTIVE;
447 }
f4816ac6
ML		 448
449 return SR_OK;
450}
451
6078d2c9 452static int cleanup(void)
f4816ac6 453{
3b412e3a 454 return dev_clear();
f4816ac6
ML		 455}
456
5415e602
ML		 457static int analog_frame_size(const struct sr_dev_inst *sdi)
458{
459 struct dev_context *devc = sdi->priv;
ba7dd8bb
UH		 460 struct sr_channel *ch;
461 int analog_channels = 0;
5415e602
ML		 462 GSList *l;
463
ba7dd8bb
UH		 464 for (l = sdi->channels; l; l = l->next) {
465 ch = l->data;
3f239f08 466 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
ba7dd8bb 467 analog_channels++;
569d4dbd
ML		 468 }
469
ba7dd8bb 470 if (analog_channels == 0)
824eb2ac
ML		 471 return 0;
472
569d4dbd
ML		 473 switch (devc->data_source) {
474 case DATA_SOURCE_LIVE:
475 return devc->model->series->live_samples;
476 case DATA_SOURCE_MEMORY:
ba7dd8bb 477 return devc->model->series->buffer_samples / analog_channels;
470140fc 478 default:
569d4dbd 479 return 0;
5415e602
ML		 480 }
481}
482
d22250a9
ML		 483static int digital_frame_size(const struct sr_dev_inst *sdi)
484{
485 struct dev_context *devc = sdi->priv;
486
569d4dbd
ML		 487 switch (devc->data_source) {
488 case DATA_SOURCE_LIVE:
489 return devc->model->series->live_samples * 2;
490 case DATA_SOURCE_MEMORY:
491 return devc->model->series->buffer_samples * 2;
d22250a9
ML		 492 default:
493 return 0;
494 }
495}
496
584560f1 497static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 498 const struct sr_channel_group *cg)
d62d7ad1 499{
e43fdd8d 500 struct dev_context *devc;
ba7dd8bb 501 struct sr_channel *ch;
2b0e4a46 502 const char *tmp_str;
c2b394d5 503 uint64_t samplerate;
2b0e4a46
AJ		 504 int analog_channel = -1;
505 float smallest_diff = 0.0000000001;
506 int idx = -1;
507 unsigned i;
d62d7ad1 508
e43fdd8d
BV		 509 if (!sdi || !(devc = sdi->priv))
510 return SR_ERR_ARG;
511
660e398f 512 /* If a channel group is specified, it must be a valid one. */
53b4680f 513 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
660e398f 514 sr_err("Invalid channel group specified.");
969edf63 515 return SR_ERR;
be60a9e4
BV		 516 }
517
53b4680f 518 if (cg) {
ba7dd8bb
UH		 519 ch = g_slist_nth_data(cg->channels, 0);
520 if (!ch)
2b0e4a46 521 return SR_ERR;
3f239f08 522 if (ch->type == SR_CHANNEL_ANALOG) {
ba7dd8bb 523 if (ch->name[2] < '1' || ch->name[2] > '4')
2b0e4a46 524 return SR_ERR;
ba7dd8bb 525 analog_channel = ch->name[2] - '1';
2b0e4a46
AJ		 526 }
527 }
528
584560f1 529 switch (key) {
d62d7ad1 530 case SR_CONF_NUM_TIMEBASE:
569d4dbd 531 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
d62d7ad1
BV		 532 break;
533 case SR_CONF_NUM_VDIV:
72ecba02 534 *data = g_variant_new_int32(NUM_VDIV);
babab622
ML		 535 case SR_CONF_DATA_SOURCE:
536 if (devc->data_source == DATA_SOURCE_LIVE)
537 *data = g_variant_new_string("Live");
538 else if (devc->data_source == DATA_SOURCE_MEMORY)
539 *data = g_variant_new_string("Memory");
540 else
541 *data = g_variant_new_string("Segmented");
542 break;
4914dd4b
ML		 543 case SR_CONF_SAMPLERATE:
544 if (devc->data_source == DATA_SOURCE_LIVE) {
c2b394d5 545 samplerate = analog_frame_size(sdi) /
569d4dbd 546 (devc->timebase * devc->model->series->num_horizontal_divs);
4914dd4b 547 *data = g_variant_new_uint64(samplerate);
c2b394d5 548 } else {
e1b5b7e7 549 sr_dbg("Unknown data source: %d.", devc->data_source);
4914dd4b 550 return SR_ERR_NA;
c2b394d5 551 }
4914dd4b 552 break;
2b0e4a46
AJ		 553 case SR_CONF_TRIGGER_SOURCE:
554 if (!strcmp(devc->trigger_source, "ACL"))
555 tmp_str = "AC Line";
556 else if (!strcmp(devc->trigger_source, "CHAN1"))
557 tmp_str = "CH1";
558 else if (!strcmp(devc->trigger_source, "CHAN2"))
559 tmp_str = "CH2";
560 else if (!strcmp(devc->trigger_source, "CHAN3"))
561 tmp_str = "CH3";
562 else if (!strcmp(devc->trigger_source, "CHAN4"))
563 tmp_str = "CH4";
564 else
565 tmp_str = devc->trigger_source;
566 *data = g_variant_new_string(tmp_str);
567 break;
5d336f11 568 case SR_CONF_TRIGGER_SLOPE:
e1b5b7e7 569 if (!strncmp(devc->trigger_slope, "POS", 3)) {
5d336f11 570 tmp_str = "r";
e1b5b7e7 571 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
5d336f11 572 tmp_str = "f";
e1b5b7e7
UH		 573 } else {
574 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
5d336f11 575 return SR_ERR_NA;
e1b5b7e7 576 }
5d336f11
AJ		 577 *data = g_variant_new_string(tmp_str);
578 break;
2b0e4a46
AJ		 579 case SR_CONF_TIMEBASE:
580 for (i = 0; i < devc->num_timebases; i++) {
581 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
582 float diff = fabs(devc->timebase - tb);
583 if (diff < smallest_diff) {
584 smallest_diff = diff;
585 idx = i;
586 }
587 }
e1b5b7e7
UH		 588 if (idx < 0) {
589 sr_dbg("Negative timebase index: %d.", idx);
2b0e4a46 590 return SR_ERR_NA;
e1b5b7e7 591 }
2b0e4a46
AJ		 592 *data = g_variant_new("(tt)", devc->timebases[idx][0],
593 devc->timebases[idx][1]);
594 break;
595 case SR_CONF_VDIV:
e1b5b7e7
UH		 596 if (analog_channel < 0) {
597 sr_dbg("Negative analog channel: %d.", analog_channel);
2b0e4a46 598 return SR_ERR_NA;
e1b5b7e7 599 }
2b0e4a46
AJ		 600 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
601 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
602 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
603 if (diff < smallest_diff) {
604 smallest_diff = diff;
605 idx = i;
606 }
607 }
e1b5b7e7
UH		 608 if (idx < 0) {
609 sr_dbg("Negative vdiv index: %d.", idx);
2b0e4a46 610 return SR_ERR_NA;
e1b5b7e7 611 }
2b0e4a46
AJ		 612 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
613 break;
614 case SR_CONF_COUPLING:
e1b5b7e7
UH		 615 if (analog_channel < 0) {
616 sr_dbg("Negative analog channel: %d.", analog_channel);
2b0e4a46 617 return SR_ERR_NA;
e1b5b7e7 618 }
2b0e4a46
AJ		 619 *data = g_variant_new_string(devc->coupling[analog_channel]);
620 break;
d62d7ad1 621 default:
e1b5b7e7 622 sr_dbg("Tried to get unknown config key: %d.", key);
bd6fbf62 623 return SR_ERR_NA;
d62d7ad1
BV		 624 }
625
626 return SR_OK;
627}
628
584560f1 629static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 630 const struct sr_channel_group *cg)
f4816ac6 631{
29d957ce 632 struct dev_context *devc;
ca9b9f48 633 uint64_t p, q;
254dd102 634 double t_dbl;
f48e0249 635 unsigned int i, j;
254dd102
BV		 636 int ret;
637 const char *tmp_str;
889ef4a0 638 char buffer[16];
f4816ac6 639
e43fdd8d
BV		 640 if (!(devc = sdi->priv))
641 return SR_ERR_ARG;
29d957ce 642
e73ffd42
BV		 643 if (sdi->status != SR_ST_ACTIVE)
644 return SR_ERR_DEV_CLOSED;
f4816ac6 645
660e398f 646 /* If a channel group is specified, it must be a valid one. */
53b4680f 647 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
660e398f 648 sr_err("Invalid channel group specified.");
969edf63 649 return SR_ERR;
be60a9e4
BV		 650 }
651
f4816ac6 652 ret = SR_OK;
584560f1 653 switch (key) {
1953564a 654 case SR_CONF_LIMIT_FRAMES:
f6a0ac9f 655 devc->limit_frames = g_variant_get_uint64(data);
e0b7d23c 656 break;
1953564a 657 case SR_CONF_TRIGGER_SLOPE:
ca9b9f48
DE		 658 tmp_str = g_variant_get_string(data, NULL);
659
e1b5b7e7
UH		 660 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
661 sr_err("Unknown trigger slope: '%s'.",
662 (tmp_str) ? tmp_str : "NULL");
ca9b9f48 663 return SR_ERR_ARG;
e1b5b7e7 664 }
ca9b9f48 665
254dd102 666 g_free(devc->trigger_slope);
ca9b9f48 667 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
38354d9d 668 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
e0b7d23c 669 break;
1953564a 670 case SR_CONF_HORIZ_TRIGGERPOS:
254dd102 671 t_dbl = g_variant_get_double(data);
e1b5b7e7
UH		 672 if (t_dbl < 0.0 || t_dbl > 1.0) {
673 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
254dd102 674 return SR_ERR;
e1b5b7e7 675 }
254dd102
BV		 676 devc->horiz_triggerpos = t_dbl;
677 /* We have the trigger offset as a percentage of the frame, but
678 * need to express this in seconds. */
bafd4890 679 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
889ef4a0 680 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
38354d9d 681 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
e0b7d23c 682 break;
1953564a 683 case SR_CONF_TIMEBASE:
f6a0ac9f 684 g_variant_get(data, "(tt)", &p, &q);
bafd4890
ML		 685 for (i = 0; i < devc->num_timebases; i++) {
686 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
254dd102 687 devc->timebase = (float)p / q;
889ef4a0
AJ		 688 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
689 devc->timebase);
38354d9d 690 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
f6a0ac9f
BV		 691 break;
692 }
693 }
e1b5b7e7
UH		 694 if (i == devc->num_timebases) {
695 sr_err("Invalid timebase index: %d.", i);
254dd102 696 ret = SR_ERR_ARG;
e1b5b7e7 697 }
e0b7d23c 698 break;
1953564a 699 case SR_CONF_TRIGGER_SOURCE:
f6a0ac9f 700 tmp_str = g_variant_get_string(data, NULL);
254dd102
BV		 701 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
702 if (!strcmp(trigger_sources[i], tmp_str)) {
703 g_free(devc->trigger_source);
704 devc->trigger_source = g_strdup(trigger_sources[i]);
705 if (!strcmp(devc->trigger_source, "AC Line"))
706 tmp_str = "ACL";
707 else if (!strcmp(devc->trigger_source, "CH1"))
708 tmp_str = "CHAN1";
709 else if (!strcmp(devc->trigger_source, "CH2"))
710 tmp_str = "CHAN2";
821fbcad
ML		 711 else if (!strcmp(devc->trigger_source, "CH3"))
712 tmp_str = "CHAN3";
713 else if (!strcmp(devc->trigger_source, "CH4"))
714 tmp_str = "CHAN4";
254dd102
BV		 715 else
716 tmp_str = (char *)devc->trigger_source;
38354d9d 717 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
254dd102
BV		 718 break;
719 }
4e108ace 720 }
e1b5b7e7
UH		 721 if (i == ARRAY_SIZE(trigger_sources)) {
722 sr_err("Invalid trigger source index: %d.", i);
254dd102 723 ret = SR_ERR_ARG;
e1b5b7e7 724 }
e0b7d23c 725 break;
1953564a 726 case SR_CONF_VDIV:
53b4680f 727 if (!cg) {
660e398f
UH		 728 sr_err("No channel group specified.");
729 return SR_ERR_CHANNEL_GROUP;
be60a9e4 730 }
f6a0ac9f 731 g_variant_get(data, "(tt)", &p, &q);
effb9dd1 732 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 733 if (cg == devc->analog_groups[i]) {
78bcc55a 734 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
f48e0249
ML		 735 if (vdivs[j][0] != p || vdivs[j][1] != q)
736 continue;
737 devc->vdiv[i] = (float)p / q;
889ef4a0
AJ		 738 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
739 devc->vdiv[i]);
38354d9d 740 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
889ef4a0 741 buffer);
f48e0249 742 }
e1b5b7e7 743 sr_err("Invalid vdiv index: %d.", j);
f48e0249
ML		 744 return SR_ERR_ARG;
745 }
e0b7d23c 746 }
e1b5b7e7 747 sr_dbg("Didn't set vdiv, unknown channel(group).");
f48e0249 748 return SR_ERR_NA;
1953564a 749 case SR_CONF_COUPLING:
53b4680f 750 if (!cg) {
660e398f
UH		 751 sr_err("No channel group specified.");
752 return SR_ERR_CHANNEL_GROUP;
78bcc55a 753 }
f6a0ac9f 754 tmp_str = g_variant_get_string(data, NULL);
effb9dd1 755 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 756 if (cg == devc->analog_groups[i]) {
78bcc55a
BV		 757 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
758 if (!strcmp(tmp_str, coupling[j])) {
f48e0249
ML		 759 g_free(devc->coupling[i]);
760 devc->coupling[i] = g_strdup(coupling[j]);
38354d9d 761 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
f48e0249
ML		 762 devc->coupling[i]);
763 }
764 }
e1b5b7e7 765 sr_err("Invalid coupling index: %d.", j);
f48e0249 766 return SR_ERR_ARG;
e0b7d23c
ML		 767 }
768 }
e1b5b7e7 769 sr_dbg("Didn't set coupling, unknown channel(group).");
f48e0249 770 return SR_ERR_NA;
babab622
ML		 771 case SR_CONF_DATA_SOURCE:
772 tmp_str = g_variant_get_string(data, NULL);
773 if (!strcmp(tmp_str, "Live"))
774 devc->data_source = DATA_SOURCE_LIVE;
569d4dbd
ML		 775 else if (devc->model->series->protocol >= PROTOCOL_V2
776 && !strcmp(tmp_str, "Memory"))
babab622 777 devc->data_source = DATA_SOURCE_MEMORY;
569d4dbd 778 else if (devc->model->series->protocol >= PROTOCOL_V3
babab622
ML		 779 && !strcmp(tmp_str, "Segmented"))
780 devc->data_source = DATA_SOURCE_SEGMENTED;
e1b5b7e7
UH		 781 else {
782 sr_err("Unknown data source: '%s'.", tmp_str);
babab622 783 return SR_ERR;
e1b5b7e7 784 }
babab622 785 break;
f4816ac6 786 default:
e1b5b7e7 787 sr_dbg("Tried to set unknown config key: %d.", key);
bd6fbf62 788 ret = SR_ERR_NA;
29d957ce 789 break;
f4816ac6
ML		 790 }
791
792 return ret;
793}
794
584560f1 795static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 796 const struct sr_channel_group *cg)
a1c743fc 797{
861c447b
BV		 798 GVariant *tuple, *rational[2];
799 GVariantBuilder gvb;
800 unsigned int i;
7cc1a550
ML		 801 struct dev_context *devc = NULL;
802
803 if (sdi)
804 devc = sdi->priv;
8f996b89 805
e43fdd8d 806 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1 807 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
a0e0bb41 808 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
e43fdd8d 809 return SR_OK;
53b4680f 810 } else if (key == SR_CONF_DEVICE_OPTIONS && cg == NULL) {
584560f1 811 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 812 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
e43fdd8d
BV		 813 return SR_OK;
814 }
815
816 /* Every other option requires a valid device instance. */
817 if (!sdi || !(devc = sdi->priv))
818 return SR_ERR_ARG;
819
660e398f 820 /* If a channel group is specified, it must be a valid one. */
53b4680f 821 if (cg) {
effb9dd1
AJ		 822 for (i = 0; i < devc->model->analog_channels; i++)
823 if (cg == devc->analog_groups[i])
824 break;
825 if (i >= devc->model->analog_channels) {
660e398f 826 sr_err("Invalid channel group specified.");
be60a9e4
BV		 827 return SR_ERR;
828 }
829 }
830
e43fdd8d 831 switch (key) {
9a6517d1 832 case SR_CONF_DEVICE_OPTIONS:
53b4680f 833 if (!cg) {
660e398f
UH		 834 sr_err("No channel group specified.");
835 return SR_ERR_CHANNEL_GROUP;
be60a9e4 836 }
562b7ae5 837 if (cg == devc->digital_group) {
584560f1
BV		 838 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
839 NULL, 0, sizeof(uint32_t));
f48e0249
ML		 840 return SR_OK;
841 } else {
effb9dd1 842 for (i = 0; i < devc->model->analog_channels; i++) {
562b7ae5 843 if (cg == devc->analog_groups[i]) {
584560f1 844 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 845 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
f48e0249
ML		 846 return SR_OK;
847 }
848 }
849 return SR_ERR_NA;
850 }
5f77dffc 851 break;
2a7b113d 852 case SR_CONF_COUPLING:
53b4680f 853 if (!cg) {
660e398f
UH		 854 sr_err("No channel group specified.");
855 return SR_ERR_CHANNEL_GROUP;
f48e0249 856 }
58f43369
BV		 857 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
858 break;
e4f2b2ad 859 case SR_CONF_VDIV:
7cc1a550
ML		 860 if (!devc)
861 /* Can't know this until we have the exact model. */
862 return SR_ERR_ARG;
53b4680f 863 if (!cg) {
660e398f
UH		 864 sr_err("No channel group specified.");
865 return SR_ERR_CHANNEL_GROUP;
861c447b 866 }
58f43369 867 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
0709197d 868 for (i = 0; i < NUM_VDIV; i++) {
bafd4890
ML		 869 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
870 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
58f43369
BV		 871 tuple = g_variant_new_tuple(rational, 2);
872 g_variant_builder_add_value(&gvb, tuple);
873 }
874 *data = g_variant_builder_end(&gvb);
875 break;
41f5bd09 876 case SR_CONF_TIMEBASE:
7cc1a550
ML		 877 if (!devc)
878 /* Can't know this until we have the exact model. */
879 return SR_ERR_ARG;
a31b2ccb
AJ		 880 if (devc->num_timebases <= 0)
881 return SR_ERR_NA;
861c447b 882 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
bafd4890
ML		 883 for (i = 0; i < devc->num_timebases; i++) {
884 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
885 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
861c447b
BV		 886 tuple = g_variant_new_tuple(rational, 2);
887 g_variant_builder_add_value(&gvb, tuple);
888 }
889 *data = g_variant_builder_end(&gvb);
41f5bd09 890 break;
328bafab 891 case SR_CONF_TRIGGER_SOURCE:
7cc1a550
ML		 892 if (!devc)
893 /* Can't know this until we have the exact model. */
894 return SR_ERR_ARG;
f6a0ac9f 895 *data = g_variant_new_strv(trigger_sources,
bafd4890 896 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
328bafab 897 break;
5d336f11
AJ		 898 case SR_CONF_TRIGGER_SLOPE:
899 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
900 break;
babab622
ML		 901 case SR_CONF_DATA_SOURCE:
902 if (!devc)
903 /* Can't know this until we have the exact model. */
904 return SR_ERR_ARG;
569d4dbd
ML		 905 switch (devc->model->series->protocol) {
906 case PROTOCOL_V1:
907 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
908 break;
909 case PROTOCOL_V2:
babab622 910 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
569d4dbd
ML		 911 break;
912 default:
913 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
914 break;
915 }
babab622 916 break;
a1c743fc 917 default:
e1b5b7e7 918 sr_dbg("Tried to list unknown config key: %d.", key);
bd6fbf62 919 return SR_ERR_NA;
a1c743fc
BV		 920 }
921
922 return SR_OK;
923}
924
254dd102 925static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
f4816ac6 926{
ae1bc1cc 927 struct sr_scpi_dev_inst *scpi;
29d957ce 928 struct dev_context *devc;
ba7dd8bb 929 struct sr_channel *ch;
f76c24f6 930 struct sr_datafeed_packet packet;
254dd102 931 GSList *l;
29d957ce 932
e73ffd42
BV		 933 if (sdi->status != SR_ST_ACTIVE)
934 return SR_ERR_DEV_CLOSED;
e0b7d23c 935
ae1bc1cc 936 scpi = sdi->conn;
29d957ce
UH		 937 devc = sdi->priv;
938
51b294cd
ML		 939 devc->num_frames = 0;
940
ba7dd8bb
UH		 941 for (l = sdi->channels; l; l = l->next) {
942 ch = l->data;
943 sr_dbg("handling channel %s", ch->name);
3f239f08 944 if (ch->type == SR_CHANNEL_ANALOG) {
ba7dd8bb
UH		 945 if (ch->enabled)
946 devc->enabled_analog_channels = g_slist_append(
947 devc->enabled_analog_channels, ch);
948 if (ch->enabled != devc->analog_channels[ch->index]) {
6bb192bc 949 /* Enabled channel is currently disabled, or vice versa. */
ba7dd8bb
UH		 950 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
951 ch->enabled ? "ON" : "OFF") != SR_OK)
6bb192bc 952 return SR_ERR;
ba7dd8bb 953 devc->analog_channels[ch->index] = ch->enabled;
6bb192bc 954 }
3f239f08 955 } else if (ch->type == SR_CHANNEL_LOGIC) {
ba7dd8bb
UH		 956 if (ch->enabled) {
957 devc->enabled_digital_channels = g_slist_append(
958 devc->enabled_digital_channels, ch);
04e8e01e
ML		 959 /* Turn on LA module if currently off. */
960 if (!devc->la_enabled) {
38354d9d 961 if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
04e8e01e
ML		 962 return SR_ERR;
963 devc->la_enabled = TRUE;
964 }
965 }
ba7dd8bb 966 if (ch->enabled != devc->digital_channels[ch->index]) {
6bb192bc 967 /* Enabled channel is currently disabled, or vice versa. */
ba7dd8bb
UH		 968 if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", ch->index,
969 ch->enabled ? "ON" : "OFF") != SR_OK)
6bb192bc 970 return SR_ERR;
ba7dd8bb 971 devc->digital_channels[ch->index] = ch->enabled;
6bb192bc 972 }
254dd102
BV		 973 }
974 }
1fed20cb 975
ba7dd8bb 976 if (!devc->enabled_analog_channels && !devc->enabled_digital_channels)
254dd102 977 return SR_ERR;
e0b7d23c 978
ba7dd8bb
UH		 979 /* Turn off LA module if on and no digital channels selected. */
980 if (devc->la_enabled && !devc->enabled_digital_channels)
38354d9d 981 if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
04e8e01e
ML		 982 return SR_ERR;
983
e086b750
ML		 984 /* Set memory mode. */
985 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
986 sr_err("Data source 'Segmented' not yet supported");
987 return SR_ERR;
988 }
989
990 devc->analog_frame_size = analog_frame_size(sdi);
991 devc->digital_frame_size = digital_frame_size(sdi);
992
569d4dbd
ML		 993 switch (devc->model->series->protocol) {
994 case PROTOCOL_V2:
99af83b7 995 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
e086b750 996 return SR_ERR;
569d4dbd
ML		 997 break;
998 case PROTOCOL_V3:
e086b750
ML		 999 /* Apparently for the DS2000 the memory
1000 * depth can only be set in Running state -
1001 * this matches the behaviour of the UI. */
38354d9d 1002 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1fed20cb 1003 return SR_ERR;
e086b750
ML		 1004 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1005 devc->analog_frame_size) != SR_OK)
1006 return SR_ERR;
1007 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1fed20cb 1008 return SR_ERR;
569d4dbd
ML		 1009 break;
1010 default:
1011 break;
1fed20cb
ML		 1012 }
1013
e086b750
ML		 1014 if (devc->data_source == DATA_SOURCE_LIVE)
1015 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1016 return SR_ERR;
1017
102f1239
BV		 1018 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1019 rigol_ds_receive, (void *)sdi);
e0b7d23c
ML		 1020
1021 /* Send header packet to the session bus. */
29a27196 1022 std_session_send_df_header(cb_data, LOG_PREFIX);
e0b7d23c 1023
ba7dd8bb
UH		 1024 if (devc->enabled_analog_channels)
1025 devc->channel_entry = devc->enabled_analog_channels;
821fbcad 1026 else
ba7dd8bb 1027 devc->channel_entry = devc->enabled_digital_channels;
821fbcad 1028
e086b750
ML		 1029 if (rigol_ds_capture_start(sdi) != SR_OK)
1030 return SR_ERR;
f4816ac6 1031
f76c24f6
ML		 1032 /* Start of first frame. */
1033 packet.type = SR_DF_FRAME_BEGIN;
1034 sr_session_send(cb_data, &packet);
1035
f4816ac6
ML		 1036 return SR_OK;
1037}
1038
254dd102 1039static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
f4816ac6 1040{
29d957ce 1041 struct dev_context *devc;
ae1bc1cc 1042 struct sr_scpi_dev_inst *scpi;
b751cf7a 1043 struct sr_datafeed_packet packet;
29d957ce 1044
f4816ac6
ML		 1045 (void)cb_data;
1046
29d957ce
UH		 1047 devc = sdi->priv;
1048
f4816ac6
ML		 1049 if (sdi->status != SR_ST_ACTIVE) {
1050 sr_err("Device inactive, can't stop acquisition.");
1051 return SR_ERR;
1052 }
1053
b751cf7a
ML		 1054 /* End of last frame. */
1055 packet.type = SR_DF_END;
1056 sr_session_send(sdi, &packet);
1057
ba7dd8bb
UH		 1058 g_slist_free(devc->enabled_analog_channels);
1059 g_slist_free(devc->enabled_digital_channels);
1060 devc->enabled_analog_channels = NULL;
1061 devc->enabled_digital_channels = NULL;
ae1bc1cc 1062 scpi = sdi->conn;
102f1239 1063 sr_scpi_source_remove(sdi->session, scpi);
f4816ac6
ML		 1064
1065 return SR_OK;
1066}
1067
3086efdd
ML		 1068SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1069 .name = "rigol-ds",
1070 .longname = "Rigol DS",
f4816ac6 1071 .api_version = 1,
6078d2c9
UH		 1072 .init = init,
1073 .cleanup = cleanup,
1074 .scan = scan,
1075 .dev_list = dev_list,
3b412e3a 1076 .dev_clear = dev_clear,
d62d7ad1 1077 .config_get = config_get,
035a1078 1078 .config_set = config_set,
a1c743fc 1079 .config_list = config_list,
6078d2c9
UH		 1080 .dev_open = dev_open,
1081 .dev_close = dev_close,
254dd102
BV		 1082 .dev_acquisition_start = dev_acquisition_start,
1083 .dev_acquisition_stop = dev_acquisition_stop,
f4816ac6
ML		 1084 .priv = NULL,
1085};
Hardware access and backend lib