]>
Commit | Line | Data |
---|---|---|
0aba65da | 1 | /* |
50985c20 | 2 | * This file is part of the libsigrok project. |
0aba65da | 3 | * |
13d8e03c | 4 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> |
0aba65da UH |
5 | * |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
6ec6c43b | 20 | #include <config.h> |
515ab088 | 21 | #include "protocol.h" |
0aba65da | 22 | |
f8fd8420 | 23 | struct ols_basic_trigger_desc { |
24 | uint32_t trigger_mask[NUM_BASIC_TRIGGER_STAGES]; | |
25 | uint32_t trigger_value[NUM_BASIC_TRIGGER_STAGES]; | |
26 | int num_stages; | |
27 | }; | |
28 | ||
0aba65da UH |
29 | SR_PRIV int send_shortcommand(struct sr_serial_dev_inst *serial, |
30 | uint8_t command) | |
31 | { | |
32 | char buf[1]; | |
33 | ||
34 | sr_dbg("Sending cmd 0x%.2x.", command); | |
35 | buf[0] = command; | |
f4d3a4fb | 36 | if (serial_write_blocking(serial, buf, 1, serial_timeout(serial, 1)) != 1) |
0aba65da UH |
37 | return SR_ERR; |
38 | ||
dcdc2848 | 39 | if (serial_drain(serial) != SR_OK) |
bce75f94 UJ |
40 | return SR_ERR; |
41 | ||
0aba65da UH |
42 | return SR_OK; |
43 | } | |
44 | ||
45 | SR_PRIV int send_longcommand(struct sr_serial_dev_inst *serial, | |
016e72f3 | 46 | uint8_t command, uint8_t *data) |
0aba65da UH |
47 | { |
48 | char buf[5]; | |
49 | ||
016e72f3 BV |
50 | sr_dbg("Sending cmd 0x%.2x data 0x%.2x%.2x%.2x%.2x.", command, |
51 | data[0], data[1], data[2], data[3]); | |
0aba65da | 52 | buf[0] = command; |
016e72f3 BV |
53 | buf[1] = data[0]; |
54 | buf[2] = data[1]; | |
55 | buf[3] = data[2]; | |
56 | buf[4] = data[3]; | |
f4d3a4fb | 57 | if (serial_write_blocking(serial, buf, 5, serial_timeout(serial, 1)) != 5) |
0aba65da UH |
58 | return SR_ERR; |
59 | ||
dcdc2848 | 60 | if (serial_drain(serial) != SR_OK) |
bce75f94 UJ |
61 | return SR_ERR; |
62 | ||
0aba65da UH |
63 | return SR_OK; |
64 | } | |
65 | ||
3cc9e215 | 66 | static int ols_send_longdata(struct sr_serial_dev_inst *serial, |
67 | uint8_t command, uint32_t value) | |
68 | { | |
69 | uint8_t data[4]; | |
70 | WL32(data, value); | |
71 | return send_longcommand(serial, command, data); | |
72 | } | |
73 | ||
244995a2 GGM |
74 | SR_PRIV int ols_send_reset(struct sr_serial_dev_inst *serial) |
75 | { | |
76 | unsigned int i; | |
77 | ||
78 | for (i = 0; i < 5; i++) { | |
79 | if (send_shortcommand(serial, CMD_RESET) != SR_OK) | |
80 | return SR_ERR; | |
81 | } | |
82 | ||
83 | return SR_OK; | |
84 | } | |
85 | ||
91fd0f72 | 86 | /* Configures the channel mask based on which channels are enabled. */ |
f8fd8420 | 87 | SR_PRIV uint32_t ols_channel_mask(const struct sr_dev_inst *sdi) |
0aba65da | 88 | { |
f8fd8420 | 89 | uint32_t channel_mask = 0; |
90 | for (const GSList *l = sdi->channels; l; l = l->next) { | |
91 | struct sr_channel *channel = l->data; | |
91fd0f72 | 92 | if (channel->enabled) |
f8fd8420 | 93 | channel_mask |= 1 << channel->index; |
91fd0f72 | 94 | } |
f8fd8420 | 95 | |
96 | return channel_mask; | |
91fd0f72 BV |
97 | } |
98 | ||
f8fd8420 | 99 | static int convert_trigger(const struct sr_dev_inst *sdi, struct ols_basic_trigger_desc *ols_trigger) |
91fd0f72 | 100 | { |
91fd0f72 BV |
101 | struct sr_trigger *trigger; |
102 | struct sr_trigger_stage *stage; | |
103 | struct sr_trigger_match *match; | |
104 | const GSList *l, *m; | |
105 | int i; | |
106 | ||
f8fd8420 | 107 | ols_trigger->num_stages = 0; |
108 | for (i = 0; i < NUM_BASIC_TRIGGER_STAGES; i++) { | |
109 | ols_trigger->trigger_mask[i] = 0; | |
110 | ols_trigger->trigger_value[i] = 0; | |
0aba65da UH |
111 | } |
112 | ||
0812c40e | 113 | if (!(trigger = sr_session_trigger_get(sdi->session))) |
91fd0f72 | 114 | return SR_OK; |
0aba65da | 115 | |
f8fd8420 | 116 | ols_trigger->num_stages = g_slist_length(trigger->stages); |
117 | if (ols_trigger->num_stages > NUM_BASIC_TRIGGER_STAGES) { | |
91fd0f72 | 118 | sr_err("This device only supports %d trigger stages.", |
f8fd8420 | 119 | NUM_BASIC_TRIGGER_STAGES); |
91fd0f72 BV |
120 | return SR_ERR; |
121 | } | |
b1de0407 | 122 | |
91fd0f72 BV |
123 | for (l = trigger->stages; l; l = l->next) { |
124 | stage = l->data; | |
125 | for (m = stage->matches; m; m = m->next) { | |
126 | match = m->data; | |
127 | if (!match->channel->enabled) | |
128 | /* Ignore disabled channels with a trigger. */ | |
129 | continue; | |
f8fd8420 | 130 | ols_trigger->trigger_mask[stage->stage] |= 1 << match->channel->index; |
91fd0f72 | 131 | if (match->match == SR_TRIGGER_ONE) |
f8fd8420 | 132 | ols_trigger->trigger_value[stage->stage] |= 1 << match->channel->index; |
0aba65da | 133 | } |
0aba65da UH |
134 | } |
135 | ||
136 | return SR_OK; | |
137 | } | |
138 | ||
0aba65da UH |
139 | SR_PRIV struct dev_context *ols_dev_new(void) |
140 | { | |
141 | struct dev_context *devc; | |
142 | ||
f57d8ffe | 143 | devc = g_malloc0(sizeof(struct dev_context)); |
a2b1a53b | 144 | devc->trigger_at_smpl = OLS_NO_TRIGGER; |
bf256783 | 145 | |
0aba65da UH |
146 | return devc; |
147 | } | |
148 | ||
4a34a74d WS |
149 | static void ols_channel_new(struct sr_dev_inst *sdi, int num_chan) |
150 | { | |
ea642977 | 151 | struct dev_context *devc = sdi->priv; |
4a34a74d WS |
152 | int i; |
153 | ||
154 | for (i = 0; i < num_chan; i++) | |
155 | sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, | |
156 | ols_channel_names[i]); | |
ea642977 WS |
157 | |
158 | devc->max_channels = num_chan; | |
4a34a74d WS |
159 | } |
160 | ||
aad6b9de | 161 | static void ols_metadata_quirks(struct sr_dev_inst *sdi) |
ad4174c1 GS |
162 | { |
163 | struct dev_context *devc; | |
164 | gboolean is_shrimp; | |
165 | ||
166 | if (!sdi) | |
167 | return; | |
168 | devc = sdi->priv; | |
169 | if (!devc) | |
170 | return; | |
171 | ||
172 | is_shrimp = sdi->model && strcmp(sdi->model, "Shrimp1.0") == 0; | |
173 | if (is_shrimp) { | |
174 | if (!devc->max_channels) | |
175 | ols_channel_new(sdi, 4); | |
176 | if (!devc->max_samples) | |
177 | devc->max_samples = 256 * 1024; | |
178 | if (!devc->max_samplerate) | |
179 | devc->max_samplerate = SR_MHZ(20); | |
180 | } | |
6f9234e6 | 181 | |
182 | if (sdi->version && strstr(sdi->version, "FPGA version 3.07")) | |
183 | devc->device_flags |= DEVICE_FLAG_IS_DEMON_CORE; | |
ad4174c1 GS |
184 | } |
185 | ||
0aba65da UH |
186 | SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial) |
187 | { | |
188 | struct sr_dev_inst *sdi; | |
189 | struct dev_context *devc; | |
4a34a74d | 190 | uint32_t tmp_int; |
6f9234e6 | 191 | uint8_t key, type; |
f4d3a4fb | 192 | int delay_ms; |
0aba65da UH |
193 | GString *tmp_str, *devname, *version; |
194 | guchar tmp_c; | |
195 | ||
aac29cc1 | 196 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); |
0af636be | 197 | sdi->status = SR_ST_INACTIVE; |
0aba65da UH |
198 | devc = ols_dev_new(); |
199 | sdi->priv = devc; | |
200 | ||
201 | devname = g_string_new(""); | |
202 | version = g_string_new(""); | |
203 | ||
204 | key = 0xff; | |
205 | while (key) { | |
f4d3a4fb BV |
206 | delay_ms = serial_timeout(serial, 1); |
207 | if (serial_read_blocking(serial, &key, 1, delay_ms) != 1) | |
0aba65da | 208 | break; |
6f9234e6 | 209 | if (key == METADATA_TOKEN_END) { |
625763e2 BV |
210 | sr_dbg("Got metadata key 0x00, metadata ends."); |
211 | break; | |
212 | } | |
0aba65da | 213 | type = key >> 5; |
0aba65da UH |
214 | switch (type) { |
215 | case 0: | |
216 | /* NULL-terminated string */ | |
217 | tmp_str = g_string_new(""); | |
f4d3a4fb BV |
218 | delay_ms = serial_timeout(serial, 1); |
219 | while (serial_read_blocking(serial, &tmp_c, 1, delay_ms) == 1 && tmp_c != '\0') | |
0aba65da | 220 | g_string_append_c(tmp_str, tmp_c); |
6f9234e6 | 221 | sr_dbg("Got metadata token 0x%.2x value '%s'.", key, tmp_str->str); |
222 | switch (key) { | |
223 | case METADATA_TOKEN_DEVICE_NAME: | |
0aba65da UH |
224 | /* Device name */ |
225 | devname = g_string_append(devname, tmp_str->str); | |
226 | break; | |
6f9234e6 | 227 | case METADATA_TOKEN_FPGA_VERSION: |
0aba65da UH |
228 | /* FPGA firmware version */ |
229 | if (version->len) | |
230 | g_string_append(version, ", "); | |
231 | g_string_append(version, "FPGA version "); | |
232 | g_string_append(version, tmp_str->str); | |
233 | break; | |
6f9234e6 | 234 | case METADATA_TOKEN_ANCILLARY_VERSION: |
0aba65da UH |
235 | /* Ancillary version */ |
236 | if (version->len) | |
237 | g_string_append(version, ", "); | |
238 | g_string_append(version, "Ancillary version "); | |
239 | g_string_append(version, tmp_str->str); | |
240 | break; | |
241 | default: | |
6f9234e6 | 242 | sr_info("ols: unknown token 0x%.2x: '%s'", key, tmp_str->str); |
0aba65da UH |
243 | break; |
244 | } | |
245 | g_string_free(tmp_str, TRUE); | |
246 | break; | |
247 | case 1: | |
248 | /* 32-bit unsigned integer */ | |
f4d3a4fb BV |
249 | delay_ms = serial_timeout(serial, 4); |
250 | if (serial_read_blocking(serial, &tmp_int, 4, delay_ms) != 4) | |
0aba65da | 251 | break; |
016e72f3 | 252 | tmp_int = RB32(&tmp_int); |
6f9234e6 | 253 | sr_dbg("Got metadata token 0x%.2x value 0x%.8x.", key, tmp_int); |
254 | switch (key) { | |
255 | case METADATA_TOKEN_NUM_PROBES_LONG: | |
ba7dd8bb | 256 | /* Number of usable channels */ |
4a34a74d | 257 | ols_channel_new(sdi, tmp_int); |
0aba65da | 258 | break; |
6f9234e6 | 259 | case METADATA_TOKEN_SAMPLE_MEMORY_BYTES: |
0aba65da UH |
260 | /* Amount of sample memory available (bytes) */ |
261 | devc->max_samples = tmp_int; | |
262 | break; | |
6f9234e6 | 263 | case METADATA_TOKEN_DYNAMIC_MEMORY_BYTES: |
0aba65da UH |
264 | /* Amount of dynamic memory available (bytes) */ |
265 | /* what is this for? */ | |
266 | break; | |
6f9234e6 | 267 | case METADATA_TOKEN_MAX_SAMPLE_RATE_HZ: |
f3f19d11 | 268 | /* Maximum sample rate (Hz) */ |
0aba65da UH |
269 | devc->max_samplerate = tmp_int; |
270 | break; | |
6f9234e6 | 271 | case METADATA_TOKEN_PROTOCOL_VERSION_LONG: |
0aba65da UH |
272 | /* protocol version */ |
273 | devc->protocol_version = tmp_int; | |
274 | break; | |
275 | default: | |
6f9234e6 | 276 | sr_info("Unknown token 0x%.2x: 0x%.8x.", key, tmp_int); |
0aba65da UH |
277 | break; |
278 | } | |
279 | break; | |
280 | case 2: | |
281 | /* 8-bit unsigned integer */ | |
f4d3a4fb BV |
282 | delay_ms = serial_timeout(serial, 1); |
283 | if (serial_read_blocking(serial, &tmp_c, 1, delay_ms) != 1) | |
0aba65da | 284 | break; |
6f9234e6 | 285 | sr_dbg("Got metadata token 0x%.2x value 0x%.2x.", key, tmp_c); |
286 | switch (key) { | |
287 | case METADATA_TOKEN_NUM_PROBES_SHORT: | |
ba7dd8bb | 288 | /* Number of usable channels */ |
4a34a74d | 289 | ols_channel_new(sdi, tmp_c); |
0aba65da | 290 | break; |
6f9234e6 | 291 | case METADATA_TOKEN_PROTOCOL_VERSION_SHORT: |
0aba65da UH |
292 | /* protocol version */ |
293 | devc->protocol_version = tmp_c; | |
294 | break; | |
295 | default: | |
6f9234e6 | 296 | sr_info("Unknown token 0x%.2x: 0x%.2x.", key, tmp_c); |
0aba65da UH |
297 | break; |
298 | } | |
299 | break; | |
300 | default: | |
301 | /* unknown type */ | |
302 | break; | |
303 | } | |
304 | } | |
305 | ||
306 | sdi->model = devname->str; | |
307 | sdi->version = version->str; | |
308 | g_string_free(devname, FALSE); | |
309 | g_string_free(version, FALSE); | |
310 | ||
ad4174c1 | 311 | /* Optionally amend received metadata, model specific quirks. */ |
aad6b9de | 312 | ols_metadata_quirks(sdi); |
ad4174c1 | 313 | |
0aba65da UH |
314 | return sdi; |
315 | } | |
316 | ||
317 | SR_PRIV int ols_set_samplerate(const struct sr_dev_inst *sdi, | |
e46aa4f6 | 318 | const uint64_t samplerate) |
0aba65da UH |
319 | { |
320 | struct dev_context *devc; | |
321 | ||
322 | devc = sdi->priv; | |
e46aa4f6 | 323 | if (devc->max_samplerate && samplerate > devc->max_samplerate) |
0aba65da UH |
324 | return SR_ERR_SAMPLERATE; |
325 | ||
326 | if (samplerate > CLOCK_RATE) { | |
6ebe0039 | 327 | sr_info("Enabling demux mode."); |
a80bed76 | 328 | devc->capture_flags |= CAPTURE_FLAG_DEMUX; |
329 | devc->capture_flags &= ~CAPTURE_FLAG_NOISE_FILTER; | |
0aba65da UH |
330 | devc->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1; |
331 | } else { | |
6ebe0039 | 332 | sr_info("Disabling demux mode."); |
a80bed76 | 333 | devc->capture_flags &= ~CAPTURE_FLAG_DEMUX; |
334 | devc->capture_flags |= CAPTURE_FLAG_NOISE_FILTER; | |
0aba65da UH |
335 | devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1; |
336 | } | |
337 | ||
338 | /* Calculate actual samplerate used and complain if it is different | |
339 | * from the requested. | |
340 | */ | |
341 | devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1); | |
a80bed76 | 342 | if (devc->capture_flags & CAPTURE_FLAG_DEMUX) |
0aba65da UH |
343 | devc->cur_samplerate *= 2; |
344 | if (devc->cur_samplerate != samplerate) | |
e46aa4f6 | 345 | sr_info("Can't match samplerate %" PRIu64 ", using %" |
0aba65da UH |
346 | PRIu64 ".", samplerate, devc->cur_samplerate); |
347 | ||
348 | return SR_OK; | |
349 | } | |
350 | ||
351 | SR_PRIV void abort_acquisition(const struct sr_dev_inst *sdi) | |
352 | { | |
459a0f26 | 353 | struct sr_serial_dev_inst *serial; |
0aba65da | 354 | |
459a0f26 | 355 | serial = sdi->conn; |
7dd1dd9f | 356 | ols_send_reset(serial); |
6d8182b6 | 357 | |
102f1239 | 358 | serial_source_remove(sdi->session, serial); |
0aba65da | 359 | |
bee2b016 | 360 | std_session_send_df_end(sdi); |
0aba65da UH |
361 | } |
362 | ||
363 | SR_PRIV int ols_receive_data(int fd, int revents, void *cb_data) | |
364 | { | |
459a0f26 | 365 | struct dev_context *devc; |
625763e2 | 366 | struct sr_dev_inst *sdi; |
459a0f26 | 367 | struct sr_serial_dev_inst *serial; |
0aba65da UH |
368 | struct sr_datafeed_packet packet; |
369 | struct sr_datafeed_logic logic; | |
fe9ac252 | 370 | uint32_t sample; |
f8fd8420 | 371 | int num_changroups, offset, j; |
b1de0407 | 372 | unsigned int i; |
0aba65da | 373 | unsigned char byte; |
625763e2 BV |
374 | |
375 | (void)fd; | |
376 | ||
377 | sdi = cb_data; | |
378 | serial = sdi->conn; | |
379 | devc = sdi->priv; | |
0aba65da | 380 | |
8105e829 DE |
381 | if (devc->num_transfers == 0 && revents == 0) { |
382 | /* Ignore timeouts as long as we haven't received anything */ | |
383 | return TRUE; | |
384 | } | |
385 | ||
0aba65da | 386 | if (devc->num_transfers++ == 0) { |
0aba65da UH |
387 | devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4); |
388 | if (!devc->raw_sample_buf) { | |
389 | sr_err("Sample buffer malloc failed."); | |
390 | return FALSE; | |
391 | } | |
392 | /* fill with 1010... for debugging */ | |
393 | memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4); | |
394 | } | |
395 | ||
f8fd8420 | 396 | num_changroups = 0; |
be15c51e | 397 | for (i = 0x20; i > 0x02; i >>= 1) { |
a80bed76 | 398 | if ((devc->capture_flags & i) == 0) { |
f8fd8420 | 399 | num_changroups++; |
f51acd69 | 400 | } |
0aba65da UH |
401 | } |
402 | ||
faf72024 | 403 | if (revents == G_IO_IN && devc->num_samples < devc->limit_samples) { |
9f5d4c3c | 404 | if (serial_read_nonblocking(serial, &byte, 1) != 1) |
0aba65da | 405 | return FALSE; |
625763e2 | 406 | devc->cnt_bytes++; |
0aba65da UH |
407 | |
408 | /* Ignore it if we've read enough. */ | |
409 | if (devc->num_samples >= devc->limit_samples) | |
410 | return TRUE; | |
411 | ||
412 | devc->sample[devc->num_bytes++] = byte; | |
6d16fdfb | 413 | sr_spew("Received byte 0x%.2x.", byte); |
f8fd8420 | 414 | if (devc->num_bytes == num_changroups) { |
625763e2 BV |
415 | devc->cnt_samples++; |
416 | devc->cnt_samples_rle++; | |
417 | /* | |
418 | * Got a full sample. Convert from the OLS's little-endian | |
419 | * sample to the local format. | |
420 | */ | |
fe9ac252 BV |
421 | sample = devc->sample[0] | (devc->sample[1] << 8) \ |
422 | | (devc->sample[2] << 16) | (devc->sample[3] << 24); | |
625763e2 | 423 | sr_dbg("Received sample 0x%.*x.", devc->num_bytes * 2, sample); |
a80bed76 | 424 | if (devc->capture_flags & CAPTURE_FLAG_RLE) { |
0aba65da | 425 | /* |
00d04d3b BV |
426 | * In RLE mode the high bit of the sample is the |
427 | * "count" flag, meaning this sample is the number | |
428 | * of times the previous sample occurred. | |
0aba65da UH |
429 | */ |
430 | if (devc->sample[devc->num_bytes - 1] & 0x80) { | |
00d04d3b BV |
431 | /* Clear the high bit. */ |
432 | sample &= ~(0x80 << (devc->num_bytes - 1) * 8); | |
fe9ac252 | 433 | devc->rle_count = sample; |
625763e2 | 434 | devc->cnt_samples_rle += devc->rle_count; |
00d04d3b | 435 | sr_dbg("RLE count: %u.", devc->rle_count); |
0aba65da UH |
436 | devc->num_bytes = 0; |
437 | return TRUE; | |
438 | } | |
439 | } | |
440 | devc->num_samples += devc->rle_count + 1; | |
441 | if (devc->num_samples > devc->limit_samples) { | |
442 | /* Save us from overrunning the buffer. */ | |
443 | devc->rle_count -= devc->num_samples - devc->limit_samples; | |
444 | devc->num_samples = devc->limit_samples; | |
445 | } | |
446 | ||
f8fd8420 | 447 | if (num_changroups < 4) { |
0aba65da UH |
448 | /* |
449 | * Some channel groups may have been turned | |
450 | * off, to speed up transfer between the | |
451 | * hardware and the PC. Expand that here before | |
452 | * submitting it over the session bus -- | |
453 | * whatever is listening on the bus will be | |
454 | * expecting a full 32-bit sample, based on | |
ba7dd8bb | 455 | * the number of channels. |
0aba65da UH |
456 | */ |
457 | j = 0; | |
458 | memset(devc->tmp_sample, 0, 4); | |
459 | for (i = 0; i < 4; i++) { | |
a80bed76 | 460 | if (((devc->capture_flags >> 2) & (1 << i)) == 0) { |
0aba65da UH |
461 | /* |
462 | * This channel group was | |
463 | * enabled, copy from received | |
464 | * sample. | |
465 | */ | |
466 | devc->tmp_sample[i] = devc->sample[j++]; | |
a80bed76 | 467 | } else if (devc->capture_flags & CAPTURE_FLAG_DEMUX && (i > 2)) { |
b1de0407 | 468 | /* group 2 & 3 get added to 0 & 1 */ |
f51acd69 | 469 | devc->tmp_sample[i - 2] = devc->sample[j++]; |
0aba65da UH |
470 | } |
471 | } | |
472 | memcpy(devc->sample, devc->tmp_sample, 4); | |
29f15d52 | 473 | sr_spew("Expanded sample: 0x%.2hhx%.2hhx%.2hhx%.2hhx ", |
474 | devc->sample[3], devc->sample[2], devc->sample[1], devc->sample[0]); | |
0aba65da UH |
475 | } |
476 | ||
625763e2 BV |
477 | /* |
478 | * the OLS sends its sample buffer backwards. | |
0aba65da UH |
479 | * store it in reverse order here, so we can dump |
480 | * this on the session bus later. | |
481 | */ | |
482 | offset = (devc->limit_samples - devc->num_samples) * 4; | |
483 | for (i = 0; i <= devc->rle_count; i++) { | |
484 | memcpy(devc->raw_sample_buf + offset + (i * 4), | |
485 | devc->sample, 4); | |
486 | } | |
487 | memset(devc->sample, 0, 4); | |
488 | devc->num_bytes = 0; | |
489 | devc->rle_count = 0; | |
490 | } | |
491 | } else { | |
492 | /* | |
493 | * This is the main loop telling us a timeout was reached, or | |
494 | * we've acquired all the samples we asked for -- we're done. | |
495 | * Send the (properly-ordered) buffer to the frontend. | |
496 | */ | |
625763e2 BV |
497 | sr_dbg("Received %d bytes, %d samples, %d decompressed samples.", |
498 | devc->cnt_bytes, devc->cnt_samples, | |
499 | devc->cnt_samples_rle); | |
a2b1a53b | 500 | if (devc->trigger_at_smpl != OLS_NO_TRIGGER) { |
625763e2 BV |
501 | /* |
502 | * A trigger was set up, so we need to tell the frontend | |
0aba65da UH |
503 | * about it. |
504 | */ | |
a2b1a53b | 505 | if (devc->trigger_at_smpl > 0) { |
625763e2 | 506 | /* There are pre-trigger samples, send those first. */ |
0aba65da UH |
507 | packet.type = SR_DF_LOGIC; |
508 | packet.payload = &logic; | |
a2b1a53b | 509 | logic.length = devc->trigger_at_smpl * 4; |
0aba65da UH |
510 | logic.unitsize = 4; |
511 | logic.data = devc->raw_sample_buf + | |
512 | (devc->limit_samples - devc->num_samples) * 4; | |
695dc859 | 513 | sr_session_send(sdi, &packet); |
0aba65da UH |
514 | } |
515 | ||
625763e2 | 516 | /* Send the trigger. */ |
0fa71943 | 517 | std_session_send_df_trigger(sdi); |
0aba65da | 518 | } |
2755ab36 | 519 | |
520 | /* Send post-trigger / all captured samples. */ | |
521 | int num_pre_trigger_samples = devc->trigger_at_smpl == OLS_NO_TRIGGER | |
522 | ? 0 : devc->trigger_at_smpl; | |
523 | packet.type = SR_DF_LOGIC; | |
524 | packet.payload = &logic; | |
525 | logic.length = (devc->num_samples - num_pre_trigger_samples) * 4; | |
526 | logic.unitsize = 4; | |
527 | logic.data = devc->raw_sample_buf + (num_pre_trigger_samples + | |
528 | devc->limit_samples - devc->num_samples) * 4; | |
529 | sr_session_send(sdi, &packet); | |
530 | ||
0aba65da UH |
531 | g_free(devc->raw_sample_buf); |
532 | ||
459a0f26 | 533 | serial_flush(serial); |
0aba65da | 534 | abort_acquisition(sdi); |
0aba65da UH |
535 | } |
536 | ||
537 | return TRUE; | |
538 | } | |
f8fd8420 | 539 | |
540 | static int ols_set_basic_trigger_stage(const struct ols_basic_trigger_desc *trigger_desc, struct sr_serial_dev_inst *serial, int stage) | |
541 | { | |
542 | uint8_t cmd, arg[4]; | |
543 | ||
544 | cmd = CMD_SET_BASIC_TRIGGER_MASK0 + stage * 4; | |
3cc9e215 | 545 | if (ols_send_longdata(serial, cmd, trigger_desc->trigger_mask[stage]) != SR_OK) |
f8fd8420 | 546 | return SR_ERR; |
547 | ||
548 | cmd = CMD_SET_BASIC_TRIGGER_VALUE0 + stage * 4; | |
3cc9e215 | 549 | if (ols_send_longdata(serial, cmd, trigger_desc->trigger_value[stage]) != SR_OK) |
f8fd8420 | 550 | return SR_ERR; |
551 | ||
552 | cmd = CMD_SET_BASIC_TRIGGER_CONFIG0 + stage * 4; | |
553 | arg[0] = arg[1] = arg[3] = 0x00; | |
554 | arg[2] = stage; | |
555 | if (stage == trigger_desc->num_stages) | |
556 | /* Last stage, fire when this one matches. */ | |
557 | arg[3] |= TRIGGER_START; | |
558 | if (send_longcommand(serial, cmd, arg) != SR_OK) | |
559 | return SR_ERR; | |
560 | ||
561 | return SR_OK; | |
562 | } | |
563 | ||
564 | SR_PRIV int ols_prepare_acquisition(const struct sr_dev_inst *sdi) { | |
565 | int ret; | |
f8fd8420 | 566 | |
567 | struct dev_context *devc = sdi->priv; | |
568 | struct sr_serial_dev_inst *serial = sdi->conn; | |
569 | ||
570 | int num_changroups = 0; | |
571 | uint8_t changroup_mask = 0; | |
572 | uint32_t channel_mask = ols_channel_mask(sdi); | |
573 | for (unsigned int i = 0; i < 4; i++) { | |
574 | if (channel_mask & (0xff << (i * 8))) { | |
575 | changroup_mask |= (1 << i); | |
576 | num_changroups++; | |
577 | } | |
578 | } | |
579 | ||
580 | /* | |
581 | * Limit readcount to prevent reading past the end of the hardware | |
582 | * buffer. Rather read too many samples than too few. | |
583 | */ | |
584 | uint32_t samplecount = MIN(devc->max_samples / num_changroups, devc->limit_samples); | |
585 | uint32_t readcount = (samplecount + 3) / 4; | |
586 | uint32_t delaycount; | |
587 | ||
588 | /* Basic triggers. */ | |
589 | struct ols_basic_trigger_desc basic_trigger_desc; | |
590 | if (convert_trigger(sdi, &basic_trigger_desc) != SR_OK) { | |
591 | sr_err("Failed to configure channels."); | |
592 | return SR_ERR; | |
593 | } | |
594 | if (basic_trigger_desc.num_stages > 0) { | |
595 | /* | |
596 | * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf | |
597 | * reset command must be send prior each arm command | |
598 | */ | |
599 | sr_dbg("Send reset command before trigger configure"); | |
600 | if (ols_send_reset(serial) != SR_OK) | |
601 | return SR_ERR; | |
602 | ||
603 | delaycount = readcount * (1 - devc->capture_ratio / 100.0); | |
604 | devc->trigger_at_smpl = (readcount - delaycount) * 4 - basic_trigger_desc.num_stages; | |
605 | for (int i = 0; i <= basic_trigger_desc.num_stages; i++) { | |
606 | sr_dbg("Setting OLS stage %d trigger.", i); | |
607 | if ((ret = ols_set_basic_trigger_stage(&basic_trigger_desc, serial, i)) != SR_OK) | |
608 | return ret; | |
609 | } | |
610 | } else { | |
611 | /* No triggers configured, force trigger on first stage. */ | |
612 | sr_dbg("Forcing trigger at stage 0."); | |
613 | if ((ret = ols_set_basic_trigger_stage(&basic_trigger_desc, serial, 0)) != SR_OK) | |
614 | return ret; | |
615 | delaycount = readcount; | |
616 | } | |
617 | ||
618 | /* Samplerate. */ | |
619 | sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)", | |
620 | devc->cur_samplerate, devc->cur_samplerate_divider); | |
3cc9e215 | 621 | if (ols_send_longdata(serial, CMD_SET_DIVIDER, devc->cur_samplerate_divider & 0x00FFFFFF) != SR_OK) |
f8fd8420 | 622 | return SR_ERR; |
623 | ||
624 | /* Send sample limit and pre/post-trigger capture ratio. */ | |
625 | sr_dbg("Setting sample limit %d, trigger point at %d", | |
626 | (readcount - 1) * 4, (delaycount - 1) * 4); | |
627 | ||
628 | if (devc->max_samples > 256 * 1024) { | |
3cc9e215 | 629 | if (ols_send_longdata(serial, CMD_CAPTURE_READCOUNT, readcount-1) != SR_OK) |
f8fd8420 | 630 | return SR_ERR; |
3cc9e215 | 631 | if (ols_send_longdata(serial, CMD_CAPTURE_DELAYCOUNT, delaycount-1) != SR_OK) |
f8fd8420 | 632 | return SR_ERR; |
633 | } else { | |
3cc9e215 | 634 | uint8_t arg[4]; |
635 | WL16(&arg[0], readcount-1); | |
636 | WL16(&arg[2], delaycount-1); | |
f8fd8420 | 637 | if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK) |
638 | return SR_ERR; | |
639 | } | |
640 | ||
641 | /* Flag register. */ | |
642 | sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s, %s clock%s", | |
643 | devc->capture_flags & CAPTURE_FLAG_INTERNAL_TEST_MODE ? "on": "off", | |
644 | devc->capture_flags & CAPTURE_FLAG_EXTERNAL_TEST_MODE ? "on": "off", | |
645 | devc->capture_flags & CAPTURE_FLAG_RLE ? "on" : "off", | |
646 | devc->capture_flags & CAPTURE_FLAG_NOISE_FILTER ? "on": "off", | |
647 | devc->capture_flags & CAPTURE_FLAG_DEMUX ? "on" : "off", | |
648 | devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ? "external" : "internal", | |
649 | devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ? (devc->capture_flags & CAPTURE_FLAG_INVERT_EXT_CLOCK | |
650 | ? " on falling edge" : "on rising edge") : ""); | |
651 | ||
652 | /* | |
653 | * Enable/disable OLS channel groups in the flag register according | |
654 | * to the channel mask. 1 means "disable channel". | |
655 | */ | |
656 | devc->capture_flags &= ~0x3c; | |
657 | devc->capture_flags |= ~(changroup_mask << 2) & 0x3c; | |
658 | ||
659 | /* RLE mode is always zero, for now. */ | |
660 | ||
3cc9e215 | 661 | if (ols_send_longdata(serial, CMD_SET_FLAGS, devc->capture_flags) != SR_OK) |
f8fd8420 | 662 | return SR_ERR; |
663 | ||
664 | return SR_OK; | |
665 | } |