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6c6bc80a C |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
f2a66a8e | 4 | * Copyright (C) 2015 Christer Ekholm <christerekholm@gmail.com> |
6c6bc80a C |
5 | * |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #ifndef LIBSIGROK_HARDWARE_HANTEK_6XXX_PROTOCOL_H | |
21 | #define LIBSIGROK_HARDWARE_HANTEK_6XXX_PROTOCOL_H | |
22 | ||
23 | #include <stdint.h> | |
f2a66a8e | 24 | #include <string.h> |
6c6bc80a C |
25 | #include <glib.h> |
26 | #include <libsigrok/libsigrok.h> | |
27 | #include "libsigrok-internal.h" | |
28 | ||
29 | #define LOG_PREFIX "hantek-6xxx" | |
30 | ||
f2a66a8e C |
31 | #define MAX_RENUM_DELAY_MS 3000 |
32 | ||
33 | #define DEFAULT_VOLTAGE 2 | |
d9251a2c | 34 | #define DEFAULT_COUPLING COUPLING_DC |
f2a66a8e C |
35 | #define DEFAULT_SAMPLERATE SR_MHZ(8) |
36 | ||
37 | #define NUM_CHANNELS 2 | |
38 | ||
39 | #define SAMPLERATE_VALUES \ | |
40 | SR_MHZ(48), SR_MHZ(30), SR_MHZ(24), \ | |
41 | SR_MHZ(16), SR_MHZ(8), SR_MHZ(4), \ | |
42 | SR_MHZ(1), SR_KHZ(500), SR_KHZ(200), \ | |
43 | SR_KHZ(100), | |
44 | ||
45 | #define SAMPLERATE_REGS \ | |
d9251a2c | 46 | 48, 30, 24, 16, 8, 4, 1, 50, 20, 10, |
f2a66a8e C |
47 | |
48 | #define VDIV_VALUES \ | |
389acdd9 | 49 | { 1, 1 }, \ |
f2a66a8e | 50 | { 500, 1000 }, \ |
389acdd9 | 51 | { 250, 1000 }, \ |
52 | { 100, 1000 }, | |
53 | ||
54 | #define VDIV_VALUES_INSTRUSTAR \ | |
55 | { 128, 100 }, \ | |
56 | { 705, 1000 }, \ | |
57 | { 288, 1000 }, \ | |
58 | { 140, 1000 }, \ | |
59 | { 576, 10000 }, \ | |
60 | { 176, 10000 }, | |
f2a66a8e C |
61 | |
62 | #define VDIV_REG \ | |
389acdd9 | 63 | 1, 2, 5, 10, 11, 12, 13, |
f2a66a8e C |
64 | |
65 | #define VDIV_MULTIPLIER 10 | |
66 | ||
67 | /* Weird flushing needed for filtering glitch away. */ | |
050eb3b3 | 68 | #define FLUSH_PACKET_SIZE 1024 |
f2a66a8e | 69 | |
050eb3b3 | 70 | #define MIN_PACKET_SIZE 512 |
095eba19 TR |
71 | #ifdef _WIN32 |
72 | #define MAX_PACKET_SIZE (2 * 1024 * 1024) | |
73 | #else | |
f2a66a8e | 74 | #define MAX_PACKET_SIZE (12 * 1024 * 1024) |
095eba19 | 75 | #endif |
f2a66a8e C |
76 | |
77 | #define HANTEK_EP_IN 0x86 | |
78 | #define USB_INTERFACE 0 | |
79 | #define USB_CONFIGURATION 1 | |
80 | ||
81 | enum control_requests { | |
82 | VDIV_CH1_REG = 0xe0, | |
83 | VDIV_CH2_REG = 0xe1, | |
84 | SAMPLERATE_REG = 0xe2, | |
85 | TRIGGER_REG = 0xe3, | |
86 | CHANNELS_REG = 0xe4, | |
cc5ebc8a | 87 | COUPLING_REG = 0xe5, |
f2a66a8e C |
88 | }; |
89 | ||
90 | enum states { | |
91 | IDLE, | |
92 | FLUSH, | |
93 | CAPTURE, | |
94 | STOPPING, | |
95 | }; | |
96 | ||
cc5ebc8a BL |
97 | enum couplings { |
98 | COUPLING_AC = 0, | |
99 | COUPLING_DC, | |
100 | }; | |
101 | ||
f2a66a8e C |
102 | struct hantek_6xxx_profile { |
103 | /* VID/PID after cold boot */ | |
104 | uint16_t orig_vid; | |
105 | uint16_t orig_pid; | |
106 | /* VID/PID after firmware upload */ | |
107 | uint16_t fw_vid; | |
108 | uint16_t fw_pid; | |
459324ac | 109 | uint16_t fw_prod_ver; |
f2a66a8e C |
110 | const char *vendor; |
111 | const char *model; | |
112 | const char *firmware; | |
5eb4ba29 BL |
113 | const char **coupling_vals; |
114 | uint8_t coupling_tab_size; | |
817b7441 | 115 | gboolean has_coupling; |
389acdd9 | 116 | const uint64_t (*vdivs)[2]; |
117 | const uint32_t vdivs_size; | |
f2a66a8e C |
118 | }; |
119 | ||
6c6bc80a | 120 | struct dev_context { |
f2a66a8e | 121 | const struct hantek_6xxx_profile *profile; |
f2a66a8e C |
122 | GSList *enabled_channels; |
123 | /* | |
124 | * We can't keep track of an FX2-based device after upgrading | |
125 | * the firmware (it re-enumerates into a different device address | |
126 | * after the upgrade) this is like a global lock. No device will open | |
127 | * until a proper delay after the last device was upgraded. | |
128 | */ | |
129 | int64_t fw_updated; | |
130 | int dev_state; | |
131 | uint64_t samp_received; | |
132 | uint64_t aq_started; | |
6c6bc80a | 133 | |
f2a66a8e | 134 | uint64_t read_start_ts; |
6c6bc80a | 135 | |
f2a66a8e C |
136 | gboolean ch_enabled[NUM_CHANNELS]; |
137 | int voltage[NUM_CHANNELS]; | |
cc5ebc8a | 138 | int coupling[NUM_CHANNELS]; |
5eb4ba29 BL |
139 | const char **coupling_vals; |
140 | uint8_t coupling_tab_size; | |
817b7441 | 141 | gboolean has_coupling; |
f2a66a8e | 142 | uint64_t samplerate; |
389acdd9 | 143 | const uint64_t (*vdivs)[2]; |
144 | uint8_t vdivs_size; | |
6c6bc80a | 145 | |
f2a66a8e C |
146 | uint64_t limit_msec; |
147 | uint64_t limit_samples; | |
6c6bc80a C |
148 | }; |
149 | ||
f2a66a8e C |
150 | SR_PRIV int hantek_6xxx_open(struct sr_dev_inst *sdi); |
151 | SR_PRIV void hantek_6xxx_close(struct sr_dev_inst *sdi); | |
152 | SR_PRIV int hantek_6xxx_get_channeldata(const struct sr_dev_inst *sdi, | |
153 | libusb_transfer_cb_fn cb, uint32_t data_amount); | |
154 | ||
155 | SR_PRIV int hantek_6xxx_start_data_collecting(const struct sr_dev_inst *sdi); | |
156 | SR_PRIV int hantek_6xxx_stop_data_collecting(const struct sr_dev_inst *sdi); | |
157 | ||
cc5ebc8a | 158 | SR_PRIV int hantek_6xxx_update_coupling(const struct sr_dev_inst *sdi); |
f2a66a8e C |
159 | SR_PRIV int hantek_6xxx_update_samplerate(const struct sr_dev_inst *sdi); |
160 | SR_PRIV int hantek_6xxx_update_vdiv(const struct sr_dev_inst *sdi); | |
161 | SR_PRIV int hantek_6xxx_update_channels(const struct sr_dev_inst *sdi); | |
162 | SR_PRIV int hantek_6xxx_init(const struct sr_dev_inst *sdi); | |
6c6bc80a C |
163 | |
164 | #endif |