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6a25fa42 AZ |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
5089a143 AZ |
4 | * Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net> |
5 | * Copyright (C) 2017 Andrej Valek <andy@skyrain.eu> | |
6 | * Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de> | |
6a25fa42 AZ |
7 | * |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #include <config.h> | |
23 | #include "protocol.h" | |
24 | ||
5089a143 AZ |
25 | #define USB_INTERFACE 0 |
26 | #define NUM_CHANNELS 32 | |
6a25fa42 | 27 | |
5089a143 AZ |
28 | static const uint32_t scanopts[] = { |
29 | SR_CONF_CONN, | |
30 | }; | |
31 | ||
32 | static const uint32_t drvopts[] = { | |
33 | SR_CONF_LOGIC_ANALYZER, | |
34 | }; | |
35 | ||
36 | static const uint32_t devopts[] = { | |
37 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
38 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
39 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, | |
40 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, | |
41 | SR_CONF_CONN | SR_CONF_GET, | |
42 | SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_SET | SR_CONF_LIST, | |
43 | }; | |
44 | ||
45 | static const int32_t trigger_matches[] = { | |
46 | SR_TRIGGER_ZERO, | |
47 | SR_TRIGGER_ONE, | |
48 | SR_TRIGGER_RISING, | |
49 | SR_TRIGGER_FALLING, | |
50 | SR_TRIGGER_EDGE, | |
51 | }; | |
52 | ||
53 | static const uint64_t samplerates[] = { | |
54 | SR_KHZ(1), | |
55 | SR_KHZ(2), | |
56 | SR_KHZ(4), | |
57 | SR_KHZ(8), | |
58 | SR_KHZ(16), | |
59 | SR_HZ(31250), | |
60 | SR_HZ(62500), | |
61 | SR_KHZ(125), | |
62 | SR_KHZ(250), | |
63 | SR_KHZ(500), | |
64 | SR_KHZ(625), | |
65 | SR_HZ(781250), | |
66 | SR_MHZ(1), | |
67 | SR_KHZ(1250), | |
68 | SR_HZ(1562500), | |
69 | SR_MHZ(2), | |
70 | SR_KHZ(2500), | |
71 | SR_KHZ(3125), | |
72 | SR_MHZ(4), | |
73 | SR_MHZ(5), | |
74 | SR_KHZ(6250), | |
75 | SR_MHZ(10), | |
76 | SR_KHZ(12500), | |
77 | SR_MHZ(20), | |
78 | SR_MHZ(25), | |
79 | SR_MHZ(40), | |
80 | SR_MHZ(50), | |
81 | SR_MHZ(80), | |
82 | SR_MHZ(100), | |
83 | SR_MHZ(160), | |
84 | SR_MHZ(200), | |
85 | SR_MHZ(320), | |
86 | SR_MHZ(400), | |
87 | }; | |
88 | ||
89 | static const uint64_t samplerates_hw[] = { | |
90 | SR_MHZ(100), | |
91 | SR_MHZ(50), | |
92 | SR_MHZ(25), | |
93 | SR_KHZ(12500), | |
94 | SR_KHZ(6250), | |
95 | SR_KHZ(3125), | |
96 | SR_HZ(1562500), | |
97 | SR_HZ(781250), | |
98 | SR_MHZ(80), | |
99 | SR_MHZ(40), | |
100 | SR_MHZ(20), | |
101 | SR_MHZ(10), | |
102 | SR_MHZ(5), | |
103 | SR_KHZ(2500), | |
104 | SR_KHZ(1250), | |
105 | SR_KHZ(625), | |
106 | SR_MHZ(4), | |
107 | SR_MHZ(2), | |
108 | SR_MHZ(1), | |
109 | SR_KHZ(500), | |
110 | SR_KHZ(250), | |
111 | SR_KHZ(125), | |
112 | SR_HZ(62500), | |
113 | SR_HZ(31250), | |
114 | SR_KHZ(16), | |
115 | SR_KHZ(8), | |
116 | SR_KHZ(4), | |
117 | SR_KHZ(2), | |
118 | SR_KHZ(1), | |
119 | 0, | |
120 | 0, | |
121 | 0, | |
122 | SR_MHZ(200), | |
123 | SR_MHZ(160), | |
124 | SR_MHZ(400), | |
125 | SR_MHZ(320), | |
126 | }; | |
127 | ||
128 | SR_PRIV struct sr_dev_driver hantek_4032l_driver_info; | |
6a25fa42 AZ |
129 | |
130 | static GSList *scan(struct sr_dev_driver *di, GSList *options) | |
131 | { | |
5089a143 AZ |
132 | struct drv_context *drvc = di->context; |
133 | GSList *l, *devices, *conn_devices; | |
134 | libusb_device **devlist; | |
135 | struct libusb_device_descriptor des; | |
136 | const char *conn; | |
137 | int i; | |
138 | char connection_id[64]; | |
139 | struct sr_channel_group *cg; | |
140 | struct sr_dev_inst *sdi; | |
141 | struct sr_channel *ch; | |
6a25fa42 AZ |
142 | |
143 | devices = NULL; | |
5089a143 | 144 | conn_devices = NULL; |
6a25fa42 | 145 | drvc->instances = NULL; |
5089a143 AZ |
146 | conn = NULL; |
147 | ||
148 | for (l = options; l; l = l->next) { | |
149 | struct sr_config *src = l->data; | |
150 | if (src->key == SR_CONF_CONN) { | |
151 | conn = g_variant_get_string(src->data, NULL); | |
152 | break; | |
153 | } | |
154 | } | |
6a25fa42 | 155 | |
5089a143 AZ |
156 | if (conn) |
157 | conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn); | |
158 | else | |
159 | conn_devices = NULL; | |
160 | ||
161 | libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist); | |
162 | for (i = 0; devlist[i]; i++) { | |
163 | if (conn) { | |
164 | struct sr_usb_dev_inst *usb = NULL; | |
165 | for (l = conn_devices; l; l = l->next) { | |
166 | usb = l->data; | |
28f2d07f AV |
167 | if (usb->bus == libusb_get_bus_number(devlist[i]) && |
168 | usb->address == libusb_get_device_address(devlist[i])) | |
5089a143 AZ |
169 | break; |
170 | } | |
171 | if (!l) | |
172 | /* This device matched none of the ones that | |
173 | * matched the conn specification. */ | |
174 | continue; | |
175 | } | |
176 | ||
177 | libusb_get_device_descriptor(devlist[i], &des); | |
178 | ||
179 | if (des.idVendor != H4032L_USB_VENDOR || | |
180 | des.idProduct != H4032L_USB_PRODUCT) | |
181 | continue; | |
182 | ||
6c1a76d1 RT |
183 | if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0) |
184 | continue; | |
5089a143 AZ |
185 | |
186 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); | |
187 | sdi->driver = &hantek_4032l_driver_info; | |
188 | sdi->vendor = g_strdup("Hantek"); | |
189 | sdi->model = g_strdup("4032L"); | |
190 | sdi->connection_id = g_strdup(connection_id); | |
191 | ||
192 | struct sr_channel_group *channel_groups[2]; | |
193 | for (int j = 0; j < 2; j++) { | |
194 | cg = g_malloc0(sizeof(struct sr_channel_group)); | |
195 | cg->name = g_strdup_printf("%c", 'A' + j); | |
196 | channel_groups[j] = cg; | |
197 | sdi->channel_groups = g_slist_append(sdi->channel_groups, cg); | |
198 | } | |
199 | ||
200 | /* Assemble channel list and add channel to channel groups. */ | |
201 | for (int j = 0; j < NUM_CHANNELS; j++) { | |
202 | char channel_name[4]; | |
203 | sprintf(channel_name, "%c%d", 'A' + (j & 1), j / 2); | |
204 | ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC, TRUE, channel_name); | |
205 | cg = channel_groups[j & 1]; | |
206 | cg->channels = g_slist_append(cg->channels, ch); | |
207 | } | |
208 | ||
209 | struct dev_context *devc = g_malloc0(sizeof(struct dev_context)); | |
210 | ||
211 | /* Initialize command packet. */ | |
212 | devc->cmd_pkt.magic = H4032L_CMD_PKT_MAGIC; | |
213 | devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(2.5); | |
214 | devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(2.5); | |
215 | devc->cmd_pkt.sample_size = 16384; | |
216 | devc->cmd_pkt.pre_trigger_size = 1024; | |
217 | ||
218 | devc->status = H4032L_STATUS_IDLE; | |
219 | ||
220 | devc->capture_ratio = 5; | |
221 | ||
222 | devc->usb_transfer = libusb_alloc_transfer(0); | |
223 | ||
224 | sdi->priv = devc; | |
225 | devices = g_slist_append(devices, sdi); | |
226 | ||
227 | sdi->status = SR_ST_INACTIVE; | |
228 | sdi->inst_type = SR_INST_USB; | |
229 | sdi->conn = sr_usb_dev_inst_new( | |
230 | libusb_get_bus_number(devlist[i]), | |
231 | libusb_get_device_address(devlist[i]), NULL); | |
232 | } | |
6a25fa42 | 233 | |
5089a143 AZ |
234 | g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free); |
235 | libusb_free_device_list(devlist, 1); | |
6a25fa42 | 236 | |
5089a143 | 237 | return std_scan_complete(di, devices); |
6a25fa42 AZ |
238 | } |
239 | ||
240 | static int dev_open(struct sr_dev_inst *sdi) | |
241 | { | |
5089a143 AZ |
242 | struct sr_usb_dev_inst *usb = sdi->conn; |
243 | int ret; | |
6a25fa42 | 244 | |
5089a143 AZ |
245 | ret = h4032l_dev_open(sdi); |
246 | if (ret != SR_OK) { | |
247 | sr_err("Unable to open device."); | |
248 | return SR_ERR; | |
249 | } | |
6a25fa42 | 250 | |
5089a143 AZ |
251 | ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE); |
252 | if (ret != 0) { | |
253 | switch (ret) { | |
254 | case LIBUSB_ERROR_BUSY: | |
255 | sr_err("Unable to claim USB interface. Another " | |
256 | "program or driver has already claimed it."); | |
257 | break; | |
258 | case LIBUSB_ERROR_NO_DEVICE: | |
259 | sr_err("Device has been disconnected."); | |
260 | break; | |
261 | default: | |
262 | sr_err("Unable to claim interface: %s.", | |
263 | libusb_error_name(ret)); | |
264 | break; | |
265 | } | |
266 | ||
267 | return SR_ERR; | |
268 | } | |
6a25fa42 | 269 | |
7a7afc00 AV |
270 | /* Get FPGA version. */ |
271 | if ((ret = h4032l_get_fpga_version(sdi)) != SR_OK) | |
272 | return ret; | |
273 | ||
6a25fa42 AZ |
274 | return SR_OK; |
275 | } | |
276 | ||
277 | static int dev_close(struct sr_dev_inst *sdi) | |
278 | { | |
5089a143 | 279 | struct sr_usb_dev_inst *usb; |
6a25fa42 | 280 | |
5089a143 | 281 | usb = sdi->conn; |
6a25fa42 | 282 | |
5089a143 AZ |
283 | if (!usb->devhdl) |
284 | return SR_ERR_BUG; | |
6a25fa42 | 285 | |
5089a143 AZ |
286 | sr_info("Closing device on %d.%d (logical) / %s (physical) interface %d.", |
287 | usb->bus, usb->address, sdi->connection_id, USB_INTERFACE); | |
288 | libusb_release_interface(usb->devhdl, USB_INTERFACE); | |
289 | libusb_close(usb->devhdl); | |
290 | usb->devhdl = NULL; | |
6a25fa42 AZ |
291 | |
292 | return SR_OK; | |
293 | } | |
294 | ||
295 | static int config_get(uint32_t key, GVariant **data, | |
296 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
297 | { | |
5089a143 AZ |
298 | struct dev_context *devc = sdi->priv; |
299 | struct sr_usb_dev_inst *usb; | |
6a25fa42 | 300 | |
6a25fa42 AZ |
301 | (void)cg; |
302 | ||
6a25fa42 | 303 | switch (key) { |
5089a143 AZ |
304 | case SR_CONF_SAMPLERATE: |
305 | *data = g_variant_new_uint64(samplerates_hw[devc->cmd_pkt.sample_rate]); | |
306 | break; | |
307 | case SR_CONF_CAPTURE_RATIO: | |
308 | *data = g_variant_new_uint64(devc->capture_ratio); | |
309 | break; | |
310 | case SR_CONF_LIMIT_SAMPLES: | |
311 | *data = g_variant_new_uint64(devc->cmd_pkt.sample_size); | |
312 | break; | |
313 | case SR_CONF_CONN: | |
314 | if (!sdi || !(usb = sdi->conn)) | |
315 | return SR_ERR_ARG; | |
316 | *data = g_variant_new_printf("%d.%d", usb->bus, usb->address); | |
317 | break; | |
6a25fa42 AZ |
318 | default: |
319 | return SR_ERR_NA; | |
320 | } | |
321 | ||
5089a143 | 322 | return SR_OK; |
6a25fa42 AZ |
323 | } |
324 | ||
325 | static int config_set(uint32_t key, GVariant *data, | |
326 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
327 | { | |
5089a143 AZ |
328 | struct dev_context *devc = sdi->priv; |
329 | struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt; | |
6a25fa42 | 330 | |
6a25fa42 AZ |
331 | (void)cg; |
332 | ||
6a25fa42 | 333 | switch (key) { |
5089a143 AZ |
334 | case SR_CONF_SAMPLERATE: { |
335 | uint64_t sample_rate = g_variant_get_uint64(data); | |
336 | uint8_t i = 0; | |
337 | while (i < ARRAY_SIZE(samplerates_hw) && samplerates_hw[i] != sample_rate) | |
338 | i++; | |
339 | ||
340 | if (i == ARRAY_SIZE(samplerates_hw) || sample_rate == 0) { | |
4868f15a | 341 | sr_err("Invalid sample rate."); |
5089a143 AZ |
342 | return SR_ERR_SAMPLERATE; |
343 | } | |
344 | cmd_pkt->sample_rate = i; | |
28f2d07f | 345 | break; |
5089a143 AZ |
346 | } |
347 | case SR_CONF_CAPTURE_RATIO: | |
348 | devc->capture_ratio = g_variant_get_uint64(data); | |
28f2d07f | 349 | break; |
5089a143 AZ |
350 | case SR_CONF_LIMIT_SAMPLES: { |
351 | uint64_t number_samples = g_variant_get_uint64(data); | |
352 | number_samples += 511; | |
353 | number_samples &= 0xfffffe00; | |
28f2d07f AV |
354 | if (number_samples < 2048 || |
355 | number_samples > 64 * 1024 * 1024) { | |
4868f15a UH |
356 | sr_err("Invalid sample range 2k...64M: %" |
357 | PRIu64 ".", number_samples); | |
5089a143 AZ |
358 | return SR_ERR; |
359 | } | |
360 | cmd_pkt->sample_size = number_samples; | |
28f2d07f | 361 | break; |
5089a143 AZ |
362 | } |
363 | case SR_CONF_VOLTAGE_THRESHOLD: { | |
364 | double d1, d2; | |
365 | g_variant_get(data, "(dd)", &d1, &d2); | |
366 | devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(d1); | |
367 | devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(d2); | |
28f2d07f | 368 | break; |
5089a143 | 369 | } |
28f2d07f AV |
370 | default: |
371 | return SR_ERR_NA; | |
6a25fa42 AZ |
372 | } |
373 | ||
28f2d07f | 374 | return SR_OK; |
6a25fa42 AZ |
375 | } |
376 | ||
377 | static int config_list(uint32_t key, GVariant **data, | |
378 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
379 | { | |
6a25fa42 | 380 | switch (key) { |
5089a143 AZ |
381 | case SR_CONF_SCAN_OPTIONS: |
382 | case SR_CONF_DEVICE_OPTIONS: | |
383 | return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts); | |
384 | case SR_CONF_SAMPLERATE: | |
385 | *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates)); | |
386 | break; | |
387 | case SR_CONF_TRIGGER_MATCH: | |
388 | *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches)); | |
389 | break; | |
390 | case SR_CONF_VOLTAGE_THRESHOLD: | |
391 | *data = std_gvar_tuple_double(2.5, 2.5); | |
392 | break; | |
6a25fa42 AZ |
393 | default: |
394 | return SR_ERR_NA; | |
395 | } | |
396 | ||
5089a143 | 397 | return SR_OK; |
6a25fa42 AZ |
398 | } |
399 | ||
5089a143 | 400 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
6a25fa42 | 401 | { |
5089a143 AZ |
402 | struct sr_dev_driver *di = sdi->driver; |
403 | struct drv_context *drvc = di->context; | |
404 | struct dev_context *devc = sdi->priv; | |
405 | struct sr_trigger *trigger = sr_session_trigger_get(sdi->session); | |
406 | struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt; | |
407 | ||
28f2d07f | 408 | /* Initialize variables. */ |
a5b9880e AV |
409 | devc->acq_aborted = FALSE; |
410 | ||
5089a143 AZ |
411 | /* Calculate packet ratio. */ |
412 | cmd_pkt->pre_trigger_size = (cmd_pkt->sample_size * devc->capture_ratio) / 100; | |
413 | ||
414 | cmd_pkt->trig_flags.enable_trigger1 = 0; | |
415 | cmd_pkt->trig_flags.enable_trigger2 = 0; | |
416 | cmd_pkt->trig_flags.trigger_and_logic = 0; | |
417 | ||
418 | if (trigger && trigger->stages) { | |
419 | GSList *stages = trigger->stages; | |
420 | struct sr_trigger_stage *stage1 = stages->data; | |
421 | if (stages->next) { | |
4868f15a | 422 | sr_err("Only one trigger stage supported for now."); |
5089a143 AZ |
423 | return SR_ERR; |
424 | } | |
425 | cmd_pkt->trig_flags.enable_trigger1 = 1; | |
426 | cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_DISABLED; | |
427 | cmd_pkt->trigger[0].flags.data_range_enabled = 0; | |
428 | cmd_pkt->trigger[0].flags.time_range_enabled = 0; | |
429 | cmd_pkt->trigger[0].flags.combined_enabled = 0; | |
430 | cmd_pkt->trigger[0].flags.data_range_type = H4032L_TRIGGER_DATA_RANGE_TYPE_MAX; | |
431 | cmd_pkt->trigger[0].data_range_mask = 0; | |
432 | cmd_pkt->trigger[0].data_range_max = 0; | |
433 | ||
434 | /* Initialize range mask values. */ | |
435 | uint32_t range_mask = 0; | |
436 | uint32_t range_value = 0; | |
437 | ||
438 | GSList *channel = stage1->matches; | |
439 | while (channel) { | |
440 | struct sr_trigger_match *match = channel->data; | |
441 | ||
442 | switch (match->match) { | |
443 | case SR_TRIGGER_ZERO: | |
444 | range_mask |= (1 << match->channel->index); | |
445 | break; | |
446 | case SR_TRIGGER_ONE: | |
447 | range_mask |= (1 << match->channel->index); | |
448 | range_value |= (1 << match->channel->index); | |
449 | break; | |
450 | case SR_TRIGGER_RISING: | |
451 | if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) { | |
4868f15a | 452 | sr_err("Only one trigger signal with fall/rising/edge allowed."); |
5089a143 AZ |
453 | return SR_ERR; |
454 | } | |
455 | cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_RISE; | |
456 | cmd_pkt->trigger[0].flags.edge_signal = match->channel->index; | |
457 | break; | |
458 | case SR_TRIGGER_FALLING: | |
459 | if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) { | |
4868f15a | 460 | sr_err("Only one trigger signal with fall/rising/edge allowed."); |
5089a143 AZ |
461 | return SR_ERR; |
462 | } | |
463 | cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_FALL; | |
464 | cmd_pkt->trigger[0].flags.edge_signal = match->channel->index; | |
465 | break; | |
466 | case SR_TRIGGER_EDGE: | |
467 | if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) { | |
4868f15a | 468 | sr_err("Only one trigger signal with fall/rising/edge allowed."); |
5089a143 AZ |
469 | return SR_ERR; |
470 | } | |
471 | cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_TOGGLE; | |
472 | cmd_pkt->trigger[0].flags.edge_signal = match->channel->index; | |
473 | break; | |
474 | default: | |
4868f15a | 475 | sr_err("Unknown trigger value."); |
5089a143 AZ |
476 | return SR_ERR; |
477 | } | |
478 | ||
479 | channel = channel->next; | |
480 | } | |
481 | ||
482 | /* Compress range mask value and apply range settings. */ | |
483 | if (range_mask) { | |
484 | cmd_pkt->trigger[0].flags.data_range_enabled = 1; | |
485 | cmd_pkt->trigger[0].data_range_mask |= (range_mask); | |
486 | ||
487 | uint32_t new_range_value = 0; | |
488 | uint32_t bit_mask = 1; | |
489 | while (range_mask) { | |
490 | if ((range_mask & 1) != 0) { | |
491 | new_range_value <<= 1; | |
492 | if ((range_value & 1) != 0) | |
493 | new_range_value |= bit_mask; | |
494 | bit_mask <<= 1; | |
495 | } | |
496 | range_mask >>= 1; | |
497 | range_value >>= 1; | |
498 | } | |
499 | cmd_pkt->trigger[0].data_range_max |= range_value; | |
500 | } | |
501 | } | |
6a25fa42 | 502 | |
74c4c174 | 503 | usb_source_add(sdi->session, drvc->sr_ctx, 1000, |
5089a143 | 504 | h4032l_receive_data, sdi->driver->context); |
6a25fa42 | 505 | |
5089a143 AZ |
506 | /* Start capturing. */ |
507 | return h4032l_start(sdi); | |
6a25fa42 AZ |
508 | } |
509 | ||
5089a143 | 510 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
6a25fa42 | 511 | { |
a5b9880e AV |
512 | struct dev_context *devc = sdi->priv; |
513 | ||
514 | devc->acq_aborted = TRUE; | |
515 | if (devc->usb_transfer) | |
516 | libusb_cancel_transfer(devc->usb_transfer); | |
6a25fa42 | 517 | |
a5b9880e | 518 | devc->status = H4032L_STATUS_IDLE; |
6a25fa42 AZ |
519 | |
520 | return SR_OK; | |
521 | } | |
522 | ||
523 | SR_PRIV struct sr_dev_driver hantek_4032l_driver_info = { | |
524 | .name = "hantek-4032l", | |
5089a143 | 525 | .longname = "Hantek 4032L", |
6a25fa42 | 526 | .api_version = 1, |
5089a143 AZ |
527 | .init = std_init, |
528 | .cleanup = std_cleanup, | |
6a25fa42 | 529 | .scan = scan, |
5089a143 AZ |
530 | .dev_list = std_dev_list, |
531 | .dev_clear = std_dev_clear, | |
6a25fa42 AZ |
532 | .config_get = config_get, |
533 | .config_set = config_set, | |
534 | .config_list = config_list, | |
535 | .dev_open = dev_open, | |
536 | .dev_close = dev_close, | |
537 | .dev_acquisition_start = dev_acquisition_start, | |
538 | .dev_acquisition_stop = dev_acquisition_stop, | |
539 | .context = NULL, | |
540 | }; | |
5089a143 | 541 | SR_REGISTER_DEV_DRIVER(hantek_4032l_driver_info); |