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3ba56876 | 1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>, | |
5 | * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no> | |
6 | * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | /* | |
23 | * ASIX SIGMA/SIGMA2 logic analyzer driver | |
24 | */ | |
25 | ||
26 | #include <config.h> | |
27 | #include "protocol.h" | |
28 | ||
3ba56876 | 29 | /* |
30 | * Channel numbers seem to go from 1-16, according to this image: | |
31 | * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg | |
32 | * (the cable has two additional GND pins, and a TI and TO pin) | |
33 | */ | |
34 | static const char *channel_names[] = { | |
35 | "1", "2", "3", "4", "5", "6", "7", "8", | |
36 | "9", "10", "11", "12", "13", "14", "15", "16", | |
37 | }; | |
38 | ||
39 | static const uint32_t drvopts[] = { | |
40 | SR_CONF_LOGIC_ANALYZER, | |
41 | }; | |
42 | ||
43 | static const uint32_t devopts[] = { | |
44 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
45 | SR_CONF_LIMIT_SAMPLES | SR_CONF_SET, | |
46 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
47 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, | |
48 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
49 | }; | |
50 | ||
51 | static const int32_t trigger_matches[] = { | |
52 | SR_TRIGGER_ZERO, | |
53 | SR_TRIGGER_ONE, | |
54 | SR_TRIGGER_RISING, | |
55 | SR_TRIGGER_FALLING, | |
56 | }; | |
57 | ||
58 | ||
59 | static int dev_clear(const struct sr_dev_driver *di) | |
60 | { | |
61 | return std_dev_clear(di, sigma_clear_helper); | |
62 | } | |
63 | ||
3ba56876 | 64 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
65 | { | |
66 | struct sr_dev_inst *sdi; | |
67 | struct drv_context *drvc; | |
68 | struct dev_context *devc; | |
69 | GSList *devices; | |
70 | struct ftdi_device_list *devlist; | |
71 | char serial_txt[10]; | |
72 | uint32_t serial; | |
73 | int ret; | |
74 | unsigned int i; | |
75 | ||
76 | (void)options; | |
77 | ||
78 | drvc = di->context; | |
79 | ||
80 | devices = NULL; | |
81 | ||
82 | devc = g_malloc0(sizeof(struct dev_context)); | |
83 | ||
84 | ftdi_init(&devc->ftdic); | |
85 | ||
86 | /* Look for SIGMAs. */ | |
87 | ||
88 | if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist, | |
89 | USB_VENDOR, USB_PRODUCT)) <= 0) { | |
90 | if (ret < 0) | |
91 | sr_err("ftdi_usb_find_all(): %d", ret); | |
92 | goto free; | |
93 | } | |
94 | ||
95 | /* Make sure it's a version 1 or 2 SIGMA. */ | |
96 | ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0, | |
97 | serial_txt, sizeof(serial_txt)); | |
98 | sscanf(serial_txt, "%x", &serial); | |
99 | ||
100 | if (serial < 0xa6010000 || serial > 0xa602ffff) { | |
101 | sr_err("Only SIGMA and SIGMA2 are supported " | |
102 | "in this version of libsigrok."); | |
103 | goto free; | |
104 | } | |
105 | ||
106 | sr_info("Found ASIX SIGMA - Serial: %s", serial_txt); | |
107 | ||
108 | devc->cur_samplerate = samplerates[0]; | |
109 | devc->period_ps = 0; | |
110 | devc->limit_msec = 0; | |
111 | devc->cur_firmware = -1; | |
112 | devc->num_channels = 0; | |
113 | devc->samples_per_event = 0; | |
114 | devc->capture_ratio = 50; | |
115 | devc->use_triggers = 0; | |
116 | ||
117 | /* Register SIGMA device. */ | |
118 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); | |
119 | sdi->status = SR_ST_INITIALIZING; | |
120 | sdi->vendor = g_strdup(USB_VENDOR_NAME); | |
121 | sdi->model = g_strdup(USB_MODEL_NAME); | |
122 | sdi->driver = di; | |
123 | ||
124 | for (i = 0; i < ARRAY_SIZE(channel_names); i++) | |
125 | sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]); | |
126 | ||
127 | devices = g_slist_append(devices, sdi); | |
128 | drvc->instances = g_slist_append(drvc->instances, sdi); | |
129 | sdi->priv = devc; | |
130 | ||
131 | /* We will open the device again when we need it. */ | |
132 | ftdi_list_free(&devlist); | |
133 | ||
134 | return devices; | |
135 | ||
136 | free: | |
137 | ftdi_deinit(&devc->ftdic); | |
138 | g_free(devc); | |
139 | return NULL; | |
140 | } | |
141 | ||
3ba56876 | 142 | static int dev_open(struct sr_dev_inst *sdi) |
143 | { | |
144 | struct dev_context *devc; | |
145 | int ret; | |
146 | ||
147 | devc = sdi->priv; | |
148 | ||
149 | /* Make sure it's an ASIX SIGMA. */ | |
150 | if ((ret = ftdi_usb_open_desc(&devc->ftdic, | |
151 | USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { | |
152 | ||
153 | sr_err("ftdi_usb_open failed: %s", | |
154 | ftdi_get_error_string(&devc->ftdic)); | |
155 | ||
156 | return 0; | |
157 | } | |
158 | ||
159 | sdi->status = SR_ST_ACTIVE; | |
160 | ||
161 | return SR_OK; | |
162 | } | |
163 | ||
164 | static int dev_close(struct sr_dev_inst *sdi) | |
165 | { | |
166 | struct dev_context *devc; | |
167 | ||
168 | devc = sdi->priv; | |
169 | ||
170 | /* TODO */ | |
171 | if (sdi->status == SR_ST_ACTIVE) | |
172 | ftdi_usb_close(&devc->ftdic); | |
173 | ||
174 | sdi->status = SR_ST_INACTIVE; | |
175 | ||
176 | return SR_OK; | |
177 | } | |
178 | ||
3ba56876 | 179 | static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
180 | const struct sr_channel_group *cg) | |
181 | { | |
182 | struct dev_context *devc; | |
183 | ||
184 | (void)cg; | |
185 | ||
186 | if (!sdi) | |
187 | return SR_ERR; | |
188 | devc = sdi->priv; | |
189 | ||
190 | switch (key) { | |
191 | case SR_CONF_SAMPLERATE: | |
192 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
193 | break; | |
194 | case SR_CONF_LIMIT_MSEC: | |
195 | *data = g_variant_new_uint64(devc->limit_msec); | |
196 | break; | |
197 | case SR_CONF_CAPTURE_RATIO: | |
198 | *data = g_variant_new_uint64(devc->capture_ratio); | |
199 | break; | |
200 | default: | |
201 | return SR_ERR_NA; | |
202 | } | |
203 | ||
204 | return SR_OK; | |
205 | } | |
206 | ||
207 | static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, | |
208 | const struct sr_channel_group *cg) | |
209 | { | |
210 | struct dev_context *devc; | |
211 | uint64_t tmp; | |
212 | int ret; | |
213 | ||
214 | (void)cg; | |
215 | ||
216 | if (sdi->status != SR_ST_ACTIVE) | |
217 | return SR_ERR_DEV_CLOSED; | |
218 | ||
219 | devc = sdi->priv; | |
220 | ||
221 | ret = SR_OK; | |
222 | switch (key) { | |
223 | case SR_CONF_SAMPLERATE: | |
224 | ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data)); | |
225 | break; | |
226 | case SR_CONF_LIMIT_MSEC: | |
227 | tmp = g_variant_get_uint64(data); | |
228 | if (tmp > 0) | |
229 | devc->limit_msec = g_variant_get_uint64(data); | |
230 | else | |
231 | ret = SR_ERR; | |
232 | break; | |
233 | case SR_CONF_LIMIT_SAMPLES: | |
234 | tmp = g_variant_get_uint64(data); | |
235 | devc->limit_msec = tmp * 1000 / devc->cur_samplerate; | |
236 | break; | |
237 | case SR_CONF_CAPTURE_RATIO: | |
238 | tmp = g_variant_get_uint64(data); | |
239 | if (tmp <= 100) | |
240 | devc->capture_ratio = tmp; | |
241 | else | |
242 | ret = SR_ERR; | |
243 | break; | |
244 | default: | |
245 | ret = SR_ERR_NA; | |
246 | } | |
247 | ||
248 | return ret; | |
249 | } | |
250 | ||
251 | static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, | |
252 | const struct sr_channel_group *cg) | |
253 | { | |
254 | GVariant *gvar; | |
255 | GVariantBuilder gvb; | |
256 | ||
257 | (void)cg; | |
258 | ||
259 | switch (key) { | |
260 | case SR_CONF_DEVICE_OPTIONS: | |
261 | if (!sdi) | |
262 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32, | |
263 | drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t)); | |
264 | else | |
265 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32, | |
266 | devopts, ARRAY_SIZE(devopts), sizeof(uint32_t)); | |
267 | break; | |
268 | case SR_CONF_SAMPLERATE: | |
269 | g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}")); | |
270 | gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates, | |
271 | SAMPLERATES_COUNT, sizeof(uint64_t)); | |
272 | g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar); | |
273 | *data = g_variant_builder_end(&gvb); | |
274 | break; | |
275 | case SR_CONF_TRIGGER_MATCH: | |
276 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, | |
277 | trigger_matches, ARRAY_SIZE(trigger_matches), | |
278 | sizeof(int32_t)); | |
279 | break; | |
280 | default: | |
281 | return SR_ERR_NA; | |
282 | } | |
283 | ||
284 | return SR_OK; | |
285 | } | |
286 | ||
695dc859 | 287 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
3ba56876 | 288 | { |
289 | struct dev_context *devc; | |
290 | struct clockselect_50 clockselect; | |
291 | int frac, triggerpin, ret; | |
292 | uint8_t triggerselect = 0; | |
293 | struct triggerinout triggerinout_conf; | |
294 | struct triggerlut lut; | |
295 | ||
296 | if (sdi->status != SR_ST_ACTIVE) | |
297 | return SR_ERR_DEV_CLOSED; | |
298 | ||
299 | devc = sdi->priv; | |
300 | ||
301 | if (sigma_convert_trigger(sdi) != SR_OK) { | |
302 | sr_err("Failed to configure triggers."); | |
303 | return SR_ERR; | |
304 | } | |
305 | ||
306 | /* If the samplerate has not been set, default to 200 kHz. */ | |
307 | if (devc->cur_firmware == -1) { | |
308 | if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK) | |
309 | return ret; | |
310 | } | |
311 | ||
312 | /* Enter trigger programming mode. */ | |
313 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc); | |
314 | ||
315 | /* 100 and 200 MHz mode. */ | |
316 | if (devc->cur_samplerate >= SR_MHZ(100)) { | |
317 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc); | |
318 | ||
319 | /* Find which pin to trigger on from mask. */ | |
0a1f7b09 | 320 | for (triggerpin = 0; triggerpin < 8; triggerpin++) |
3ba56876 | 321 | if ((devc->trigger.risingmask | devc->trigger.fallingmask) & |
322 | (1 << triggerpin)) | |
323 | break; | |
324 | ||
325 | /* Set trigger pin and light LED on trigger. */ | |
326 | triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7); | |
327 | ||
328 | /* Default rising edge. */ | |
329 | if (devc->trigger.fallingmask) | |
330 | triggerselect |= 1 << 3; | |
331 | ||
332 | /* All other modes. */ | |
333 | } else if (devc->cur_samplerate <= SR_MHZ(50)) { | |
334 | sigma_build_basic_trigger(&lut, devc); | |
335 | ||
336 | sigma_write_trigger_lut(&lut, devc); | |
337 | ||
338 | triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0); | |
339 | } | |
340 | ||
341 | /* Setup trigger in and out pins to default values. */ | |
342 | memset(&triggerinout_conf, 0, sizeof(struct triggerinout)); | |
343 | triggerinout_conf.trgout_bytrigger = 1; | |
344 | triggerinout_conf.trgout_enable = 1; | |
345 | ||
346 | sigma_write_register(WRITE_TRIGGER_OPTION, | |
347 | (uint8_t *) &triggerinout_conf, | |
348 | sizeof(struct triggerinout), devc); | |
349 | ||
350 | /* Go back to normal mode. */ | |
351 | sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc); | |
352 | ||
353 | /* Set clock select register. */ | |
354 | if (devc->cur_samplerate == SR_MHZ(200)) | |
355 | /* Enable 4 channels. */ | |
356 | sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, devc); | |
357 | else if (devc->cur_samplerate == SR_MHZ(100)) | |
358 | /* Enable 8 channels. */ | |
359 | sigma_set_register(WRITE_CLOCK_SELECT, 0x00, devc); | |
360 | else { | |
361 | /* | |
362 | * 50 MHz mode (or fraction thereof). Any fraction down to | |
363 | * 50 MHz / 256 can be used, but is not supported by sigrok API. | |
364 | */ | |
365 | frac = SR_MHZ(50) / devc->cur_samplerate - 1; | |
366 | ||
367 | clockselect.async = 0; | |
368 | clockselect.fraction = frac; | |
369 | clockselect.disabled_channels = 0; | |
370 | ||
371 | sigma_write_register(WRITE_CLOCK_SELECT, | |
372 | (uint8_t *) &clockselect, | |
373 | sizeof(clockselect), devc); | |
374 | } | |
375 | ||
376 | /* Setup maximum post trigger time. */ | |
377 | sigma_set_register(WRITE_POST_TRIGGER, | |
378 | (devc->capture_ratio * 255) / 100, devc); | |
379 | ||
380 | /* Start acqusition. */ | |
381 | gettimeofday(&devc->start_tv, 0); | |
382 | sigma_set_register(WRITE_MODE, 0x0d, devc); | |
383 | ||
3ba56876 | 384 | std_session_send_df_header(sdi, LOG_PREFIX); |
385 | ||
386 | /* Add capture source. */ | |
387 | sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi); | |
388 | ||
389 | devc->state.state = SIGMA_CAPTURE; | |
390 | ||
391 | return SR_OK; | |
392 | } | |
393 | ||
695dc859 | 394 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
3ba56876 | 395 | { |
396 | struct dev_context *devc; | |
397 | ||
3ba56876 | 398 | devc = sdi->priv; |
399 | devc->state.state = SIGMA_IDLE; | |
400 | ||
401 | sr_session_source_remove(sdi->session, -1); | |
402 | ||
403 | return SR_OK; | |
404 | } | |
405 | ||
dd5c48a6 | 406 | static struct sr_dev_driver asix_sigma_driver_info = { |
3ba56876 | 407 | .name = "asix-sigma", |
408 | .longname = "ASIX SIGMA/SIGMA2", | |
409 | .api_version = 1, | |
c2fdcc25 | 410 | .init = std_init, |
700d6b64 | 411 | .cleanup = std_cleanup, |
3ba56876 | 412 | .scan = scan, |
c01bf34c | 413 | .dev_list = std_dev_list, |
3ba56876 | 414 | .dev_clear = dev_clear, |
415 | .config_get = config_get, | |
416 | .config_set = config_set, | |
417 | .config_list = config_list, | |
418 | .dev_open = dev_open, | |
419 | .dev_close = dev_close, | |
420 | .dev_acquisition_start = dev_acquisition_start, | |
421 | .dev_acquisition_stop = dev_acquisition_stop, | |
422 | .context = NULL, | |
423 | }; | |
dd5c48a6 | 424 | SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info); |