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e63e73d9 UH |
1 | ------------------------------------------------------------------------------- |
2 | Epson 8564JE I2C RTC | |
3 | ------------------------------------------------------------------------------- | |
4 | ||
5 | This an example capture of I2C traffic from/to an Epson 8564JE I2C RTC chip. | |
6 | ||
7 | ||
8 | Logic analyzer setup | |
9 | -------------------- | |
10 | ||
11 | The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate | |
12 | of 1MHz. The logic analyzer probes were connected to the RTC chip like this: | |
13 | ||
14 | Probe RTC chip pin | |
15 | ------------------------ | |
16 | 0 (green) SCL | |
17 | 6 (blue) SDA | |
18 | GND GND | |
19 | ||
20 | ||
21 | Data | |
22 | ---- | |
23 | ||
24 | The device talking to the RTC was doing the following in an infinite loop: | |
25 | ||
26 | - Set the RTC to a specific date/time (Nov 22, 2011 - 04:03:54, weekday = 2). | |
27 | ||
28 | - Read back the current time from the RTC. | |
29 | ||
30 | The sigrok command line used was: | |
31 | ||
32 | sigrok-cli -d 0:samplerate=1mhz --samples 8388608 \ | |
33 | -p '1=SCL,7=SDA,2-6,8' -o rtc_epson_8564je.sr | |
34 |