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4fe9a6da BV |
1 | /* |
2 | * This file is part of the sigrok project. | |
3 | * | |
c73d2ea4 | 4 | * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com> |
4fe9a6da BV |
5 | * |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
0f8522bf UH |
20 | #ifndef LIBSIGROK_HARDWARE_OPENBENCH_LOGIC_SNIFFER_OLS_H |
21 | #define LIBSIGROK_HARDWARE_OPENBENCH_LOGIC_SNIFFER_OLS_H | |
4fe9a6da BV |
22 | |
23 | #define NUM_PROBES 32 | |
24 | #define NUM_TRIGGER_STAGES 4 | |
25 | #define TRIGGER_TYPES "01" | |
26 | #define SERIAL_SPEED B115200 | |
27 | #define CLOCK_RATE SR_MHZ(100) | |
28 | #define MIN_NUM_SAMPLES 4 | |
29 | ||
30 | /* Command opcodes */ | |
31 | #define CMD_RESET 0x00 | |
32 | #define CMD_RUN 0x01 | |
33 | #define CMD_ID 0x02 | |
34 | #define CMD_METADATA 0x04 | |
35 | #define CMD_SET_FLAGS 0x82 | |
36 | #define CMD_SET_DIVIDER 0x80 | |
37 | #define CMD_CAPTURE_SIZE 0x81 | |
38 | #define CMD_SET_TRIGGER_MASK_0 0xc0 | |
39 | #define CMD_SET_TRIGGER_MASK_1 0xc4 | |
40 | #define CMD_SET_TRIGGER_MASK_2 0xc8 | |
41 | #define CMD_SET_TRIGGER_MASK_3 0xcc | |
42 | #define CMD_SET_TRIGGER_VALUE_0 0xc1 | |
43 | #define CMD_SET_TRIGGER_VALUE_1 0xc5 | |
44 | #define CMD_SET_TRIGGER_VALUE_2 0xc9 | |
45 | #define CMD_SET_TRIGGER_VALUE_3 0xcd | |
46 | #define CMD_SET_TRIGGER_CONFIG_0 0xc2 | |
47 | #define CMD_SET_TRIGGER_CONFIG_1 0xc6 | |
48 | #define CMD_SET_TRIGGER_CONFIG_2 0xca | |
49 | #define CMD_SET_TRIGGER_CONFIG_3 0xce | |
50 | ||
51 | /* Bitmasks for CMD_FLAGS */ | |
52 | #define FLAG_DEMUX 0x01 | |
53 | #define FLAG_FILTER 0x02 | |
54 | #define FLAG_CHANNELGROUP_1 0x04 | |
55 | #define FLAG_CHANNELGROUP_2 0x08 | |
56 | #define FLAG_CHANNELGROUP_3 0x10 | |
57 | #define FLAG_CHANNELGROUP_4 0x20 | |
58 | #define FLAG_CLOCK_EXTERNAL 0x40 | |
59 | #define FLAG_CLOCK_INVERTED 0x80 | |
60 | #define FLAG_RLE 0x0100 | |
61 | ||
ea9cfed7 | 62 | /* Private, per-device-instance driver context. */ |
fefc4b85 | 63 | struct dev_context { |
4fe9a6da BV |
64 | uint32_t max_samplerate; |
65 | uint32_t max_samples; | |
66 | uint32_t protocol_version; | |
4fe9a6da BV |
67 | |
68 | uint64_t cur_samplerate; | |
69 | uint32_t cur_samplerate_divider; | |
70 | uint64_t limit_samples; | |
71 | /* Current state of the flag register */ | |
72 | uint32_t flag_reg; | |
73 | ||
74 | /* Pre/post trigger capture ratio, in percentage. | |
75 | * 0 means no pre-trigger data. */ | |
76 | int capture_ratio; | |
77 | int trigger_at; | |
78 | uint32_t probe_mask; | |
79 | uint32_t trigger_mask[4]; | |
80 | uint32_t trigger_value[4]; | |
81 | int num_stages; | |
82 | ||
83 | unsigned int num_transfers; | |
22130421 | 84 | unsigned int num_samples; |
3a4d09c0 | 85 | int rle_count; |
4fe9a6da | 86 | int num_bytes; |
4fe9a6da BV |
87 | unsigned char sample[4]; |
88 | unsigned char tmp_sample[4]; | |
89 | unsigned char *raw_sample_buf; | |
69890f73 | 90 | |
d68e2d1a | 91 | struct sr_serial_dev_inst *serial; |
4fe9a6da BV |
92 | }; |
93 | ||
0f8522bf | 94 | #endif |