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3b533202 BV |
1 | /* |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2012 Bert Vermeulen <bert@biot.com> | |
5 | * With protocol information from the hantekdso project, | |
6 | * Copyright (C) 2008 Oleg Khudyakov <prcoder@gmail.com> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #ifndef LIBSIGROK_HARDWARE_HANTEK_DSO_H | |
23 | #define LIBSIGROK_HARDWARE_HANTEK_DSO_H | |
24 | ||
25 | #define USB_INTERFACE 0 | |
26 | #define USB_CONFIGURATION 1 | |
27 | #define DSO_EP_IN 0x86 | |
28 | #define DSO_EP_OUT 0x02 | |
29 | ||
30 | /* FX2 renumeration delay in ms */ | |
31 | #define MAX_RENUM_DELAY 3000 | |
32 | ||
33 | #define MAX_CAPTURE_EMPTY 3 | |
34 | ||
35 | #define DEFAULT_VOLTAGE VOLTAGE_2V | |
36 | #define DEFAULT_FRAMESIZE FRAMESIZE_SMALL | |
37 | #define DEFAULT_TIMEBASE TIME_1ms | |
38 | #define DEFAULT_TRIGGER_SOURCE TRIGGER_CH1 | |
39 | #define DEFAULT_COUPLING COUPLING_AC | |
3b533202 BV |
40 | /* Halfway between min and max = 0V */ |
41 | #define DEFAULT_HORIZ_TRIGGERPOS 0x1400 | |
42 | ||
43 | #define DEFAULT_VERT_OFFSET 0.5 | |
44 | #define DEFAULT_VERT_TRIGGERPOS 0.0 | |
45 | ||
46 | #define MAX_VERT_TRIGGER 0xfe | |
47 | ||
48 | /* Hantek DSO-specific protocol values */ | |
49 | #define EEPROM_CHANNEL_OFFSETS 0x08 | |
50 | ||
51 | #define FRAMESIZE_SMALL 10240 | |
52 | #define FRAMESIZE_LARGE 32768 | |
53 | ||
54 | ||
55 | enum control_requests { | |
56 | CTRL_READ_EEPROM = 0xa2, | |
57 | CTRL_GETSPEED = 0xb2, | |
58 | CTRL_BEGINCOMMAND = 0xb3, | |
59 | CTRL_SETOFFSET = 0xb4, | |
60 | CTRL_SETRELAYS = 0xb5 | |
61 | }; | |
62 | ||
63 | enum dso_commands { | |
64 | CMD_SET_FILTERS = 0, | |
65 | CMD_SET_TRIGGER_SAMPLERATE, | |
66 | CMD_FORCE_TRIGGER, | |
67 | CMD_CAPTURE_START, | |
68 | CMD_ENABLE_TRIGGER, | |
69 | CMD_GET_CHANNELDATA, | |
70 | CMD_GET_CAPTURESTATE, | |
71 | CMD_SET_VOLTAGE, | |
72 | cmdSetLogicalData, | |
73 | cmdGetLogicalData | |
74 | }; | |
75 | ||
76 | enum voltages { | |
77 | VOLTAGE_5V = 0, | |
78 | VOLTAGE_2V, | |
79 | VOLTAGE_1V, | |
80 | VOLTAGE_500mV, | |
81 | VOLTAGE_200mV, | |
82 | VOLTAGE_100mV, | |
83 | VOLTAGE_50mV, | |
84 | VOLTAGE_20mV, | |
85 | VOLTAGE_10mV | |
86 | }; | |
87 | ||
88 | enum couplings { | |
89 | COUPLING_AC = 0, | |
90 | COUPLING_DC, | |
91 | COUPLING_OFF | |
92 | }; | |
93 | ||
94 | enum time_bases { | |
95 | TIME_10us = 0, | |
96 | TIME_20us, | |
97 | TIME_40us, | |
98 | TIME_100us, | |
99 | TIME_200us, | |
100 | TIME_400us, | |
101 | TIME_1ms, | |
102 | TIME_2ms, | |
103 | TIME_4ms, | |
104 | TIME_10ms, | |
105 | TIME_20ms, | |
106 | TIME_40ms, | |
107 | TIME_100ms, | |
108 | TIME_200ms, | |
109 | TIME_400ms | |
110 | }; | |
111 | ||
112 | enum trigger_slopes { | |
113 | SLOPE_POSITIVE = 0, | |
114 | SLOPE_NEGATIVE | |
115 | }; | |
116 | ||
117 | enum trigger_sources { | |
118 | TRIGGER_CH2 = 0, | |
119 | TRIGGER_CH1, | |
120 | TRIGGER_ALT, | |
121 | TRIGGER_EXT, | |
122 | TRIGGER_EXT10 | |
123 | }; | |
124 | ||
3b533202 BV |
125 | enum capturestates { |
126 | CAPTURE_EMPTY = 0, | |
127 | CAPTURE_FILLING = 1, | |
128 | CAPTURE_READY_8BIT = 2, | |
129 | CAPTURE_READY_9BIT = 7, | |
130 | CAPTURE_TIMEOUT = 127, | |
131 | CAPTURE_UNKNOWN = 255 | |
132 | }; | |
133 | ||
134 | enum triggermodes { | |
135 | TRIGGERMODE_AUTO, | |
136 | TRIGGERMODE_NORMAL, | |
137 | TRIGGERMODE_SINGLE | |
138 | }; | |
139 | ||
140 | enum states { | |
141 | IDLE, | |
142 | NEW_CAPTURE, | |
143 | CAPTURE, | |
144 | FETCH_DATA | |
145 | }; | |
146 | ||
147 | struct dso_profile { | |
148 | /* VID/PID after cold boot */ | |
149 | uint16_t orig_vid; | |
150 | uint16_t orig_pid; | |
151 | /* VID/PID after firmware upload */ | |
152 | uint16_t fw_vid; | |
153 | uint16_t fw_pid; | |
154 | char *vendor; | |
155 | char *model; | |
156 | char *model_version; | |
157 | int num_probes; | |
158 | char *firmware; | |
159 | }; | |
160 | ||
161 | struct context { | |
162 | struct dso_profile *profile; | |
163 | struct sr_usb_dev_inst *usb; | |
164 | void *cb_data; | |
ae88b97b BV |
165 | uint64_t limit_frames; |
166 | uint64_t num_frames; | |
3b533202 BV |
167 | /* We can't keep track of an FX2-based device after upgrading |
168 | * the firmware (it re-enumerates into a different device address | |
169 | * after the upgrade) this is like a global lock. No device will open | |
170 | * until a proper delay after the last device was upgraded. | |
171 | */ | |
172 | GTimeVal fw_updated; | |
173 | int epin_maxpacketsize; | |
174 | int capture_empty_count; | |
175 | int current_transfer; | |
176 | int dev_state; | |
177 | ||
178 | int timebase; | |
179 | gboolean ch1_enabled; | |
180 | gboolean ch2_enabled; | |
181 | int voltage_ch1; | |
182 | int voltage_ch2; | |
183 | int coupling_ch1; | |
184 | int coupling_ch2; | |
185 | // voltage offset (vertical position) | |
186 | float voffset_ch1; | |
187 | float voffset_ch2; | |
188 | float voffset_trigger; | |
189 | uint16_t channel_levels[2][9][2]; | |
3b533202 BV |
190 | int framesize; |
191 | gboolean filter_ch1; | |
192 | gboolean filter_ch2; | |
193 | gboolean filter_trigger; | |
194 | int triggerslope; | |
195 | int triggersource; | |
196 | int triggerposition; | |
197 | int triggermode; | |
198 | }; | |
199 | ||
200 | SR_PRIV int dso_open(int dev_index); | |
201 | SR_PRIV void dso_close(struct sr_dev_inst *sdi); | |
202 | SR_PRIV int dso_enable_trigger(struct context *ctx); | |
203 | SR_PRIV int dso_force_trigger(struct context *ctx); | |
204 | SR_PRIV int dso_init(struct context *ctx); | |
205 | SR_PRIV uint8_t dso_get_capturestate(struct context *ctx); | |
206 | SR_PRIV uint8_t dso_capture_start(struct context *ctx); | |
207 | SR_PRIV int dso_get_channeldata(struct context *ctx, libusb_transfer_cb_fn cb); | |
208 | ||
209 | #endif |