projects / libsigrok.git / blame
| Commit | Line | Data |
|---|---|---|
| 204b1629 UH |
1 | /* |
| 2 | * This file is part of the sigrok project. | |
| 3 | * | |
| 4 | * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>, | |
| 5 | * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no> | |
| 6 | * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no> | |
| 7 | * | |
| 8 | * This program is free software: you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License as published by | |
| 10 | * the Free Software Foundation, either version 3 of the License, or | |
| 11 | * (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
| 20 | */ | |
| 21 | ||
| 28a35d8a HE |
22 | #ifndef ASIX_SIGMA_H |
| 23 | #define ASIX_SIGMA_H | |
| 24 | ||
| 25 | enum sigma_write_register | |
| 26 | { | |
| 27 | WRITE_CLOCK_SELECT = 0, | |
| 28 | WRITE_TRIGGER_SELECT0 = 1, | |
| 29 | WRITE_TRIGGER_SELECT1 = 2, | |
| 30 | WRITE_MODE = 3, | |
| 31 | WRITE_MEMROW = 4, | |
| 32 | WRITE_POST_TRIGGER = 5, | |
| 33 | WRITE_TRIGGER_OPTION = 6, | |
| 34 | WRITE_PIN_VIEW = 7, | |
| 35 | ||
| 36 | WRITE_TEST = 15 | |
| 37 | }; | |
| 38 | ||
| 39 | enum sigma_read_register | |
| 40 | { | |
| 41 | READ_ID = 0, | |
| 42 | READ_TRIGGER_POS_LOW = 1, | |
| 43 | READ_TRIGGER_POS_HIGH = 2, | |
| 44 | READ_TRIGGER_POS_UP = 3, | |
| 45 | READ_STOP_POS_LOW = 4, | |
| 46 | READ_STOP_POS_HIGH = 5, | |
| 47 | READ_STOP_POS_UP = 6, | |
| 48 | READ_MODE = 7, | |
| 49 | READ_PIN_CHANGE_LOW = 8, | |
| 50 | READ_PIN_CHANGE_HIGH = 9, | |
| 51 | READ_BLOCK_LAST_TS_LOW = 10, | |
| 52 | READ_BLOCK_LAST_TS_HIGH = 11, | |
| 53 | READ_PIN_VIEW = 12, | |
| 54 | ||
| 55 | READ_TEST = 15 | |
| 56 | }; | |
| 57 | ||
| 58 | #define REG_ADDR_LOW (0 << 4) | |
| 59 | #define REG_ADDR_HIGH (1 << 4) | |
| 60 | #define REG_DATA_LOW (2 << 4) | |
| 61 | #define REG_DATA_HIGH_WRITE (3 << 4) | |
| 62 | #define REG_READ_ADDR (4 << 4) | |
| 63 | #define REG_DRAM_WAIT_ACK (5 << 4) | |
| 64 | ||
| 65 | /* Bit (1 << 4) can be low or high (double buffer / cache) */ | |
| 66 | #define REG_DRAM_BLOCK (6 << 4) | |
| 67 | #define REG_DRAM_BLOCK_BEGIN (8 << 4) | |
| 68 | #define REG_DRAM_BLOCK_DATA (10 << 4) | |
| 69 | ||
| 70 | #define NEXT_REG 1 | |
| 71 | ||
| 72 | #define EVENTS_PER_CLUSTER 7 | |
| 73 | ||
| 74 | #define CHUNK_SIZE 1024 | |
| 75 | ||
| 204b1629 | 76 | #endif |