]>
Commit | Line | Data |
---|---|---|
2dc6d41c | 1 | ## |
50bd5d25 | 2 | ## This file is part of the libsigrokdecode project. |
2dc6d41c UH |
3 | ## |
4 | ## Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz> | |
7d4b5fac | 5 | ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de> |
2dc6d41c UH |
6 | ## |
7 | ## This program is free software; you can redistribute it and/or modify | |
8 | ## it under the terms of the GNU General Public License as published by | |
9 | ## the Free Software Foundation; either version 2 of the License, or | |
10 | ## (at your option) any later version. | |
11 | ## | |
12 | ## This program is distributed in the hope that it will be useful, | |
13 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | ## GNU General Public License for more details. | |
16 | ## | |
17 | ## You should have received a copy of the GNU General Public License | |
18 | ## along with this program; if not, write to the Free Software | |
19 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
20 | ## | |
21 | ||
2dc6d41c UH |
22 | import sigrokdecode as srd |
23 | ||
a56b8fe1 | 24 | ''' |
c515eed7 | 25 | OUTPUT_PYTHON format: |
a56b8fe1 UH |
26 | |
27 | Packet: | |
28 | [<ptype>, <pdata>] | |
29 | ||
30 | <ptype>, <pdata>: | |
31 | - 'SOP', None | |
32 | - 'SYM', <sym> | |
33 | - 'BIT', <bit> | |
34 | - 'STUFF BIT', None | |
35 | - 'EOP', None | |
033d6221 | 36 | - 'ERR', None |
a56b8fe1 UH |
37 | |
38 | <sym>: | |
39 | - 'J', 'K', 'SE0', or 'SE1' | |
40 | ||
41 | <bit>: | |
033d6221 | 42 | - '0' or '1' |
a56b8fe1 | 43 | - Note: Symbols like SE0, SE1, and the J that's part of EOP don't yield 'BIT'. |
a56b8fe1 UH |
44 | ''' |
45 | ||
d1970f14 | 46 | # Low-/full-speed symbols. |
2dc6d41c | 47 | # Note: Low-speed J and K are inverted compared to the full-speed J and K! |
7dc75721 UH |
48 | symbols = { |
49 | 'low-speed': { | |
2dc6d41c UH |
50 | # (<dp>, <dm>): <symbol/state> |
51 | (0, 0): 'SE0', | |
52 | (1, 0): 'K', | |
53 | (0, 1): 'J', | |
54 | (1, 1): 'SE1', | |
7dc75721 UH |
55 | }, |
56 | 'full-speed': { | |
2dc6d41c UH |
57 | # (<dp>, <dm>): <symbol/state> |
58 | (0, 0): 'SE0', | |
59 | (1, 0): 'J', | |
60 | (0, 1): 'K', | |
61 | (1, 1): 'SE1', | |
7dc75721 | 62 | }, |
2dc6d41c UH |
63 | } |
64 | ||
5bb55598 UH |
65 | bitrates = { |
66 | 'low-speed': 1500000, # 1.5Mb/s (+/- 1.5%) | |
67 | 'full-speed': 12000000, # 12Mb/s (+/- 0.25%) | |
68 | } | |
69 | ||
56cc44ff SB |
70 | sym_annotation = { |
71 | 'J': [0, ['J']], | |
72 | 'K': [1, ['K']], | |
73 | 'SE0': [2, ['SE0', '0']], | |
74 | 'SE1': [3, ['SE1', '1']], | |
85c03d60 UH |
75 | } |
76 | ||
21cda951 UH |
77 | class SamplerateError(Exception): |
78 | pass | |
79 | ||
2dc6d41c | 80 | class Decoder(srd.Decoder): |
12851357 | 81 | api_version = 2 |
2dc6d41c UH |
82 | id = 'usb_signalling' |
83 | name = 'USB signalling' | |
84 | longname = 'Universal Serial Bus (LS/FS) signalling' | |
9e1437a0 | 85 | desc = 'USB (low-speed and full-speed) signalling protocol.' |
2dc6d41c UH |
86 | license = 'gplv2+' |
87 | inputs = ['logic'] | |
88 | outputs = ['usb_signalling'] | |
6a15597a | 89 | channels = ( |
2dc6d41c UH |
90 | {'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal'}, |
91 | {'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal'}, | |
da9bcbd9 | 92 | ) |
84c1c0b5 BV |
93 | options = ( |
94 | {'id': 'signalling', 'desc': 'Signalling', | |
95 | 'default': 'full-speed', 'values': ('full-speed', 'low-speed')}, | |
96 | ) | |
da9bcbd9 | 97 | annotations = ( |
85c03d60 UH |
98 | ('sym-j', 'J symbol'), |
99 | ('sym-k', 'K symbol'), | |
100 | ('sym-se0', 'SE0 symbol'), | |
101 | ('sym-se1', 'SE1 symbol'), | |
da9bcbd9 BV |
102 | ('sop', 'Start of packet (SOP)'), |
103 | ('eop', 'End of packet (EOP)'), | |
104 | ('bit', 'Bit'), | |
105 | ('stuffbit', 'Stuff bit'), | |
033d6221 | 106 | ('error', 'Error'), |
da9bcbd9 | 107 | ) |
066d6594 | 108 | annotation_rows = ( |
033d6221 | 109 | ('bits', 'Bits', (4, 5, 6, 7, 8)), |
85c03d60 | 110 | ('symbols', 'Symbols', (0, 1, 2, 3)), |
066d6594 | 111 | ) |
2dc6d41c UH |
112 | |
113 | def __init__(self): | |
f372d597 | 114 | self.samplerate = None |
d1970f14 | 115 | self.oldsym = 'J' # The "idle" state is J. |
fdd5ee5e | 116 | self.ss_block = None |
2dc6d41c | 117 | self.samplenum = 0 |
5bb55598 UH |
118 | self.bitrate = None |
119 | self.bitwidth = None | |
a241cfb6 | 120 | self.samplepos = None |
d1970f14 | 121 | self.samplenum_target = None |
a241cfb6 | 122 | self.samplenum_edge = None |
6fbab493 | 123 | self.samplenum_lastedge = 0 |
2fcd7c22 | 124 | self.oldpins = None |
a241cfb6 | 125 | self.edgepins = None |
d1970f14 UH |
126 | self.consecutive_ones = 0 |
127 | self.state = 'IDLE' | |
2dc6d41c | 128 | |
f372d597 | 129 | def start(self): |
c515eed7 | 130 | self.out_python = self.register(srd.OUTPUT_PYTHON) |
be465111 | 131 | self.out_ann = self.register(srd.OUTPUT_ANN) |
f372d597 BV |
132 | |
133 | def metadata(self, key, value): | |
134 | if key == srd.SRD_CONF_SAMPLERATE: | |
135 | self.samplerate = value | |
136 | self.bitrate = bitrates[self.options['signalling']] | |
137 | self.bitwidth = float(self.samplerate) / float(self.bitrate) | |
2dc6d41c | 138 | |
d1970f14 | 139 | def putpx(self, data): |
6fbab493 SB |
140 | s = self.samplenum_edge |
141 | self.put(s, s, self.out_python, data) | |
7d4b5fac UH |
142 | |
143 | def putx(self, data): | |
6fbab493 SB |
144 | s = self.samplenum_edge |
145 | self.put(s, s, self.out_ann, data) | |
7d4b5fac | 146 | |
fdd5ee5e | 147 | def putpm(self, data): |
6fbab493 SB |
148 | e = self.samplenum_edge |
149 | self.put(self.ss_block, e, self.out_python, data) | |
fdd5ee5e UH |
150 | |
151 | def putm(self, data): | |
6fbab493 SB |
152 | e = self.samplenum_edge |
153 | self.put(self.ss_block, e, self.out_ann, data) | |
fdd5ee5e | 154 | |
d1970f14 | 155 | def putpb(self, data): |
6fbab493 SB |
156 | s, e = self.samplenum_lastedge, self.samplenum_edge |
157 | self.put(s, e, self.out_python, data) | |
d1970f14 UH |
158 | |
159 | def putb(self, data): | |
6fbab493 SB |
160 | s, e = self.samplenum_lastedge, self.samplenum_edge |
161 | self.put(s, e, self.out_ann, data) | |
d1970f14 UH |
162 | |
163 | def set_new_target_samplenum(self): | |
a241cfb6 SB |
164 | self.samplepos += self.bitwidth; |
165 | self.samplenum_target = int(self.samplepos) | |
6fbab493 | 166 | self.samplenum_lastedge = self.samplenum_edge |
a241cfb6 | 167 | self.samplenum_edge = int(self.samplepos - (self.bitwidth / 2)) |
d1970f14 UH |
168 | |
169 | def wait_for_sop(self, sym): | |
170 | # Wait for a Start of Packet (SOP), i.e. a J->K symbol change. | |
171 | if sym != 'K': | |
172 | self.oldsym = sym | |
173 | return | |
033d6221 | 174 | self.consecutive_ones = 0 |
ce780be2 | 175 | self.samplepos = self.samplenum - (self.bitwidth / 2) + 0.5 |
d1970f14 UH |
176 | self.set_new_target_samplenum() |
177 | self.putpx(['SOP', None]) | |
85c03d60 | 178 | self.putx([4, ['SOP', 'S']]) |
d1970f14 UH |
179 | self.state = 'GET BIT' |
180 | ||
bef4949d | 181 | def handle_bit(self, b): |
033d6221 SB |
182 | if self.consecutive_ones == 6: |
183 | if b == '0': | |
184 | # Stuff bit. | |
185 | self.putpb(['STUFF BIT', None]) | |
186 | self.putb([7, ['Stuff bit: 0', 'SB: 0', '0']]) | |
187 | self.consecutive_ones = 0 | |
188 | else: | |
189 | self.putpb(['ERR', None]) | |
190 | self.putb([8, ['Bit stuff error', 'BS ERR', 'B']]) | |
191 | self.state = 'IDLE' | |
d1970f14 | 192 | else: |
9059125f | 193 | # Normal bit (not a stuff bit). |
a56b8fe1 | 194 | self.putpb(['BIT', b]) |
85c03d60 | 195 | self.putb([6, ['%s' % b]]) |
d1970f14 UH |
196 | if b == '1': |
197 | self.consecutive_ones += 1 | |
198 | else: | |
199 | self.consecutive_ones = 0 | |
200 | ||
201 | def get_eop(self, sym): | |
202 | # EOP: SE0 for >= 1 bittime (usually 2 bittimes), then J. | |
6fbab493 | 203 | self.set_new_target_samplenum() |
d1970f14 | 204 | self.putpb(['SYM', sym]) |
56cc44ff | 205 | self.putb(sym_annotation[sym]) |
d1970f14 | 206 | self.oldsym = sym |
bef4949d SB |
207 | if sym == 'SE0': |
208 | pass | |
209 | elif sym == 'J': | |
9059125f | 210 | # Got an EOP. |
fdd5ee5e | 211 | self.putpm(['EOP', None]) |
85c03d60 | 212 | self.putm([5, ['EOP', 'E']]) |
bef4949d | 213 | self.state = 'IDLE' |
a241cfb6 | 214 | self.bitwidth = float(self.samplerate) / float(self.bitrate) |
0f274b53 SB |
215 | else: |
216 | self.putpm(['ERR', None]) | |
217 | self.putm([8, ['EOP Error', 'EErr', 'E']]) | |
218 | self.state = 'IDLE' | |
d1970f14 UH |
219 | |
220 | def get_bit(self, sym): | |
6fbab493 | 221 | self.set_new_target_samplenum() |
d1970f14 | 222 | if sym == 'SE0': |
bef4949d | 223 | # Start of an EOP. Change state, save edge |
d1970f14 | 224 | self.state = 'GET EOP' |
6fbab493 | 225 | self.ss_block = self.samplenum_lastedge |
bef4949d SB |
226 | else: |
227 | b = '0' if self.oldsym != sym else '1' | |
228 | self.handle_bit(b) | |
d1970f14 | 229 | self.putpb(['SYM', sym]) |
56cc44ff | 230 | self.putb(sym_annotation[sym]) |
64b45b20 | 231 | if self.oldsym != sym: |
a241cfb6 | 232 | edgesym = symbols[self.options['signalling']][tuple(self.edgepins)] |
64b45b20 UH |
233 | if edgesym not in ('SE0', 'SE1'): |
234 | if edgesym == sym: | |
a241cfb6 SB |
235 | self.bitwidth = self.bitwidth - (0.001 * self.bitwidth) |
236 | self.samplepos = self.samplepos - (0.01 * self.bitwidth) | |
237 | else: | |
238 | self.bitwidth = self.bitwidth + (0.001 * self.bitwidth) | |
239 | self.samplepos = self.samplepos + (0.01 * self.bitwidth) | |
d1970f14 UH |
240 | self.oldsym = sym |
241 | ||
2dc6d41c | 242 | def decode(self, ss, es, data): |
21cda951 UH |
243 | if not self.samplerate: |
244 | raise SamplerateError('Cannot decode without samplerate.') | |
2fcd7c22 | 245 | for (self.samplenum, pins) in data: |
d1970f14 UH |
246 | # State machine. |
247 | if self.state == 'IDLE': | |
248 | # Ignore identical samples early on (for performance reasons). | |
249 | if self.oldpins == pins: | |
250 | continue | |
251 | self.oldpins = pins | |
252 | sym = symbols[self.options['signalling']][tuple(pins)] | |
253 | self.wait_for_sop(sym) | |
a241cfb6 | 254 | self.edgepins = pins |
d1970f14 UH |
255 | elif self.state in ('GET BIT', 'GET EOP'): |
256 | # Wait until we're in the middle of the desired bit. | |
a241cfb6 SB |
257 | if self.samplenum == self.samplenum_edge: |
258 | self.edgepins = pins | |
d1970f14 UH |
259 | if self.samplenum < self.samplenum_target: |
260 | continue | |
261 | sym = symbols[self.options['signalling']][tuple(pins)] | |
262 | if self.state == 'GET BIT': | |
263 | self.get_bit(sym) | |
264 | elif self.state == 'GET EOP': | |
265 | self.get_eop(sym) |