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1 | ## |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2019-2020 Philip Åkesson <philip.akesson@gmail.com> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | ## | |
19 | ||
20 | import sigrokdecode as srd | |
21 | ||
22 | class SamplerateError(Exception): | |
23 | pass | |
24 | ||
25 | class Decoder(srd.Decoder): | |
26 | api_version = 3 | |
27 | id = 'sdq' | |
28 | name = 'SDQ' | |
29 | longname = 'Texas Instruments SDQ' | |
30 | desc = 'Texas Instruments SDQ. The SDQ protocol is also used by Apple.' | |
31 | license = 'gplv2+' | |
32 | inputs = ['logic'] | |
33 | outputs = [] | |
34 | tags = ['Embedded/industrial'] | |
35 | channels = ( | |
36 | {'id': 'sdq', 'name': 'SDQ', 'desc': 'Single wire SDQ data line.'}, | |
37 | ) | |
38 | options = ( | |
39 | {'id': 'bitrate', 'desc': 'Bit rate', 'default': 98425}, | |
40 | ) | |
41 | annotations = ( | |
42 | ('bit', 'Bit'), | |
43 | ('byte', 'Byte'), | |
44 | ('break', 'Break'), | |
45 | ) | |
46 | annotation_rows = ( | |
47 | ('bits', 'Bits', (0,)), | |
48 | ('bytes', 'Bytes', (1,)), | |
49 | ('breaks', 'Breaks', (2,)), | |
50 | ) | |
51 | ||
52 | def puts(self, data): | |
53 | self.put(self.startsample, self.samplenum, self.out_ann, data) | |
54 | ||
55 | def putetu(self, data): | |
56 | self.put(self.startsample, self.startsample + int(self.bit_width), self.out_ann, data) | |
57 | ||
58 | def putbetu(self, data): | |
59 | self.put(self.bytepos, self.startsample + int(self.bit_width), self.out_ann, data) | |
60 | ||
61 | def bits2num(self, bitlist): | |
62 | number = 0 | |
63 | for i in range(len(bitlist)): | |
64 | number += bitlist[i] * 2**i | |
65 | return number | |
66 | ||
67 | def __init__(self): | |
68 | self.reset() | |
69 | ||
70 | def reset(self): | |
71 | self.samplerate = None | |
72 | self.state = 'INIT' | |
73 | self.startsample = 0 | |
74 | self.bits = [] | |
75 | self.bytepos = 0 | |
76 | ||
77 | def start(self): | |
78 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
79 | ||
80 | def metadata(self, key, value): | |
81 | if key == srd.SRD_CONF_SAMPLERATE: | |
82 | self.samplerate = value | |
83 | self.bit_width = float(self.samplerate) / float(self.options['bitrate']) | |
84 | self.half_bit_width = self.bit_width / 2.0 | |
85 | self.break_threshold = self.bit_width * 1.2 # Break if the line is low for longer than this | |
86 | ||
87 | def handle_bit(self, bit): | |
88 | self.bits.append(bit) | |
89 | self.putetu([0, ['Bit: %d' % bit, '%d' % bit]]) | |
90 | ||
91 | if len(self.bits) == 8: | |
92 | byte = self.bits2num(self.bits) | |
93 | self.putbetu([1, ['Byte: %#04x' % byte, '%#04x' % byte]]) | |
94 | self.bits = [] | |
95 | self.bytepos = 0 | |
96 | ||
97 | def handle_break(self): | |
98 | self.puts([2, ['Break', 'BR']]) | |
99 | self.bits = [] | |
100 | self.startsample = self.samplenum | |
101 | self.bytepos = 0 | |
102 | ||
103 | def decode(self): | |
104 | if not self.samplerate: | |
105 | raise SamplerateError('Cannot decode without samplerate.') | |
106 | ||
107 | while True: | |
108 | if self.state == 'INIT': | |
109 | sdq, = self.wait({0: 'h'}) # Wait until the line is high before starting | |
110 | self.state = 'DATA' | |
111 | ||
112 | elif self.state == 'DATA': | |
113 | sdq, = self.wait({0: 'f'}) # Falling edge | |
114 | ||
115 | self.startsample = self.samplenum | |
116 | if self.bytepos == 0: | |
117 | self.bytepos = self.samplenum | |
118 | ||
119 | sdq, = self.wait({0: 'r'}) # Rising edge | |
120 | ||
121 | delta = self.samplenum - self.startsample | |
122 | if delta > self.break_threshold: | |
123 | self.state = 'BREAK' | |
124 | elif delta > self.half_bit_width: | |
125 | self.handle_bit(0) | |
126 | else: | |
127 | self.handle_bit(1) | |
128 | ||
129 | elif self.state == 'BREAK': | |
130 | self.handle_break() | |
131 | self.state = 'DATA' |