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1 | ## |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2020 Analog Devices Inc. | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 3 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | ## | |
19 | ||
20 | import sigrokdecode as srd | |
21 | ||
42233a55 | 22 | input_voltage_format = ['%.6fV', '%.2fV'] |
e0a46d7c TP |
23 | |
24 | class Decoder(srd.Decoder): | |
25 | api_version = 3 | |
26 | id = 'ltc242x' | |
27 | name = 'LTC242x' | |
28 | longname = 'Linear Technology LTC242x' | |
29 | desc = 'Linear Technology LTC2421/LTC2422 1-/2-channel 20-bit ADC.' | |
30 | license = 'gplv2+' | |
31 | inputs = ['spi'] | |
32 | outputs = [] | |
a3b9585c | 33 | tags = ['IC', 'Analog/digital'] |
e0a46d7c | 34 | annotations = ( |
81f6d8d0 UH |
35 | ('ch0_voltage', 'CH0 voltage'), |
36 | ('ch1_voltage', 'CH1 voltage'), | |
e0a46d7c TP |
37 | ) |
38 | annotation_rows = ( | |
81f6d8d0 UH |
39 | ('ch0_voltages', 'CH0 voltages', (0,)), |
40 | ('ch1_voltages', 'CH1 voltages', (1,)), | |
e0a46d7c TP |
41 | ) |
42 | options = ( | |
2b61ff3d | 43 | {'id': 'vref', 'desc': 'Reference voltage (V)', 'default': 1.5}, |
e0a46d7c TP |
44 | ) |
45 | ||
46 | def __init__(self): | |
47 | self.reset() | |
48 | ||
49 | def reset(self): | |
50 | self.data = 0 | |
51 | self.ss, self.es = 0, 0 | |
52 | ||
53 | def start(self): | |
54 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
55 | ||
e0a46d7c TP |
56 | def handle_input_voltage(self, data): |
57 | input_voltage = data & 0x3FFFFF | |
58 | input_voltage = -(2**21 - input_voltage) | |
2b61ff3d | 59 | input_voltage = (input_voltage / 0xfffff) * self.options['vref'] |
e0a46d7c TP |
60 | ann = [] |
61 | for format in input_voltage_format: | |
62 | ann.append(format % input_voltage) | |
63 | ||
81f6d8d0 UH |
64 | channel = (data & (1 << 22)) >> 22 |
65 | self.put(self.ss, self.es, self.out_ann, [channel, ann]) | |
e0a46d7c TP |
66 | |
67 | def decode(self, ss, es, data): | |
68 | ptype = data[0] | |
69 | ||
70 | if ptype == 'CS-CHANGE': | |
71 | cs_old, cs_new = data[1:] | |
72 | if cs_old is not None and cs_old == 0 and cs_new == 1: | |
73 | self.es = es | |
74 | self.data >>= 1 | |
e0a46d7c TP |
75 | self.handle_input_voltage(self.data) |
76 | ||
77 | self.data = 0 | |
78 | elif cs_old is not None and cs_old == 1 and cs_new == 0: | |
79 | self.ss = ss | |
80 | ||
81 | elif ptype == 'BITS': | |
82 | miso = data[2] | |
83 | for bit in reversed(miso): | |
84 | self.data = self.data | bit[0] | |
85 | ||
86 | self.data <<= 1 |