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1 | ## |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2017 Kevin Redon <kingkevin@cuvoodoo.info> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | ## | |
19 | ||
20 | import sigrokdecode as srd | |
21 | ||
22 | class Decoder(srd.Decoder): | |
b197383c | 23 | api_version = 3 |
e1eacaab UH |
24 | id = 'eeprom93xx' |
25 | name = '93xx EEPROM' | |
26 | longname = '93xx Microwire EEPROM' | |
27 | desc = '93xx series Microwire EEPROM protocol.' | |
3a9c517e KR |
28 | license = 'gplv2+' |
29 | inputs = ['microwire'] | |
e1eacaab | 30 | outputs = ['eeprom93xx'] |
3a9c517e KR |
31 | options = ( |
32 | {'id': 'addresssize', 'desc': 'Address size', 'default': 8}, | |
33 | {'id': 'wordsize', 'desc': 'Word size', 'default': 16}, | |
34 | ) | |
35 | annotations = ( | |
36 | ('si-data', 'SI data'), | |
37 | ('so-data', 'SO data'), | |
38 | ('warning', 'Warning'), | |
39 | ) | |
40 | annotation_rows = ( | |
41 | ('data', 'Data', (0, 1)), | |
42 | ('warnings', 'Warnings', (2,)), | |
43 | ) | |
44 | ||
45 | def __init__(self): | |
46 | self.frame = [] | |
47 | ||
48 | def start(self): | |
49 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
50 | self.addresssize = self.options['addresssize'] | |
51 | self.wordsize = self.options['wordsize'] | |
52 | ||
53 | def put_address(self, data): | |
54 | # Get address (MSb first). | |
55 | a = 0 | |
56 | for b in range(len(data)): | |
941e7a64 | 57 | a += (data[b].si << (len(data) - b - 1)) |
5f914c47 | 58 | self.put(data[0].ss, data[-1].es, self.out_ann, |
3a9c517e KR |
59 | [0, ['Address: 0x%x' % a, 'Addr: 0x%x' % a, '0x%x' % a]]) |
60 | ||
61 | def put_word(self, si, data): | |
62 | # Decode word (MSb first). | |
63 | word = 0 | |
64 | for b in range(len(data)): | |
941e7a64 UH |
65 | d = data[b].si if si else data[b].so |
66 | word += (d << (len(data) - b - 1)) | |
b13ced31 | 67 | idx = 0 if si else 1 |
5f914c47 | 68 | self.put(data[0].ss, data[-1].es, |
b13ced31 | 69 | self.out_ann, [idx, ['Data: 0x%x' % word, '0x%x' % word]]) |
3a9c517e KR |
70 | |
71 | def decode(self, ss, es, data): | |
72 | if len(data) < (2 + self.addresssize): | |
73 | self.put(ss, es, self.out_ann, [2, ['Not enough packet bits']]) | |
74 | return | |
75 | ||
941e7a64 | 76 | opcode = (data[0].si << 1) + (data[1].si << 0) |
3a9c517e KR |
77 | |
78 | if opcode == 2: | |
79 | # READ instruction. | |
5f914c47 | 80 | self.put(data[0].ss, data[1].es, |
3a9c517e KR |
81 | self.out_ann, [0, ['Read word', 'READ']]) |
82 | self.put_address(data[2:2 + self.addresssize]) | |
83 | ||
84 | # Get all words. | |
85 | word_start = 2 + self.addresssize | |
86 | while len(data) - word_start > 0: | |
87 | # Check if there are enough bits for a word. | |
88 | if len(data) - word_start < self.wordsize: | |
5f914c47 | 89 | self.put(data[word_start].ss, data[len(data) - 1].es, |
3a9c517e KR |
90 | self.out_ann, [2, ['Not enough word bits']]) |
91 | break | |
92 | self.put_word(False, data[word_start:word_start + self.wordsize]) | |
93 | # Go to next word. | |
94 | word_start += self.wordsize | |
95 | elif opcode == 1: | |
96 | # WRITE instruction. | |
5f914c47 | 97 | self.put(data[0].ss, data[1].es, |
3a9c517e KR |
98 | self.out_ann, [0, ['Write word', 'WRITE']]) |
99 | self.put_address(data[2:2 + self.addresssize]) | |
100 | # Get word. | |
101 | if len(data) < 2 + self.addresssize + self.wordsize: | |
941e7a64 UH |
102 | self.put(data[2 + self.addresssize].ss, |
103 | data[len(data) - 1].ss, | |
3a9c517e KR |
104 | self.out_ann, [2, ['Not enough word bits']]) |
105 | else: | |
106 | self.put_word(True, data[2 + self.addresssize:2 + self.addresssize + self.wordsize]) | |
107 | elif opcode == 3: | |
108 | # ERASE instruction. | |
5f914c47 | 109 | self.put(data[0].ss, data[1].es, |
3a9c517e KR |
110 | self.out_ann, [0, ['Erase word', 'ERASE']]) |
111 | self.put_address(data[2:2 + self.addresssize]) | |
112 | elif opcode == 0: | |
941e7a64 | 113 | if data[2].si == 1 and data[3].si == 1: |
3a9c517e | 114 | # WEN instruction. |
5f914c47 | 115 | self.put(data[0].ss, data[2 + self.addresssize - 1].es, |
3a9c517e | 116 | self.out_ann, [0, ['Write enable', 'WEN']]) |
941e7a64 | 117 | elif data[2].si == 0 and data[3].si == 0: |
3a9c517e | 118 | # WDS instruction. |
5f914c47 | 119 | self.put(data[0].ss, data[2 + self.addresssize - 1].es, |
3a9c517e | 120 | self.out_ann, [0, ['Write disable', 'WDS']]) |
941e7a64 | 121 | elif data[2].si == 1 and data[3].si == 0: |
3a9c517e | 122 | # ERAL instruction. |
5f914c47 | 123 | self.put(data[0].ss, data[2 + self.addresssize - 1].es, |
3a9c517e KR |
124 | self.out_ann, [0, ['Erase all memory', |
125 | 'Erase all', 'ERAL']]) | |
941e7a64 | 126 | elif data[2].si == 0 and data[3].si == 1: |
3a9c517e | 127 | # WRAL instruction. |
5f914c47 | 128 | self.put(data[0].ss, data[2 + self.addresssize - 1].es, |
3a9c517e KR |
129 | self.out_ann, [0, ['Write all memory', |
130 | 'Write all', 'WRAL']]) | |
131 | # Get word. | |
132 | if len(data) < 2 + self.addresssize + self.wordsize: | |
941e7a64 UH |
133 | self.put(data[2 + self.addresssize].ss, |
134 | data[len(data) - 1].ss, | |
3a9c517e KR |
135 | self.out_ann, [2, ['Not enough word bits']]) |
136 | else: | |
137 | self.put_word(True, data[2 + self.addresssize:2 + self.addresssize + self.wordsize]) |