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702fa251 | 1 | ## |
50bd5d25 | 2 | ## This file is part of the libsigrokdecode project. |
702fa251 | 3 | ## |
e20f455c | 4 | ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de> |
702fa251 UH |
5 | ## |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, write to the Free Software | |
18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | ## | |
702fa251 UH |
20 | |
21 | import sigrokdecode as srd | |
22 | ||
23 | class Decoder(srd.Decoder): | |
24 | api_version = 1 | |
25 | id = 'can' | |
26 | name = 'CAN' | |
9e1437a0 | 27 | longname = 'Controller Area Network' |
702fa251 UH |
28 | desc = 'Field bus protocol for distributed realtime control.' |
29 | license = 'gplv2+' | |
30 | inputs = ['logic'] | |
31 | outputs = ['can'] | |
da9bcbd9 | 32 | probes = ( |
702fa251 | 33 | {'id': 'can_rx', 'name': 'CAN RX', 'desc': 'CAN bus line'}, |
da9bcbd9 | 34 | ) |
84c1c0b5 BV |
35 | options = ( |
36 | {'id': 'bitrate', 'desc': 'Bitrate', 'default': 1000000}, # 1Mbit/s | |
37 | {'id': 'sample_point', 'desc': 'Sample point', 'default': 70}, # 70% | |
38 | ) | |
da9bcbd9 BV |
39 | annotations = ( |
40 | ('data', 'CAN payload data'), | |
41 | ('sof', 'Start of frame'), | |
42 | ('eof', 'End of frame'), | |
43 | ('id', 'Identifier'), | |
44 | ('ext-id', 'Extended identifier'), | |
45 | ('full-id', 'Full identifier'), | |
46 | ('ide', 'Identifier extension bit'), | |
47 | ('reserved-bit', 'Reserved bit 0 and 1'), | |
48 | ('rtr', 'Remote transmission request'), | |
49 | ('srr', 'Substitute remote request'), | |
50 | ('dlc', 'Data length count'), | |
51 | ('crc-sequence', 'CRC sequence'), | |
52 | ('crc-delimiter', 'CRC delimiter'), | |
53 | ('ack-slot', 'ACK slot'), | |
54 | ('ack-delimiter', 'ACK delimiter'), | |
55 | ('stuff-bit', 'Stuff bit'), | |
56 | ('warnings', 'Human-readable warnings'), | |
57 | ) | |
702fa251 UH |
58 | |
59 | def __init__(self, **kwargs): | |
f372d597 | 60 | self.samplerate = None |
702fa251 UH |
61 | self.reset_variables() |
62 | ||
f372d597 | 63 | def start(self): |
c515eed7 | 64 | # self.out_python = self.register(srd.OUTPUT_PYTHON) |
be465111 | 65 | self.out_ann = self.register(srd.OUTPUT_ANN) |
702fa251 | 66 | |
f372d597 BV |
67 | def metadata(self, key, value): |
68 | if key == srd.SRD_CONF_SAMPLERATE: | |
69 | self.samplerate = value | |
70 | self.bit_width = float(self.samplerate) / float(self.options['bitrate']) | |
71 | self.bitpos = (self.bit_width / 100.0) * self.options['sample_point'] | |
702fa251 | 72 | |
4b1813b4 UH |
73 | # Generic helper for CAN bit annotations. |
74 | def putg(self, ss, es, data): | |
75 | left, right = int(self.bitpos), int(self.bit_width - self.bitpos) | |
76 | self.put(ss - left, es + right, self.out_ann, data) | |
77 | ||
78 | # Single-CAN-bit annotation using the current samplenum. | |
e20f455c | 79 | def putx(self, data): |
4b1813b4 UH |
80 | self.putg(self.samplenum, self.samplenum, data) |
81 | ||
82 | # Single-CAN-bit annotation using the samplenum of CAN bit 12. | |
83 | def put12(self, data): | |
84 | self.putg(self.ss_bit12, self.ss_bit12, data) | |
85 | ||
86 | # Multi-CAN-bit annotation from self.ss_block to current samplenum. | |
87 | def putb(self, data): | |
88 | self.putg(self.ss_block, self.samplenum, data) | |
e20f455c | 89 | |
702fa251 UH |
90 | def reset_variables(self): |
91 | self.state = 'IDLE' | |
92 | self.sof = self.frame_type = self.dlc = None | |
93 | self.rawbits = [] # All bits, including stuff bits | |
94 | self.bits = [] # Only actual CAN frame bits (no stuff bits) | |
95 | self.curbit = 0 # Current bit of CAN frame (bit 0 == SOF) | |
96 | self.last_databit = 999 # Positive value that bitnum+x will never match | |
4b1813b4 UH |
97 | self.ss_block = None |
98 | self.ss_bit12 = None | |
99 | self.ss_databytebits = [] | |
702fa251 UH |
100 | |
101 | # Return True if we reached the desired bit position, False otherwise. | |
102 | def reached_bit(self, bitnum): | |
103 | bitpos = int(self.sof + (self.bit_width * bitnum) + self.bitpos) | |
104 | if self.samplenum >= bitpos: | |
105 | return True | |
106 | return False | |
107 | ||
108 | def is_stuff_bit(self): | |
109 | # CAN uses NRZ encoding and bit stuffing. | |
110 | # After 5 identical bits, a stuff bit of opposite value is added. | |
111 | last_6_bits = self.rawbits[-6:] | |
112 | if last_6_bits not in ([0, 0, 0, 0, 0, 1], [1, 1, 1, 1, 1, 0]): | |
113 | return False | |
114 | ||
115 | # Stuff bit. Keep it in self.rawbits, but drop it from self.bits. | |
74c9bb3c UH |
116 | self.putx([15, ['Stuff bit: %d' % self.rawbits[-1], |
117 | 'SB: %d' % self.rawbits[-1], 'SB']]) | |
702fa251 UH |
118 | self.bits.pop() # Drop last bit. |
119 | return True | |
120 | ||
121 | def is_valid_crc(self, crc_bits): | |
122 | return True # TODO | |
123 | ||
124 | def decode_error_frame(self, bits): | |
125 | pass # TODO | |
126 | ||
127 | def decode_overload_frame(self, bits): | |
128 | pass # TODO | |
129 | ||
130 | # Both standard and extended frames end with CRC, CRC delimiter, ACK, | |
131 | # ACK delimiter, and EOF fields. Handle them in a common function. | |
132 | # Returns True if the frame ended (EOF), False otherwise. | |
133 | def decode_frame_end(self, can_rx, bitnum): | |
134 | ||
4b1813b4 UH |
135 | # Remember start of CRC sequence (see below). |
136 | if bitnum == (self.last_databit + 1): | |
137 | self.ss_block = self.samplenum | |
138 | ||
702fa251 | 139 | # CRC sequence (15 bits) |
4b1813b4 | 140 | elif bitnum == (self.last_databit + 15): |
702fa251 UH |
141 | x = self.last_databit + 1 |
142 | crc_bits = self.bits[x:x + 15 + 1] | |
143 | self.crc = int(''.join(str(d) for d in crc_bits), 2) | |
74c9bb3c UH |
144 | self.putb([11, ['CRC sequence: 0x%04x' % self.crc, |
145 | 'CRC: 0x%04x' % self.crc, 'CRC']]) | |
702fa251 | 146 | if not self.is_valid_crc(crc_bits): |
74c9bb3c | 147 | self.putb([16, ['CRC is invalid']]) |
702fa251 UH |
148 | |
149 | # CRC delimiter bit (recessive) | |
150 | elif bitnum == (self.last_databit + 16): | |
74c9bb3c UH |
151 | self.putx([12, ['CRC delimiter: %d' % can_rx, |
152 | 'CRC d: %d' % can_rx, 'CRC d']]) | |
702fa251 UH |
153 | |
154 | # ACK slot bit (dominant: ACK, recessive: NACK) | |
155 | elif bitnum == (self.last_databit + 17): | |
156 | ack = 'ACK' if can_rx == 0 else 'NACK' | |
74c9bb3c | 157 | self.putx([13, ['ACK slot: %s' % ack, 'ACK s: %s' % ack, 'ACK s']]) |
702fa251 UH |
158 | |
159 | # ACK delimiter bit (recessive) | |
160 | elif bitnum == (self.last_databit + 18): | |
74c9bb3c UH |
161 | self.putx([14, ['ACK delimiter: %d' % can_rx, |
162 | 'ACK d: %d' % can_rx, 'ACK d']]) | |
702fa251 | 163 | |
4b1813b4 UH |
164 | # Remember start of EOF (see below). |
165 | elif bitnum == (self.last_databit + 19): | |
166 | self.ss_block = self.samplenum | |
167 | ||
702fa251 UH |
168 | # End of frame (EOF), 7 recessive bits |
169 | elif bitnum == (self.last_databit + 25): | |
74c9bb3c | 170 | self.putb([2, ['End of frame', 'EOF', 'E']]) |
702fa251 UH |
171 | self.reset_variables() |
172 | return True | |
173 | ||
174 | return False | |
175 | ||
176 | # Returns True if the frame ended (EOF), False otherwise. | |
177 | def decode_standard_frame(self, can_rx, bitnum): | |
178 | ||
179 | # Bit 14: RB0 (reserved bit) | |
180 | # Has to be sent dominant, but receivers should accept recessive too. | |
181 | if bitnum == 14: | |
74c9bb3c | 182 | self.putx([7, ['Reserved bit 0: %d' % can_rx, |
534ae912 | 183 | 'RB0: %d' % can_rx, 'RB0']]) |
702fa251 UH |
184 | |
185 | # Bit 12: Remote transmission request (RTR) bit | |
186 | # Data frame: dominant, remote frame: recessive | |
187 | # Remote frames do not contain a data field. | |
188 | rtr = 'remote' if self.bits[12] == 1 else 'data' | |
74c9bb3c | 189 | self.put12([8, ['Remote transmission request: %s frame' % rtr, |
534ae912 | 190 | 'RTR: %s frame' % rtr, 'RTR']]) |
4b1813b4 UH |
191 | |
192 | # Remember start of DLC (see below). | |
193 | elif bitnum == 15: | |
194 | self.ss_block = self.samplenum | |
702fa251 UH |
195 | |
196 | # Bits 15-18: Data length code (DLC), in number of bytes (0-8). | |
197 | elif bitnum == 18: | |
198 | self.dlc = int(''.join(str(d) for d in self.bits[15:18 + 1]), 2) | |
74c9bb3c UH |
199 | self.putb([10, ['Data length code: %d' % self.dlc, |
200 | 'DLC: %d' % self.dlc, 'DLC']]) | |
702fa251 UH |
201 | self.last_databit = 18 + (self.dlc * 8) |
202 | ||
4b1813b4 UH |
203 | # Remember all databyte bits, except the very last one. |
204 | elif bitnum in range(19, self.last_databit): | |
205 | self.ss_databytebits.append(self.samplenum) | |
206 | ||
702fa251 UH |
207 | # Bits 19-X: Data field (0-8 bytes, depending on DLC) |
208 | # The bits within a data byte are transferred MSB-first. | |
209 | elif bitnum == self.last_databit: | |
4b1813b4 | 210 | self.ss_databytebits.append(self.samplenum) # Last databyte bit. |
702fa251 UH |
211 | for i in range(self.dlc): |
212 | x = 18 + (8 * i) + 1 | |
213 | b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) | |
4b1813b4 UH |
214 | ss = self.ss_databytebits[i * 8] |
215 | es = self.ss_databytebits[((i + 1) * 8) - 1] | |
534ae912 UH |
216 | self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), |
217 | 'DB %d: 0x%02x' % (i, b), 'DB']]) | |
4b1813b4 | 218 | self.ss_databytebits = [] |
702fa251 UH |
219 | |
220 | elif bitnum > self.last_databit: | |
221 | return self.decode_frame_end(can_rx, bitnum) | |
222 | ||
223 | return False | |
224 | ||
225 | # Returns True if the frame ended (EOF), False otherwise. | |
226 | def decode_extended_frame(self, can_rx, bitnum): | |
227 | ||
4b1813b4 UH |
228 | # Remember start of EID (see below). |
229 | if bitnum == 14: | |
230 | self.ss_block = self.samplenum | |
231 | ||
702fa251 | 232 | # Bits 14-31: Extended identifier (EID[17..0]) |
4b1813b4 | 233 | elif bitnum == 31: |
702fa251 | 234 | self.eid = int(''.join(str(d) for d in self.bits[14:]), 2) |
534ae912 | 235 | s = '%d (0x%x)' % (self.eid, self.eid) |
74c9bb3c | 236 | self.putb([4, ['Extended Identifier: %s' % s, |
534ae912 | 237 | 'Extended ID: %s' % s, 'Extended ID', 'EID']]) |
702fa251 UH |
238 | |
239 | self.fullid = self.id << 18 | self.eid | |
534ae912 | 240 | s = '%d (0x%x)' % (self.fullid, self.fullid) |
74c9bb3c | 241 | self.putb([5, ['Full Identifier: %s' % s, 'Full ID: %s' % s, |
534ae912 | 242 | 'Full ID', 'FID']]) |
702fa251 UH |
243 | |
244 | # Bit 12: Substitute remote request (SRR) bit | |
74c9bb3c | 245 | self.put12([9, ['Substitute remote request: %d' % self.bits[12], |
534ae912 | 246 | 'SRR: %d' % self.bits[12], 'SRR']]) |
702fa251 UH |
247 | |
248 | # Bit 32: Remote transmission request (RTR) bit | |
249 | # Data frame: dominant, remote frame: recessive | |
250 | # Remote frames do not contain a data field. | |
251 | if bitnum == 32: | |
252 | rtr = 'remote' if can_rx == 1 else 'data' | |
74c9bb3c | 253 | self.putx([8, ['Remote transmission request: %s frame' % rtr, |
534ae912 | 254 | 'RTR: %s frame' % rtr, 'RTR']]) |
702fa251 UH |
255 | |
256 | # Bit 33: RB1 (reserved bit) | |
257 | elif bitnum == 33: | |
74c9bb3c | 258 | self.putx([7, ['Reserved bit 1: %d' % can_rx, |
534ae912 | 259 | 'RB1: %d' % can_rx, 'RB1']]) |
702fa251 UH |
260 | |
261 | # Bit 34: RB0 (reserved bit) | |
262 | elif bitnum == 34: | |
74c9bb3c | 263 | self.putx([7, ['Reserved bit 0: %d' % can_rx, |
534ae912 | 264 | 'RB0: %d' % can_rx, 'RB0']]) |
702fa251 | 265 | |
4b1813b4 UH |
266 | # Remember start of DLC (see below). |
267 | elif bitnum == 35: | |
268 | self.ss_block = self.samplenum | |
269 | ||
702fa251 UH |
270 | # Bits 35-38: Data length code (DLC), in number of bytes (0-8). |
271 | elif bitnum == 38: | |
272 | self.dlc = int(''.join(str(d) for d in self.bits[35:38 + 1]), 2) | |
74c9bb3c UH |
273 | self.putb([10, ['Data length code: %d' % self.dlc, |
274 | 'DLC: %d' % self.dlc, 'DLC']]) | |
702fa251 UH |
275 | self.last_databit = 38 + (self.dlc * 8) |
276 | ||
4b1813b4 UH |
277 | # Remember all databyte bits, except the very last one. |
278 | elif bitnum in range(39, self.last_databit): | |
279 | self.ss_databytebits.append(self.samplenum) | |
280 | ||
702fa251 UH |
281 | # Bits 39-X: Data field (0-8 bytes, depending on DLC) |
282 | # The bits within a data byte are transferred MSB-first. | |
283 | elif bitnum == self.last_databit: | |
4b1813b4 | 284 | self.ss_databytebits.append(self.samplenum) # Last databyte bit. |
702fa251 UH |
285 | for i in range(self.dlc): |
286 | x = 38 + (8 * i) + 1 | |
287 | b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) | |
4b1813b4 UH |
288 | ss = self.ss_databytebits[i * 8] |
289 | es = self.ss_databytebits[((i + 1) * 8) - 1] | |
534ae912 UH |
290 | self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), |
291 | 'DB %d: 0x%02x' % (i, b), 'DB']]) | |
4b1813b4 | 292 | self.ss_databytebits = [] |
702fa251 UH |
293 | |
294 | elif bitnum > self.last_databit: | |
295 | return self.decode_frame_end(can_rx, bitnum) | |
296 | ||
297 | return False | |
298 | ||
299 | def handle_bit(self, can_rx): | |
300 | self.rawbits.append(can_rx) | |
301 | self.bits.append(can_rx) | |
302 | ||
303 | # Get the index of the current CAN frame bit (without stuff bits). | |
304 | bitnum = len(self.bits) - 1 | |
305 | ||
306 | # For debugging. | |
e20f455c UH |
307 | # self.putx([0, ['Bit %d (CAN bit %d): %d' % \ |
308 | # (self.curbit, bitnum, can_rx)]]) | |
702fa251 UH |
309 | |
310 | # If this is a stuff bit, remove it from self.bits and ignore it. | |
311 | if self.is_stuff_bit(): | |
312 | self.curbit += 1 # Increase self.curbit (bitnum is not affected). | |
313 | return | |
314 | ||
315 | # Bit 0: Start of frame (SOF) bit | |
316 | if bitnum == 0: | |
317 | if can_rx == 0: | |
74c9bb3c | 318 | self.putx([1, ['Start of frame', 'SOF', 'S']]) |
702fa251 | 319 | else: |
74c9bb3c | 320 | self.putx([16, ['Start of frame (SOF) must be a dominant bit']]) |
702fa251 | 321 | |
4b1813b4 UH |
322 | # Remember start of ID (see below). |
323 | elif bitnum == 1: | |
324 | self.ss_block = self.samplenum | |
325 | ||
702fa251 UH |
326 | # Bits 1-11: Identifier (ID[10..0]) |
327 | # The bits ID[10..4] must NOT be all recessive. | |
328 | elif bitnum == 11: | |
329 | self.id = int(''.join(str(d) for d in self.bits[1:]), 2) | |
534ae912 | 330 | s = '%d (0x%x)' % (self.id, self.id), |
74c9bb3c | 331 | self.putb([3, ['Identifier: %s' % s, 'ID: %s' % s, 'ID']]) |
702fa251 UH |
332 | |
333 | # RTR or SRR bit, depending on frame type (gets handled later). | |
334 | elif bitnum == 12: | |
4b1813b4 UH |
335 | # self.putx([0, ['RTR/SRR: %d' % can_rx]]) # Debug only. |
336 | self.ss_bit12 = self.samplenum | |
702fa251 UH |
337 | |
338 | # Bit 13: Identifier extension (IDE) bit | |
339 | # Standard frame: dominant, extended frame: recessive | |
340 | elif bitnum == 13: | |
341 | ide = self.frame_type = 'standard' if can_rx == 0 else 'extended' | |
74c9bb3c | 342 | self.putx([6, ['Identifier extension bit: %s frame' % ide, |
534ae912 | 343 | 'IDE: %s frame' % ide, 'IDE']]) |
702fa251 UH |
344 | |
345 | # Bits 14-X: Frame-type dependent, passed to the resp. handlers. | |
346 | elif bitnum >= 14: | |
347 | if self.frame_type == 'standard': | |
348 | done = self.decode_standard_frame(can_rx, bitnum) | |
349 | else: | |
350 | done = self.decode_extended_frame(can_rx, bitnum) | |
351 | ||
352 | # The handlers return True if a frame ended (EOF). | |
353 | if done: | |
354 | return | |
355 | ||
356 | # After a frame there are 3 intermission bits (recessive). | |
357 | # After these bits, the bus is considered free. | |
358 | ||
359 | self.curbit += 1 | |
360 | ||
361 | def decode(self, ss, es, data): | |
f372d597 BV |
362 | if self.samplerate is None: |
363 | raise Exception("Cannot decode without samplerate.") | |
702fa251 UH |
364 | for (self.samplenum, pins) in data: |
365 | ||
366 | (can_rx,) = pins | |
367 | ||
368 | # State machine. | |
369 | if self.state == 'IDLE': | |
370 | # Wait for a dominant state (logic 0) on the bus. | |
371 | if can_rx == 1: | |
372 | continue | |
373 | self.sof = self.samplenum | |
702fa251 UH |
374 | self.state = 'GET BITS' |
375 | elif self.state == 'GET BITS': | |
376 | # Wait until we're in the correct bit/sampling position. | |
377 | if not self.reached_bit(self.curbit): | |
378 | continue | |
379 | self.handle_bit(can_rx) | |
380 | else: | |
381 | raise Exception("Invalid state: %s" % self.state) | |
382 |